[llvm-objcopy] Fix sparc target endianness

[seiya]

Summary

AFAIK, the "sparc" target is big endian and the target for 32-bit little-endian SPARC is denoted as "sparcel". This patch fixes the endianness of "sparc" target and adds "sparcel" target for 32-bit little-endian SPARC.

[jhenderson]

llvm/test/tools/llvm-objcopy/ELF/binary-input-arch.test

57–58

Add {{$}} to the end of this line, or it could spuriously match against sparcel.

[seiya]

Address a review comment.

[jhenderson]

LGTM.

llvm/test/tools/llvm-objcopy/ELF/binary-input-arch.test

 
 # RUN: llvm-objcopy -I binary -B riscv:rv32 %t.txt %t.rv32.o
 # RUN: llvm-readobj --file-headers %t.rv32.o | FileCheck %s --check-prefixes=CHECK,LE,RISCV32,32
 
 # RUN: llvm-objcopy -I binary -B riscv:rv64 %t.txt %t.rv64.o
 # RUN: llvm-readobj --file-headers %t.rv64.o | FileCheck %s --check-prefixes=CHECK,LE,RISCV64,64
 
 # RUN: llvm-objcopy -I binary -B sparc %t.txt %t.sparc.o
-# RUN: llvm-readobj --file-headers %t.sparc.o | FileCheck %s --check-prefixes=CHECK,LE,SPARC,32
+# RUN: llvm-readobj --file-headers %t.sparc.o | FileCheck %s --check-prefixes=CHECK,BE,SPARC,32
+
+# RUN: llvm-objcopy -I binary -B sparcel %t.txt %t.sparcel.o
+# RUN: llvm-readobj --file-headers %t.sparcel.o | FileCheck %s --check-prefixes=CHECK,LE,SPARCEL,32
 
 # RUN: llvm-objcopy -I binary -B x86-64 %t.txt %t.x86-64.o
 # RUN: llvm-readobj --file-headers %t.x86-64.o | FileCheck %s --check-prefixes=CHECK,LE,X86-64,64
 
 # CHECK: Format:
 # 32-SAME:      ELF32-
 # 64-SAME:      ELF64-
 # AARCH64-SAME: aarch64-little
 # ARM-SAME:     arm-little
 # I386-SAME:    i386
 # MIPS-SAME:    mips{{$}}
 # RISCV32-SAME: riscv{{$}}
 # RISCV64-SAME: riscv{{$}}
 # PPC-SAME:     ppc64
 # SPARC-SAME:   sparc
+# SPARCEL-SAME: sparc
 # X86-64-SAME:  x86-64
 
 # AARCH64-NEXT: Arch: aarch64
 # ARM-NEXT:     Arch: arm
 # I386-NEXT:    Arch: i386
 # MIPS-NEXT:    Arch: mips{{$$}}
 # PPC-NEXT:     Arch: powerpc64le
 # RISCV32-NEXT: Arch: riscv32
 # RISCV64-NEXT: Arch: riscv64
-# SPARC-NEXT:   Arch: sparcel
+# SPARC-NEXT:   Arch: sparc{{$}}
+# SPARCEL-NEXT: Arch: sparcel
 # X86-64-NEXT:  Arch: x86_64
 
 # 32-NEXT:      AddressSize: 32bit
 # 64-NEXT:      AddressSize: 64bit
 
 # CHECK:        ElfHeader {
 # CHECK-NEXT:     Ident {
 # CHECK-NEXT:       Magic: (7F 45 4C 46)

 # AARCH64-NEXT:   Machine: EM_AARCH64 (0xB7)
 # ARM-NEXT:       Machine: EM_ARM (0x28)
 # I386-NEXT:      Machine: EM_386 (0x3)
 # MIPS-NEXT:      Machine: EM_MIPS (0x8)
 # PPC-NEXT:       Machine: EM_PPC64 (0x15)
 # RISCV32-NEXT:   Machine: EM_RISCV (0xF3)
 # RISCV64-NEXT:   Machine: EM_RISCV (0xF3)
 # SPARC-NEXT:     Machine: EM_SPARC (0x2)
+# SPARCEL-NEXT:   Machine: EM_SPARC (0x2)
 # X86-64-NEXT:    Machine: EM_X86_64 (0x3E)
 # CHECK-NEXT:     Version: 1
 # CHECK-NEXT:     Entry: 0x0
 # CHECK-NEXT:     ProgramHeaderOffset:
 # CHECK-NEXT:     SectionHeaderOffset:
 # CHECK-NEXT:     Flags [ (0x0)
 # CHECK-NEXT:     ]
 # 32-NEXT:        HeaderSize: 52

llvm/tools/llvm-objcopy/CopyConfig.cpp

static const StringMap<MachineInfo> ArchMap{
     {"aarch64", {ELF::EM_AARCH64, true, true}},
     {"arm", {ELF::EM_ARM, false, true}},
     {"i386", {ELF::EM_386, false, true}},
     {"i386:x86-64", {ELF::EM_X86_64, true, true}},
     {"mips", {ELF::EM_MIPS, false, false}},
     {"powerpc:common64", {ELF::EM_PPC64, true, true}},
     {"riscv:rv32", {ELF::EM_RISCV, false, true}},
     {"riscv:rv64", {ELF::EM_RISCV, true, true}},
-    {"sparc", {ELF::EM_SPARC, false, true}},
+    {"sparc", {ELF::EM_SPARC, false, false}},
+    {"sparcel", {ELF::EM_SPARC, false, true}},
     {"x86-64", {ELF::EM_X86_64, true, true}},
 };
 
 static Expected<const MachineInfo &> getMachineInfo(StringRef Arch) {
   auto Iter = ArchMap.find(Arch);
   if (Iter == std::end(ArchMap))
     return createStringError(errc::invalid_argument,
                              "Invalid architecture: '%s'", Arch.str().c_str());