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Differential D62807

[SelectionDAG] Add [us]itofp(undef) --> 0 constant fold (PR39205)
ClosedPublic

Authored by RKSimon on Jun 3 2019, 5:28 AM.

Details

Reviewers
spatel
craig.topper
efriedma
jonpa
uweigand
Commits
rGcb7e4e8193f3: [SelectionDAG] Add [us]itofp(undef) --> 0 constant fold (PR39205)
rL362397: [SelectionDAG] Add [us]itofp(undef) --> 0 constant fold (PR39205)
Summary

We were missing this fold in the DAG, which I've copied directly from llvm::ConstantFoldCastInstruction

I've had to tweak the systemz reduced test case to prevent it folding away but the x86 test cases are all examples of the extra scalar conversions reported in PR39205

Diff Detail

Repository
rL LLVM

Revision Contents

PathSize
llvm/
trunk/
lib/
CodeGen/
SelectionDAG/
8 lines
6 lines
test/
CodeGen/
X86/
28 lines
28 lines
130 lines
130 lines

Diff 202701

llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 12,434 Lines • ▼ Show 20 Linesstatic SDValue foldFPToIntToFP(SDNode *N, SelectionDAG &DAG,
return SDValue(); return SDValue();
} }
SDValue DAGCombiner::visitSINT_TO_FP(SDNode *N) { SDValue DAGCombiner::visitSINT_TO_FP(SDNode *N) {
SDValue N0 = N->getOperand(0); SDValue N0 = N->getOperand(0);
EVT VT = N->getValueType(0); EVT VT = N->getValueType(0);
EVT OpVT = N0.getValueType(); EVT OpVT = N0.getValueType();
// [us]itofp(undef) = 0, because the result value is bounded.
if (N0.isUndef())
return DAG.getConstantFP(0.0, SDLoc(N), VT);
// fold (sint_to_fp c1) -> c1fp // fold (sint_to_fp c1) -> c1fp
if (DAG.isConstantIntBuildVectorOrConstantInt(N0) && if (DAG.isConstantIntBuildVectorOrConstantInt(N0) &&
// ...but only if the target supports immediate floating-point values // ...but only if the target supports immediate floating-point values
(!LegalOperations || (!LegalOperations ||
TLI.isOperationLegalOrCustom(ISD::ConstantFP, VT))) TLI.isOperationLegalOrCustom(ISD::ConstantFP, VT)))
return DAG.getNode(ISD::SINT_TO_FP, SDLoc(N), VT, N0); return DAG.getNode(ISD::SINT_TO_FP, SDLoc(N), VT, N0);
// If the input is a legal type, and SINT_TO_FP is not legal on this target, // If the input is a legal type, and SINT_TO_FP is not legal on this target,
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 LinesSDValue DAGCombiner::visitSINT_TO_FP(SDNode *N) {
return SDValue(); return SDValue();
} }
SDValue DAGCombiner::visitUINT_TO_FP(SDNode *N) { SDValue DAGCombiner::visitUINT_TO_FP(SDNode *N) {
SDValue N0 = N->getOperand(0); SDValue N0 = N->getOperand(0);
EVT VT = N->getValueType(0); EVT VT = N->getValueType(0);
EVT OpVT = N0.getValueType(); EVT OpVT = N0.getValueType();
// [us]itofp(undef) = 0, because the result value is bounded.
if (N0.isUndef())
return DAG.getConstantFP(0.0, SDLoc(N), VT);
// fold (uint_to_fp c1) -> c1fp // fold (uint_to_fp c1) -> c1fp
if (DAG.isConstantIntBuildVectorOrConstantInt(N0) && if (DAG.isConstantIntBuildVectorOrConstantInt(N0) &&
// ...but only if the target supports immediate floating-point values // ...but only if the target supports immediate floating-point values
(!LegalOperations || (!LegalOperations ||
TLI.isOperationLegalOrCustom(ISD::ConstantFP, VT))) TLI.isOperationLegalOrCustom(ISD::ConstantFP, VT)))
return DAG.getNode(ISD::UINT_TO_FP, SDLoc(N), VT, N0); return DAG.getNode(ISD::UINT_TO_FP, SDLoc(N), VT, N0);
// If the input is a legal type, and UINT_TO_FP is not legal on this target, // If the input is a legal type, and UINT_TO_FP is not legal on this target,
▲ Show 20 Lines • Show All 7,839 Lines • Show Last 20 Lines

llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 4,434 Lines • ▼ Show 20 Lines assert((!VT.isVector() ||
VT.getVectorNumElements() == VT.getVectorNumElements() ==
Operand.getValueType().getVectorNumElements()) && Operand.getValueType().getVectorNumElements()) &&
"Vector element count mismatch!"); "Vector element count mismatch!");
assert(Operand.getValueType().bitsLT(VT) && assert(Operand.getValueType().bitsLT(VT) &&
"Invalid fpext node, dst < src!"); "Invalid fpext node, dst < src!");
if (Operand.isUndef()) if (Operand.isUndef())
return getUNDEF(VT); return getUNDEF(VT);
break; break;
case ISD::SINT_TO_FP:
case ISD::UINT_TO_FP:
// [us]itofp(undef) = 0, because the result value is bounded.
if (Operand.isUndef())
return getConstantFP(0.0, DL, VT);
break;
case ISD::SIGN_EXTEND: case ISD::SIGN_EXTEND:
assert(VT.isInteger() && Operand.getValueType().isInteger() && assert(VT.isInteger() && Operand.getValueType().isInteger() &&
"Invalid SIGN_EXTEND!"); "Invalid SIGN_EXTEND!");
assert(VT.isVector() == Operand.getValueType().isVector() && assert(VT.isVector() == Operand.getValueType().isVector() &&
"SIGN_EXTEND result type type should be vector iff the operand " "SIGN_EXTEND result type type should be vector iff the operand "
"type is vector!"); "type is vector!");
if (Operand.getValueType() == VT) return Operand; // noop extension if (Operand.getValueType() == VT) return Operand; // noop extension
assert((!VT.isVector() || assert((!VT.isVector() ||
▲ Show 20 Lines • Show All 5,087 Lines • Show Last 20 Lines

llvm/trunk/test/CodeGen/X86/avx512-cvt-widen.ll

Show First 20 Lines • Show All 114 Lines • ▼ Show 20 Lines
; DQNOVL-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0 ; DQNOVL-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
; DQNOVL-NEXT: vzeroupper ; DQNOVL-NEXT: vzeroupper
; DQNOVL-NEXT: retq ; DQNOVL-NEXT: retq
%b = sitofp <2 x i64> %a to <2 x double> %b = sitofp <2 x i64> %a to <2 x double>
ret <2 x double> %b ret <2 x double> %b
} }
define <2 x float> @sltof2f32(<2 x i64> %a) { define <2 x float> @sltof2f32(<2 x i64> %a) {
; NODQ-LABEL: sltof2f32: ; NOVLDQ-LABEL: sltof2f32:
; NODQ: # %bb.0: ; NOVLDQ: # %bb.0:
; NODQ-NEXT: vpextrq $1, %xmm0, %rax ; NOVLDQ-NEXT: vpextrq $1, %xmm0, %rax
; NODQ-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1 ; NOVLDQ-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1
; NODQ-NEXT: vmovq %xmm0, %rax ; NOVLDQ-NEXT: vmovq %xmm0, %rax
; NODQ-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0 ; NOVLDQ-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0
; NODQ-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] ; NOVLDQ-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
; NODQ-NEXT: vcvtsi2ss %rax, %xmm2, %xmm1 ; NOVLDQ-NEXT: retq
; NODQ-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
; NODQ-NEXT: retq
; ;
; VLDQ-LABEL: sltof2f32: ; VLDQ-LABEL: sltof2f32:
; VLDQ: # %bb.0: ; VLDQ: # %bb.0:
; VLDQ-NEXT: vcvtqq2ps %xmm0, %xmm0 ; VLDQ-NEXT: vcvtqq2ps %xmm0, %xmm0
; VLDQ-NEXT: retq ; VLDQ-NEXT: retq
; ;
; VLNODQ-LABEL: sltof2f32:
; VLNODQ: # %bb.0:
; VLNODQ-NEXT: vpextrq $1, %xmm0, %rax
; VLNODQ-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1
; VLNODQ-NEXT: vmovq %xmm0, %rax
; VLNODQ-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0
; VLNODQ-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; VLNODQ-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
; VLNODQ-NEXT: retq
;
; DQNOVL-LABEL: sltof2f32: ; DQNOVL-LABEL: sltof2f32:
; DQNOVL: # %bb.0: ; DQNOVL: # %bb.0:
; DQNOVL-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 ; DQNOVL-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
; DQNOVL-NEXT: vcvtqq2ps %zmm0, %ymm0 ; DQNOVL-NEXT: vcvtqq2ps %zmm0, %ymm0
; DQNOVL-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 ; DQNOVL-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
; DQNOVL-NEXT: vzeroupper ; DQNOVL-NEXT: vzeroupper
; DQNOVL-NEXT: retq ; DQNOVL-NEXT: retq
%b = sitofp <2 x i64> %a to <2 x float> %b = sitofp <2 x i64> %a to <2 x float>
▲ Show 20 Lines • Show All 2,491 Lines • Show Last 20 Lines

llvm/trunk/test/CodeGen/X86/avx512-cvt.ll

Show First 20 Lines • Show All 114 Lines • ▼ Show 20 Lines
; DQNOVL-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0 ; DQNOVL-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
; DQNOVL-NEXT: vzeroupper ; DQNOVL-NEXT: vzeroupper
; DQNOVL-NEXT: retq ; DQNOVL-NEXT: retq
%b = sitofp <2 x i64> %a to <2 x double> %b = sitofp <2 x i64> %a to <2 x double>
ret <2 x double> %b ret <2 x double> %b
} }
define <2 x float> @sltof2f32(<2 x i64> %a) { define <2 x float> @sltof2f32(<2 x i64> %a) {
; NODQ-LABEL: sltof2f32: ; NOVLDQ-LABEL: sltof2f32:
; NODQ: # %bb.0: ; NOVLDQ: # %bb.0:
; NODQ-NEXT: vpextrq $1, %xmm0, %rax ; NOVLDQ-NEXT: vpextrq $1, %xmm0, %rax
; NODQ-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1 ; NOVLDQ-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1
; NODQ-NEXT: vmovq %xmm0, %rax ; NOVLDQ-NEXT: vmovq %xmm0, %rax
; NODQ-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0 ; NOVLDQ-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0
; NODQ-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] ; NOVLDQ-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
; NODQ-NEXT: vcvtsi2ss %rax, %xmm2, %xmm1 ; NOVLDQ-NEXT: retq
; NODQ-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
; NODQ-NEXT: retq
; ;
; VLDQ-LABEL: sltof2f32: ; VLDQ-LABEL: sltof2f32:
; VLDQ: # %bb.0: ; VLDQ: # %bb.0:
; VLDQ-NEXT: vcvtqq2ps %xmm0, %xmm0 ; VLDQ-NEXT: vcvtqq2ps %xmm0, %xmm0
; VLDQ-NEXT: retq ; VLDQ-NEXT: retq
; ;
; VLNODQ-LABEL: sltof2f32:
; VLNODQ: # %bb.0:
; VLNODQ-NEXT: vpextrq $1, %xmm0, %rax
; VLNODQ-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1
; VLNODQ-NEXT: vmovq %xmm0, %rax
; VLNODQ-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0
; VLNODQ-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; VLNODQ-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
; VLNODQ-NEXT: retq
;
; DQNOVL-LABEL: sltof2f32: ; DQNOVL-LABEL: sltof2f32:
; DQNOVL: # %bb.0: ; DQNOVL: # %bb.0:
; DQNOVL-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 ; DQNOVL-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
; DQNOVL-NEXT: vcvtqq2ps %zmm0, %ymm0 ; DQNOVL-NEXT: vcvtqq2ps %zmm0, %ymm0
; DQNOVL-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 ; DQNOVL-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
; DQNOVL-NEXT: vzeroupper ; DQNOVL-NEXT: vzeroupper
; DQNOVL-NEXT: retq ; DQNOVL-NEXT: retq
%b = sitofp <2 x i64> %a to <2 x float> %b = sitofp <2 x i64> %a to <2 x float>
▲ Show 20 Lines • Show All 2,466 Lines • Show Last 20 Lines

llvm/trunk/test/CodeGen/X86/vec_int_to_fp-widen.ll

Show First 20 Lines • Show All 1,180 Lines • ▼ Show 20 Lines
; SSE41-NEXT: retq ; SSE41-NEXT: retq
; ;
; VEX-LABEL: sitofp_2i64_to_4f32: ; VEX-LABEL: sitofp_2i64_to_4f32:
; VEX: # %bb.0: ; VEX: # %bb.0:
; VEX-NEXT: vpextrq $1, %xmm0, %rax ; VEX-NEXT: vpextrq $1, %xmm0, %rax
; VEX-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1 ; VEX-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1
; VEX-NEXT: vmovq %xmm0, %rax ; VEX-NEXT: vmovq %xmm0, %rax
; VEX-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0 ; VEX-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0
; VEX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] ; VEX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
; VEX-NEXT: vcvtsi2ss %rax, %xmm2, %xmm1
; VEX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
; VEX-NEXT: retq ; VEX-NEXT: retq
; ;
; AVX512F-LABEL: sitofp_2i64_to_4f32: ; AVX512F-LABEL: sitofp_2i64_to_4f32:
; AVX512F: # %bb.0: ; AVX512F: # %bb.0:
; AVX512F-NEXT: vpextrq $1, %xmm0, %rax ; AVX512F-NEXT: vpextrq $1, %xmm0, %rax
; AVX512F-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1 ; AVX512F-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1
; AVX512F-NEXT: vmovq %xmm0, %rax ; AVX512F-NEXT: vmovq %xmm0, %rax
; AVX512F-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0 ; AVX512F-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0
; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] ; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
; AVX512F-NEXT: vcvtsi2ss %rax, %xmm2, %xmm1
; AVX512F-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
; AVX512F-NEXT: retq ; AVX512F-NEXT: retq
; ;
; AVX512VL-LABEL: sitofp_2i64_to_4f32: ; AVX512VL-LABEL: sitofp_2i64_to_4f32:
; AVX512VL: # %bb.0: ; AVX512VL: # %bb.0:
; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax ; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax
; AVX512VL-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1 ; AVX512VL-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1
; AVX512VL-NEXT: vmovq %xmm0, %rax ; AVX512VL-NEXT: vmovq %xmm0, %rax
; AVX512VL-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0 ; AVX512VL-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0
; AVX512VL-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] ; AVX512VL-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; AVX512VL-NEXT: vcvtsi2ss %rax, %xmm2, %xmm1 ; AVX512VL-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
; AVX512VL-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
; AVX512VL-NEXT: retq ; AVX512VL-NEXT: retq
; ;
; AVX512DQ-LABEL: sitofp_2i64_to_4f32: ; AVX512DQ-LABEL: sitofp_2i64_to_4f32:
; AVX512DQ: # %bb.0: ; AVX512DQ: # %bb.0:
; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 ; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
; AVX512DQ-NEXT: vcvtqq2ps %zmm0, %ymm0 ; AVX512DQ-NEXT: vcvtqq2ps %zmm0, %ymm0
; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 ; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
; AVX512DQ-NEXT: vzeroupper ; AVX512DQ-NEXT: vzeroupper
▲ Show 20 Lines • Show All 82 Lines • ▼ Show 20 Lines
; SSE2-LABEL: sitofp_4i64_to_4f32_undef: ; SSE2-LABEL: sitofp_4i64_to_4f32_undef:
; SSE2: # %bb.0: ; SSE2: # %bb.0:
; SSE2-NEXT: movq %xmm0, %rax ; SSE2-NEXT: movq %xmm0, %rax
; SSE2-NEXT: cvtsi2ss %rax, %xmm1 ; SSE2-NEXT: cvtsi2ss %rax, %xmm1
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; SSE2-NEXT: movq %xmm0, %rax ; SSE2-NEXT: movq %xmm0, %rax
; SSE2-NEXT: xorps %xmm0, %xmm0 ; SSE2-NEXT: xorps %xmm0, %xmm0
; SSE2-NEXT: cvtsi2ss %rax, %xmm0 ; SSE2-NEXT: cvtsi2ss %rax, %xmm0
; SSE2-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] ; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
; SSE2-NEXT: xorps %xmm0, %xmm0 ; SSE2-NEXT: movq {{.*#+}} xmm0 = xmm1[0],zero
; SSE2-NEXT: cvtsi2ss %rax, %xmm0
; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[0,0]
; SSE2-NEXT: movaps %xmm1, %xmm0
; SSE2-NEXT: retq ; SSE2-NEXT: retq
; ;
; SSE41-LABEL: sitofp_4i64_to_4f32_undef: ; SSE41-LABEL: sitofp_4i64_to_4f32_undef:
; SSE41: # %bb.0: ; SSE41: # %bb.0:
; SSE41-NEXT: pextrq $1, %xmm0, %rax ; SSE41-NEXT: pextrq $1, %xmm0, %rax
; SSE41-NEXT: cvtsi2ss %rax, %xmm1 ; SSE41-NEXT: cvtsi2ss %rax, %xmm1
; SSE41-NEXT: movq %xmm0, %rax ; SSE41-NEXT: movq %xmm0, %rax
; SSE41-NEXT: xorps %xmm0, %xmm0 ; SSE41-NEXT: xorps %xmm0, %xmm0
; SSE41-NEXT: cvtsi2ss %rax, %xmm0 ; SSE41-NEXT: cvtsi2ss %rax, %xmm0
; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] ; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
; SSE41-NEXT: xorps %xmm1, %xmm1
; SSE41-NEXT: cvtsi2ss %rax, %xmm1
; SSE41-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
; SSE41-NEXT: retq ; SSE41-NEXT: retq
; ;
; VEX-LABEL: sitofp_4i64_to_4f32_undef: ; VEX-LABEL: sitofp_4i64_to_4f32_undef:
; VEX: # %bb.0: ; VEX: # %bb.0:
; VEX-NEXT: vpextrq $1, %xmm0, %rax ; VEX-NEXT: vpextrq $1, %xmm0, %rax
; VEX-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1 ; VEX-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1
; VEX-NEXT: vmovq %xmm0, %rax ; VEX-NEXT: vmovq %xmm0, %rax
; VEX-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0 ; VEX-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0
; VEX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] ; VEX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
; VEX-NEXT: vcvtsi2ss %rax, %xmm2, %xmm1
; VEX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
; VEX-NEXT: retq ; VEX-NEXT: retq
; ;
; AVX512F-LABEL: sitofp_4i64_to_4f32_undef: ; AVX512F-LABEL: sitofp_4i64_to_4f32_undef:
; AVX512F: # %bb.0: ; AVX512F: # %bb.0:
; AVX512F-NEXT: vpextrq $1, %xmm0, %rax ; AVX512F-NEXT: vpextrq $1, %xmm0, %rax
; AVX512F-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1 ; AVX512F-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1
; AVX512F-NEXT: vmovq %xmm0, %rax ; AVX512F-NEXT: vmovq %xmm0, %rax
; AVX512F-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0 ; AVX512F-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0
; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] ; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
; AVX512F-NEXT: vcvtsi2ss %rax, %xmm2, %xmm1
; AVX512F-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
; AVX512F-NEXT: retq ; AVX512F-NEXT: retq
; ;
; AVX512VL-LABEL: sitofp_4i64_to_4f32_undef: ; AVX512VL-LABEL: sitofp_4i64_to_4f32_undef:
; AVX512VL: # %bb.0: ; AVX512VL: # %bb.0:
; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax ; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax
; AVX512VL-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1 ; AVX512VL-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1
; AVX512VL-NEXT: vmovq %xmm0, %rax ; AVX512VL-NEXT: vmovq %xmm0, %rax
; AVX512VL-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0 ; AVX512VL-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0
; AVX512VL-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] ; AVX512VL-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; AVX512VL-NEXT: vcvtsi2ss %rax, %xmm2, %xmm1 ; AVX512VL-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
; AVX512VL-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
; AVX512VL-NEXT: retq ; AVX512VL-NEXT: retq
; ;
; AVX512DQ-LABEL: sitofp_4i64_to_4f32_undef: ; AVX512DQ-LABEL: sitofp_4i64_to_4f32_undef:
; AVX512DQ: # %bb.0: ; AVX512DQ: # %bb.0:
; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 ; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
; AVX512DQ-NEXT: vcvtqq2ps %zmm0, %ymm0 ; AVX512DQ-NEXT: vcvtqq2ps %zmm0, %ymm0
; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 ; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
; AVX512DQ-NEXT: vzeroupper ; AVX512DQ-NEXT: vzeroupper
▲ Show 20 Lines • Show All 542 Lines • ▼ Show 20 Lines
; VEX-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1 ; VEX-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1
; VEX-NEXT: vaddss %xmm1, %xmm1, %xmm1 ; VEX-NEXT: vaddss %xmm1, %xmm1, %xmm1
; VEX-NEXT: .LBB39_3: ; VEX-NEXT: .LBB39_3:
; VEX-NEXT: vmovq %xmm0, %rax ; VEX-NEXT: vmovq %xmm0, %rax
; VEX-NEXT: testq %rax, %rax ; VEX-NEXT: testq %rax, %rax
; VEX-NEXT: js .LBB39_4 ; VEX-NEXT: js .LBB39_4
; VEX-NEXT: # %bb.5: ; VEX-NEXT: # %bb.5:
; VEX-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0 ; VEX-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0
; VEX-NEXT: jmp .LBB39_6 ; VEX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
; VEX-NEXT: retq
; VEX-NEXT: .LBB39_4: ; VEX-NEXT: .LBB39_4:
; VEX-NEXT: movq %rax, %rcx ; VEX-NEXT: movq %rax, %rcx
; VEX-NEXT: shrq %rcx ; VEX-NEXT: shrq %rcx
; VEX-NEXT: andl $1, %eax ; VEX-NEXT: andl $1, %eax
; VEX-NEXT: orq %rcx, %rax ; VEX-NEXT: orq %rcx, %rax
; VEX-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0 ; VEX-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0
; VEX-NEXT: vaddss %xmm0, %xmm0, %xmm0 ; VEX-NEXT: vaddss %xmm0, %xmm0, %xmm0
; VEX-NEXT: .LBB39_6: ; VEX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
; VEX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3]
; VEX-NEXT: testq %rax, %rax
; VEX-NEXT: vxorps %xmm1, %xmm1, %xmm1
; VEX-NEXT: js .LBB39_8
; VEX-NEXT: # %bb.7:
; VEX-NEXT: vcvtsi2ss %rax, %xmm2, %xmm1
; VEX-NEXT: .LBB39_8:
; VEX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
; VEX-NEXT: retq ; VEX-NEXT: retq
; ;
; AVX512F-LABEL: uitofp_2i64_to_4f32: ; AVX512F-LABEL: uitofp_2i64_to_4f32:
; AVX512F: # %bb.0: ; AVX512F: # %bb.0:
; AVX512F-NEXT: vpextrq $1, %xmm0, %rax ; AVX512F-NEXT: vpextrq $1, %xmm0, %rax
; AVX512F-NEXT: vcvtusi2ss %rax, %xmm1, %xmm1 ; AVX512F-NEXT: vcvtusi2ss %rax, %xmm1, %xmm1
; AVX512F-NEXT: vmovq %xmm0, %rax ; AVX512F-NEXT: vmovq %xmm0, %rax
; AVX512F-NEXT: vcvtusi2ss %rax, %xmm2, %xmm0 ; AVX512F-NEXT: vcvtusi2ss %rax, %xmm2, %xmm0
; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] ; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
; AVX512F-NEXT: vcvtusi2ss %rax, %xmm2, %xmm1
; AVX512F-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
; AVX512F-NEXT: retq ; AVX512F-NEXT: retq
; ;
; AVX512VL-LABEL: uitofp_2i64_to_4f32: ; AVX512VL-LABEL: uitofp_2i64_to_4f32:
; AVX512VL: # %bb.0: ; AVX512VL: # %bb.0:
; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax ; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax
; AVX512VL-NEXT: vcvtusi2ss %rax, %xmm1, %xmm1 ; AVX512VL-NEXT: vcvtusi2ss %rax, %xmm1, %xmm1
; AVX512VL-NEXT: vmovq %xmm0, %rax ; AVX512VL-NEXT: vmovq %xmm0, %rax
; AVX512VL-NEXT: vcvtusi2ss %rax, %xmm2, %xmm0 ; AVX512VL-NEXT: vcvtusi2ss %rax, %xmm2, %xmm0
; AVX512VL-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] ; AVX512VL-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; AVX512VL-NEXT: vcvtusi2ss %rax, %xmm2, %xmm1 ; AVX512VL-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
; AVX512VL-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
; AVX512VL-NEXT: retq ; AVX512VL-NEXT: retq
; ;
; AVX512DQ-LABEL: uitofp_2i64_to_4f32: ; AVX512DQ-LABEL: uitofp_2i64_to_4f32:
; AVX512DQ: # %bb.0: ; AVX512DQ: # %bb.0:
; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 ; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
; AVX512DQ-NEXT: vcvtuqq2ps %zmm0, %ymm0 ; AVX512DQ-NEXT: vcvtuqq2ps %zmm0, %ymm0
; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 ; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
; AVX512DQ-NEXT: vzeroupper ; AVX512DQ-NEXT: vzeroupper
▲ Show 20 Lines • Show All 153 Lines • ▼ Show 20 Lines; AVX512VLDQ-NEXT: retq
%cvt = uitofp <2 x i64> %a to <2 x float> %cvt = uitofp <2 x i64> %a to <2 x float>
%ext = shufflevector <2 x float> %cvt, <2 x float> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 3> %ext = shufflevector <2 x float> %cvt, <2 x float> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
ret <4 x float> %ext ret <4 x float> %ext
} }
define <4 x float> @uitofp_4i64_to_4f32_undef(<2 x i64> %a) { define <4 x float> @uitofp_4i64_to_4f32_undef(<2 x i64> %a) {
; SSE2-LABEL: uitofp_4i64_to_4f32_undef: ; SSE2-LABEL: uitofp_4i64_to_4f32_undef:
; SSE2: # %bb.0: ; SSE2: # %bb.0:
; SSE2-NEXT: movdqa %xmm0, %xmm1
; SSE2-NEXT: movq %xmm0, %rax ; SSE2-NEXT: movq %xmm0, %rax
; SSE2-NEXT: testq %rax, %rax ; SSE2-NEXT: testq %rax, %rax
; SSE2-NEXT: js .LBB41_1 ; SSE2-NEXT: js .LBB41_1
; SSE2-NEXT: # %bb.2: ; SSE2-NEXT: # %bb.2:
; SSE2-NEXT: xorps %xmm0, %xmm0 ; SSE2-NEXT: cvtsi2ss %rax, %xmm1
; SSE2-NEXT: cvtsi2ss %rax, %xmm0
; SSE2-NEXT: jmp .LBB41_3 ; SSE2-NEXT: jmp .LBB41_3
; SSE2-NEXT: .LBB41_1: ; SSE2-NEXT: .LBB41_1:
; SSE2-NEXT: movq %rax, %rcx ; SSE2-NEXT: movq %rax, %rcx
; SSE2-NEXT: shrq %rcx ; SSE2-NEXT: shrq %rcx
; SSE2-NEXT: andl $1, %eax ; SSE2-NEXT: andl $1, %eax
; SSE2-NEXT: orq %rcx, %rax ; SSE2-NEXT: orq %rcx, %rax
; SSE2-NEXT: xorps %xmm0, %xmm0 ; SSE2-NEXT: cvtsi2ss %rax, %xmm1
; SSE2-NEXT: cvtsi2ss %rax, %xmm0 ; SSE2-NEXT: addss %xmm1, %xmm1
; SSE2-NEXT: addss %xmm0, %xmm0
; SSE2-NEXT: .LBB41_3: ; SSE2-NEXT: .LBB41_3:
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; SSE2-NEXT: movq %xmm1, %rax ; SSE2-NEXT: movq %xmm0, %rax
; SSE2-NEXT: testq %rax, %rax ; SSE2-NEXT: testq %rax, %rax
; SSE2-NEXT: js .LBB41_4 ; SSE2-NEXT: js .LBB41_4
; SSE2-NEXT: # %bb.5: ; SSE2-NEXT: # %bb.5:
; SSE2-NEXT: xorps %xmm1, %xmm1 ; SSE2-NEXT: xorps %xmm0, %xmm0
; SSE2-NEXT: cvtsi2ss %rax, %xmm1 ; SSE2-NEXT: cvtsi2ss %rax, %xmm0
; SSE2-NEXT: jmp .LBB41_6 ; SSE2-NEXT: jmp .LBB41_6
; SSE2-NEXT: .LBB41_4: ; SSE2-NEXT: .LBB41_4:
; SSE2-NEXT: movq %rax, %rcx ; SSE2-NEXT: movq %rax, %rcx
; SSE2-NEXT: shrq %rcx ; SSE2-NEXT: shrq %rcx
; SSE2-NEXT: andl $1, %eax ; SSE2-NEXT: andl $1, %eax
; SSE2-NEXT: orq %rcx, %rax ; SSE2-NEXT: orq %rcx, %rax
; SSE2-NEXT: xorps %xmm1, %xmm1 ; SSE2-NEXT: xorps %xmm0, %xmm0
; SSE2-NEXT: cvtsi2ss %rax, %xmm1 ; SSE2-NEXT: cvtsi2ss %rax, %xmm0
; SSE2-NEXT: addss %xmm1, %xmm1 ; SSE2-NEXT: addss %xmm0, %xmm0
; SSE2-NEXT: .LBB41_6: ; SSE2-NEXT: .LBB41_6:
; SSE2-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] ; SSE2-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
; SSE2-NEXT: testq %rax, %rax ; SSE2-NEXT: movq {{.*#+}} xmm0 = xmm1[0],zero
; SSE2-NEXT: xorps %xmm1, %xmm1
; SSE2-NEXT: js .LBB41_8
; SSE2-NEXT: # %bb.7:
; SSE2-NEXT: xorps %xmm1, %xmm1
; SSE2-NEXT: cvtsi2ss %rax, %xmm1
; SSE2-NEXT: .LBB41_8:
; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
; SSE2-NEXT: retq ; SSE2-NEXT: retq
; ;
; SSE41-LABEL: uitofp_4i64_to_4f32_undef: ; SSE41-LABEL: uitofp_4i64_to_4f32_undef:
; SSE41: # %bb.0: ; SSE41: # %bb.0:
; SSE41-NEXT: pextrq $1, %xmm0, %rax ; SSE41-NEXT: pextrq $1, %xmm0, %rax
; SSE41-NEXT: testq %rax, %rax ; SSE41-NEXT: testq %rax, %rax
; SSE41-NEXT: js .LBB41_1 ; SSE41-NEXT: js .LBB41_1
; SSE41-NEXT: # %bb.2: ; SSE41-NEXT: # %bb.2:
; SSE41-NEXT: cvtsi2ss %rax, %xmm1 ; SSE41-NEXT: cvtsi2ss %rax, %xmm1
; SSE41-NEXT: jmp .LBB41_3 ; SSE41-NEXT: jmp .LBB41_3
; SSE41-NEXT: .LBB41_1: ; SSE41-NEXT: .LBB41_1:
; SSE41-NEXT: movq %rax, %rcx ; SSE41-NEXT: movq %rax, %rcx
; SSE41-NEXT: shrq %rcx ; SSE41-NEXT: shrq %rcx
; SSE41-NEXT: andl $1, %eax ; SSE41-NEXT: andl $1, %eax
; SSE41-NEXT: orq %rcx, %rax ; SSE41-NEXT: orq %rcx, %rax
; SSE41-NEXT: cvtsi2ss %rax, %xmm1 ; SSE41-NEXT: cvtsi2ss %rax, %xmm1
; SSE41-NEXT: addss %xmm1, %xmm1 ; SSE41-NEXT: addss %xmm1, %xmm1
; SSE41-NEXT: .LBB41_3: ; SSE41-NEXT: .LBB41_3:
; SSE41-NEXT: movq %xmm0, %rax ; SSE41-NEXT: movq %xmm0, %rax
; SSE41-NEXT: testq %rax, %rax ; SSE41-NEXT: testq %rax, %rax
; SSE41-NEXT: js .LBB41_4 ; SSE41-NEXT: js .LBB41_4
; SSE41-NEXT: # %bb.5: ; SSE41-NEXT: # %bb.5:
; SSE41-NEXT: xorps %xmm0, %xmm0 ; SSE41-NEXT: xorps %xmm0, %xmm0
; SSE41-NEXT: cvtsi2ss %rax, %xmm0 ; SSE41-NEXT: cvtsi2ss %rax, %xmm0
; SSE41-NEXT: jmp .LBB41_6 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
; SSE41-NEXT: retq
; SSE41-NEXT: .LBB41_4: ; SSE41-NEXT: .LBB41_4:
; SSE41-NEXT: movq %rax, %rcx ; SSE41-NEXT: movq %rax, %rcx
; SSE41-NEXT: shrq %rcx ; SSE41-NEXT: shrq %rcx
; SSE41-NEXT: andl $1, %eax ; SSE41-NEXT: andl $1, %eax
; SSE41-NEXT: orq %rcx, %rax ; SSE41-NEXT: orq %rcx, %rax
; SSE41-NEXT: xorps %xmm0, %xmm0 ; SSE41-NEXT: xorps %xmm0, %xmm0
; SSE41-NEXT: cvtsi2ss %rax, %xmm0 ; SSE41-NEXT: cvtsi2ss %rax, %xmm0
; SSE41-NEXT: addss %xmm0, %xmm0 ; SSE41-NEXT: addss %xmm0, %xmm0
; SSE41-NEXT: .LBB41_6: ; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3]
; SSE41-NEXT: testq %rax, %rax
; SSE41-NEXT: xorps %xmm1, %xmm1
; SSE41-NEXT: js .LBB41_8
; SSE41-NEXT: # %bb.7:
; SSE41-NEXT: xorps %xmm1, %xmm1
; SSE41-NEXT: cvtsi2ss %rax, %xmm1
; SSE41-NEXT: .LBB41_8:
; SSE41-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
; SSE41-NEXT: retq ; SSE41-NEXT: retq
; ;
; VEX-LABEL: uitofp_4i64_to_4f32_undef: ; VEX-LABEL: uitofp_4i64_to_4f32_undef:
; VEX: # %bb.0: ; VEX: # %bb.0:
; VEX-NEXT: vpextrq $1, %xmm0, %rax ; VEX-NEXT: vpextrq $1, %xmm0, %rax
; VEX-NEXT: testq %rax, %rax ; VEX-NEXT: testq %rax, %rax
; VEX-NEXT: js .LBB41_1 ; VEX-NEXT: js .LBB41_1
; VEX-NEXT: # %bb.2: ; VEX-NEXT: # %bb.2:
; VEX-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1 ; VEX-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1
; VEX-NEXT: jmp .LBB41_3 ; VEX-NEXT: jmp .LBB41_3
; VEX-NEXT: .LBB41_1: ; VEX-NEXT: .LBB41_1:
; VEX-NEXT: movq %rax, %rcx ; VEX-NEXT: movq %rax, %rcx
; VEX-NEXT: shrq %rcx ; VEX-NEXT: shrq %rcx
; VEX-NEXT: andl $1, %eax ; VEX-NEXT: andl $1, %eax
; VEX-NEXT: orq %rcx, %rax ; VEX-NEXT: orq %rcx, %rax
; VEX-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1 ; VEX-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1
; VEX-NEXT: vaddss %xmm1, %xmm1, %xmm1 ; VEX-NEXT: vaddss %xmm1, %xmm1, %xmm1
; VEX-NEXT: .LBB41_3: ; VEX-NEXT: .LBB41_3:
; VEX-NEXT: vmovq %xmm0, %rax ; VEX-NEXT: vmovq %xmm0, %rax
; VEX-NEXT: testq %rax, %rax ; VEX-NEXT: testq %rax, %rax
; VEX-NEXT: js .LBB41_4 ; VEX-NEXT: js .LBB41_4
; VEX-NEXT: # %bb.5: ; VEX-NEXT: # %bb.5:
; VEX-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0 ; VEX-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0
; VEX-NEXT: jmp .LBB41_6 ; VEX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
; VEX-NEXT: retq
; VEX-NEXT: .LBB41_4: ; VEX-NEXT: .LBB41_4:
; VEX-NEXT: movq %rax, %rcx ; VEX-NEXT: movq %rax, %rcx
; VEX-NEXT: shrq %rcx ; VEX-NEXT: shrq %rcx
; VEX-NEXT: andl $1, %eax ; VEX-NEXT: andl $1, %eax
; VEX-NEXT: orq %rcx, %rax ; VEX-NEXT: orq %rcx, %rax
; VEX-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0 ; VEX-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0
; VEX-NEXT: vaddss %xmm0, %xmm0, %xmm0 ; VEX-NEXT: vaddss %xmm0, %xmm0, %xmm0
; VEX-NEXT: .LBB41_6: ; VEX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
; VEX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3]
; VEX-NEXT: testq %rax, %rax
; VEX-NEXT: vxorps %xmm1, %xmm1, %xmm1
; VEX-NEXT: js .LBB41_8
; VEX-NEXT: # %bb.7:
; VEX-NEXT: vcvtsi2ss %rax, %xmm2, %xmm1
; VEX-NEXT: .LBB41_8:
; VEX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
; VEX-NEXT: retq ; VEX-NEXT: retq
; ;
; AVX512F-LABEL: uitofp_4i64_to_4f32_undef: ; AVX512F-LABEL: uitofp_4i64_to_4f32_undef:
; AVX512F: # %bb.0: ; AVX512F: # %bb.0:
; AVX512F-NEXT: vpextrq $1, %xmm0, %rax ; AVX512F-NEXT: vpextrq $1, %xmm0, %rax
; AVX512F-NEXT: vcvtusi2ss %rax, %xmm1, %xmm1 ; AVX512F-NEXT: vcvtusi2ss %rax, %xmm1, %xmm1
; AVX512F-NEXT: vmovq %xmm0, %rax ; AVX512F-NEXT: vmovq %xmm0, %rax
; AVX512F-NEXT: vcvtusi2ss %rax, %xmm2, %xmm0 ; AVX512F-NEXT: vcvtusi2ss %rax, %xmm2, %xmm0
; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] ; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
; AVX512F-NEXT: vcvtusi2ss %rax, %xmm2, %xmm1
; AVX512F-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
; AVX512F-NEXT: retq ; AVX512F-NEXT: retq
; ;
; AVX512VL-LABEL: uitofp_4i64_to_4f32_undef: ; AVX512VL-LABEL: uitofp_4i64_to_4f32_undef:
; AVX512VL: # %bb.0: ; AVX512VL: # %bb.0:
; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax ; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax
; AVX512VL-NEXT: vcvtusi2ss %rax, %xmm1, %xmm1 ; AVX512VL-NEXT: vcvtusi2ss %rax, %xmm1, %xmm1
; AVX512VL-NEXT: vmovq %xmm0, %rax ; AVX512VL-NEXT: vmovq %xmm0, %rax
; AVX512VL-NEXT: vcvtusi2ss %rax, %xmm2, %xmm0 ; AVX512VL-NEXT: vcvtusi2ss %rax, %xmm2, %xmm0
; AVX512VL-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] ; AVX512VL-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; AVX512VL-NEXT: vcvtusi2ss %rax, %xmm2, %xmm1 ; AVX512VL-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
; AVX512VL-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
; AVX512VL-NEXT: retq ; AVX512VL-NEXT: retq
; ;
; AVX512DQ-LABEL: uitofp_4i64_to_4f32_undef: ; AVX512DQ-LABEL: uitofp_4i64_to_4f32_undef:
; AVX512DQ: # %bb.0: ; AVX512DQ: # %bb.0:
; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 ; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
; AVX512DQ-NEXT: vcvtuqq2ps %zmm0, %ymm0 ; AVX512DQ-NEXT: vcvtuqq2ps %zmm0, %ymm0
; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 ; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
; AVX512DQ-NEXT: vzeroupper ; AVX512DQ-NEXT: vzeroupper
▲ Show 20 Lines • Show All 3,284 Lines • Show Last 20 Lines

llvm/trunk/test/CodeGen/X86/vec_int_to_fp.ll

Show First 20 Lines • Show All 1,180 Lines • ▼ Show 20 Lines
; SSE41-NEXT: retq ; SSE41-NEXT: retq
; ;
; VEX-LABEL: sitofp_2i64_to_4f32: ; VEX-LABEL: sitofp_2i64_to_4f32:
; VEX: # %bb.0: ; VEX: # %bb.0:
; VEX-NEXT: vpextrq $1, %xmm0, %rax ; VEX-NEXT: vpextrq $1, %xmm0, %rax
; VEX-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1 ; VEX-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1
; VEX-NEXT: vmovq %xmm0, %rax ; VEX-NEXT: vmovq %xmm0, %rax
; VEX-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0 ; VEX-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0
; VEX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] ; VEX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
; VEX-NEXT: vcvtsi2ss %rax, %xmm2, %xmm1
; VEX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
; VEX-NEXT: retq ; VEX-NEXT: retq
; ;
; AVX512F-LABEL: sitofp_2i64_to_4f32: ; AVX512F-LABEL: sitofp_2i64_to_4f32:
; AVX512F: # %bb.0: ; AVX512F: # %bb.0:
; AVX512F-NEXT: vpextrq $1, %xmm0, %rax ; AVX512F-NEXT: vpextrq $1, %xmm0, %rax
; AVX512F-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1 ; AVX512F-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1
; AVX512F-NEXT: vmovq %xmm0, %rax ; AVX512F-NEXT: vmovq %xmm0, %rax
; AVX512F-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0 ; AVX512F-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0
; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] ; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
; AVX512F-NEXT: vcvtsi2ss %rax, %xmm2, %xmm1
; AVX512F-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
; AVX512F-NEXT: retq ; AVX512F-NEXT: retq
; ;
; AVX512VL-LABEL: sitofp_2i64_to_4f32: ; AVX512VL-LABEL: sitofp_2i64_to_4f32:
; AVX512VL: # %bb.0: ; AVX512VL: # %bb.0:
; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax ; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax
; AVX512VL-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1 ; AVX512VL-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1
; AVX512VL-NEXT: vmovq %xmm0, %rax ; AVX512VL-NEXT: vmovq %xmm0, %rax
; AVX512VL-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0 ; AVX512VL-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0
; AVX512VL-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] ; AVX512VL-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; AVX512VL-NEXT: vcvtsi2ss %rax, %xmm2, %xmm1 ; AVX512VL-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
; AVX512VL-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
; AVX512VL-NEXT: retq ; AVX512VL-NEXT: retq
; ;
; AVX512DQ-LABEL: sitofp_2i64_to_4f32: ; AVX512DQ-LABEL: sitofp_2i64_to_4f32:
; AVX512DQ: # %bb.0: ; AVX512DQ: # %bb.0:
; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 ; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
; AVX512DQ-NEXT: vcvtqq2ps %zmm0, %ymm0 ; AVX512DQ-NEXT: vcvtqq2ps %zmm0, %ymm0
; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 ; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
; AVX512DQ-NEXT: vzeroupper ; AVX512DQ-NEXT: vzeroupper
▲ Show 20 Lines • Show All 82 Lines • ▼ Show 20 Lines
; SSE2-LABEL: sitofp_4i64_to_4f32_undef: ; SSE2-LABEL: sitofp_4i64_to_4f32_undef:
; SSE2: # %bb.0: ; SSE2: # %bb.0:
; SSE2-NEXT: movq %xmm0, %rax ; SSE2-NEXT: movq %xmm0, %rax
; SSE2-NEXT: cvtsi2ss %rax, %xmm1 ; SSE2-NEXT: cvtsi2ss %rax, %xmm1
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; SSE2-NEXT: movq %xmm0, %rax ; SSE2-NEXT: movq %xmm0, %rax
; SSE2-NEXT: xorps %xmm0, %xmm0 ; SSE2-NEXT: xorps %xmm0, %xmm0
; SSE2-NEXT: cvtsi2ss %rax, %xmm0 ; SSE2-NEXT: cvtsi2ss %rax, %xmm0
; SSE2-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] ; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
; SSE2-NEXT: xorps %xmm0, %xmm0 ; SSE2-NEXT: movq {{.*#+}} xmm0 = xmm1[0],zero
; SSE2-NEXT: cvtsi2ss %rax, %xmm0
; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[0,0]
; SSE2-NEXT: movaps %xmm1, %xmm0
; SSE2-NEXT: retq ; SSE2-NEXT: retq
; ;
; SSE41-LABEL: sitofp_4i64_to_4f32_undef: ; SSE41-LABEL: sitofp_4i64_to_4f32_undef:
; SSE41: # %bb.0: ; SSE41: # %bb.0:
; SSE41-NEXT: pextrq $1, %xmm0, %rax ; SSE41-NEXT: pextrq $1, %xmm0, %rax
; SSE41-NEXT: cvtsi2ss %rax, %xmm1 ; SSE41-NEXT: cvtsi2ss %rax, %xmm1
; SSE41-NEXT: movq %xmm0, %rax ; SSE41-NEXT: movq %xmm0, %rax
; SSE41-NEXT: xorps %xmm0, %xmm0 ; SSE41-NEXT: xorps %xmm0, %xmm0
; SSE41-NEXT: cvtsi2ss %rax, %xmm0 ; SSE41-NEXT: cvtsi2ss %rax, %xmm0
; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] ; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
; SSE41-NEXT: xorps %xmm1, %xmm1
; SSE41-NEXT: cvtsi2ss %rax, %xmm1
; SSE41-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
; SSE41-NEXT: retq ; SSE41-NEXT: retq
; ;
; VEX-LABEL: sitofp_4i64_to_4f32_undef: ; VEX-LABEL: sitofp_4i64_to_4f32_undef:
; VEX: # %bb.0: ; VEX: # %bb.0:
; VEX-NEXT: vpextrq $1, %xmm0, %rax ; VEX-NEXT: vpextrq $1, %xmm0, %rax
; VEX-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1 ; VEX-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1
; VEX-NEXT: vmovq %xmm0, %rax ; VEX-NEXT: vmovq %xmm0, %rax
; VEX-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0 ; VEX-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0
; VEX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] ; VEX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
; VEX-NEXT: vcvtsi2ss %rax, %xmm2, %xmm1
; VEX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
; VEX-NEXT: retq ; VEX-NEXT: retq
; ;
; AVX512F-LABEL: sitofp_4i64_to_4f32_undef: ; AVX512F-LABEL: sitofp_4i64_to_4f32_undef:
; AVX512F: # %bb.0: ; AVX512F: # %bb.0:
; AVX512F-NEXT: vpextrq $1, %xmm0, %rax ; AVX512F-NEXT: vpextrq $1, %xmm0, %rax
; AVX512F-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1 ; AVX512F-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1
; AVX512F-NEXT: vmovq %xmm0, %rax ; AVX512F-NEXT: vmovq %xmm0, %rax
; AVX512F-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0 ; AVX512F-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0
; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] ; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
; AVX512F-NEXT: vcvtsi2ss %rax, %xmm2, %xmm1
; AVX512F-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
; AVX512F-NEXT: retq ; AVX512F-NEXT: retq
; ;
; AVX512VL-LABEL: sitofp_4i64_to_4f32_undef: ; AVX512VL-LABEL: sitofp_4i64_to_4f32_undef:
; AVX512VL: # %bb.0: ; AVX512VL: # %bb.0:
; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax ; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax
; AVX512VL-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1 ; AVX512VL-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1
; AVX512VL-NEXT: vmovq %xmm0, %rax ; AVX512VL-NEXT: vmovq %xmm0, %rax
; AVX512VL-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0 ; AVX512VL-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0
; AVX512VL-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] ; AVX512VL-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; AVX512VL-NEXT: vcvtsi2ss %rax, %xmm2, %xmm1 ; AVX512VL-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
; AVX512VL-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
; AVX512VL-NEXT: retq ; AVX512VL-NEXT: retq
; ;
; AVX512DQ-LABEL: sitofp_4i64_to_4f32_undef: ; AVX512DQ-LABEL: sitofp_4i64_to_4f32_undef:
; AVX512DQ: # %bb.0: ; AVX512DQ: # %bb.0:
; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 ; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
; AVX512DQ-NEXT: vcvtqq2ps %zmm0, %ymm0 ; AVX512DQ-NEXT: vcvtqq2ps %zmm0, %ymm0
; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 ; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
; AVX512DQ-NEXT: vzeroupper ; AVX512DQ-NEXT: vzeroupper
▲ Show 20 Lines • Show All 542 Lines • ▼ Show 20 Lines
; VEX-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1 ; VEX-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1
; VEX-NEXT: vaddss %xmm1, %xmm1, %xmm1 ; VEX-NEXT: vaddss %xmm1, %xmm1, %xmm1
; VEX-NEXT: .LBB39_3: ; VEX-NEXT: .LBB39_3:
; VEX-NEXT: vmovq %xmm0, %rax ; VEX-NEXT: vmovq %xmm0, %rax
; VEX-NEXT: testq %rax, %rax ; VEX-NEXT: testq %rax, %rax
; VEX-NEXT: js .LBB39_4 ; VEX-NEXT: js .LBB39_4
; VEX-NEXT: # %bb.5: ; VEX-NEXT: # %bb.5:
; VEX-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0 ; VEX-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0
; VEX-NEXT: jmp .LBB39_6 ; VEX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
; VEX-NEXT: retq
; VEX-NEXT: .LBB39_4: ; VEX-NEXT: .LBB39_4:
; VEX-NEXT: movq %rax, %rcx ; VEX-NEXT: movq %rax, %rcx
; VEX-NEXT: shrq %rcx ; VEX-NEXT: shrq %rcx
; VEX-NEXT: andl $1, %eax ; VEX-NEXT: andl $1, %eax
; VEX-NEXT: orq %rcx, %rax ; VEX-NEXT: orq %rcx, %rax
; VEX-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0 ; VEX-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0
; VEX-NEXT: vaddss %xmm0, %xmm0, %xmm0 ; VEX-NEXT: vaddss %xmm0, %xmm0, %xmm0
; VEX-NEXT: .LBB39_6: ; VEX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
; VEX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3]
; VEX-NEXT: testq %rax, %rax
; VEX-NEXT: vxorps %xmm1, %xmm1, %xmm1
; VEX-NEXT: js .LBB39_8
; VEX-NEXT: # %bb.7:
; VEX-NEXT: vcvtsi2ss %rax, %xmm2, %xmm1
; VEX-NEXT: .LBB39_8:
; VEX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
; VEX-NEXT: retq ; VEX-NEXT: retq
; ;
; AVX512F-LABEL: uitofp_2i64_to_4f32: ; AVX512F-LABEL: uitofp_2i64_to_4f32:
; AVX512F: # %bb.0: ; AVX512F: # %bb.0:
; AVX512F-NEXT: vpextrq $1, %xmm0, %rax ; AVX512F-NEXT: vpextrq $1, %xmm0, %rax
; AVX512F-NEXT: vcvtusi2ss %rax, %xmm1, %xmm1 ; AVX512F-NEXT: vcvtusi2ss %rax, %xmm1, %xmm1
; AVX512F-NEXT: vmovq %xmm0, %rax ; AVX512F-NEXT: vmovq %xmm0, %rax
; AVX512F-NEXT: vcvtusi2ss %rax, %xmm2, %xmm0 ; AVX512F-NEXT: vcvtusi2ss %rax, %xmm2, %xmm0
; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] ; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
; AVX512F-NEXT: vcvtusi2ss %rax, %xmm2, %xmm1
; AVX512F-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
; AVX512F-NEXT: retq ; AVX512F-NEXT: retq
; ;
; AVX512VL-LABEL: uitofp_2i64_to_4f32: ; AVX512VL-LABEL: uitofp_2i64_to_4f32:
; AVX512VL: # %bb.0: ; AVX512VL: # %bb.0:
; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax ; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax
; AVX512VL-NEXT: vcvtusi2ss %rax, %xmm1, %xmm1 ; AVX512VL-NEXT: vcvtusi2ss %rax, %xmm1, %xmm1
; AVX512VL-NEXT: vmovq %xmm0, %rax ; AVX512VL-NEXT: vmovq %xmm0, %rax
; AVX512VL-NEXT: vcvtusi2ss %rax, %xmm2, %xmm0 ; AVX512VL-NEXT: vcvtusi2ss %rax, %xmm2, %xmm0
; AVX512VL-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] ; AVX512VL-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; AVX512VL-NEXT: vcvtusi2ss %rax, %xmm2, %xmm1 ; AVX512VL-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
; AVX512VL-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
; AVX512VL-NEXT: retq ; AVX512VL-NEXT: retq
; ;
; AVX512DQ-LABEL: uitofp_2i64_to_4f32: ; AVX512DQ-LABEL: uitofp_2i64_to_4f32:
; AVX512DQ: # %bb.0: ; AVX512DQ: # %bb.0:
; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 ; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
; AVX512DQ-NEXT: vcvtuqq2ps %zmm0, %ymm0 ; AVX512DQ-NEXT: vcvtuqq2ps %zmm0, %ymm0
; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 ; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
; AVX512DQ-NEXT: vzeroupper ; AVX512DQ-NEXT: vzeroupper
▲ Show 20 Lines • Show All 153 Lines • ▼ Show 20 Lines; AVX512VLDQ-NEXT: retq
%cvt = uitofp <2 x i64> %a to <2 x float> %cvt = uitofp <2 x i64> %a to <2 x float>
%ext = shufflevector <2 x float> %cvt, <2 x float> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 3> %ext = shufflevector <2 x float> %cvt, <2 x float> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
ret <4 x float> %ext ret <4 x float> %ext
} }
define <4 x float> @uitofp_4i64_to_4f32_undef(<2 x i64> %a) { define <4 x float> @uitofp_4i64_to_4f32_undef(<2 x i64> %a) {
; SSE2-LABEL: uitofp_4i64_to_4f32_undef: ; SSE2-LABEL: uitofp_4i64_to_4f32_undef:
; SSE2: # %bb.0: ; SSE2: # %bb.0:
; SSE2-NEXT: movdqa %xmm0, %xmm1
; SSE2-NEXT: movq %xmm0, %rax ; SSE2-NEXT: movq %xmm0, %rax
; SSE2-NEXT: testq %rax, %rax ; SSE2-NEXT: testq %rax, %rax
; SSE2-NEXT: js .LBB41_1 ; SSE2-NEXT: js .LBB41_1
; SSE2-NEXT: # %bb.2: ; SSE2-NEXT: # %bb.2:
; SSE2-NEXT: xorps %xmm0, %xmm0 ; SSE2-NEXT: cvtsi2ss %rax, %xmm1
; SSE2-NEXT: cvtsi2ss %rax, %xmm0
; SSE2-NEXT: jmp .LBB41_3 ; SSE2-NEXT: jmp .LBB41_3
; SSE2-NEXT: .LBB41_1: ; SSE2-NEXT: .LBB41_1:
; SSE2-NEXT: movq %rax, %rcx ; SSE2-NEXT: movq %rax, %rcx
; SSE2-NEXT: shrq %rcx ; SSE2-NEXT: shrq %rcx
; SSE2-NEXT: andl $1, %eax ; SSE2-NEXT: andl $1, %eax
; SSE2-NEXT: orq %rcx, %rax ; SSE2-NEXT: orq %rcx, %rax
; SSE2-NEXT: xorps %xmm0, %xmm0 ; SSE2-NEXT: cvtsi2ss %rax, %xmm1
; SSE2-NEXT: cvtsi2ss %rax, %xmm0 ; SSE2-NEXT: addss %xmm1, %xmm1
; SSE2-NEXT: addss %xmm0, %xmm0
; SSE2-NEXT: .LBB41_3: ; SSE2-NEXT: .LBB41_3:
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; SSE2-NEXT: movq %xmm1, %rax ; SSE2-NEXT: movq %xmm0, %rax
; SSE2-NEXT: testq %rax, %rax ; SSE2-NEXT: testq %rax, %rax
; SSE2-NEXT: js .LBB41_4 ; SSE2-NEXT: js .LBB41_4
; SSE2-NEXT: # %bb.5: ; SSE2-NEXT: # %bb.5:
; SSE2-NEXT: xorps %xmm1, %xmm1 ; SSE2-NEXT: xorps %xmm0, %xmm0
; SSE2-NEXT: cvtsi2ss %rax, %xmm1 ; SSE2-NEXT: cvtsi2ss %rax, %xmm0
; SSE2-NEXT: jmp .LBB41_6 ; SSE2-NEXT: jmp .LBB41_6
; SSE2-NEXT: .LBB41_4: ; SSE2-NEXT: .LBB41_4:
; SSE2-NEXT: movq %rax, %rcx ; SSE2-NEXT: movq %rax, %rcx
; SSE2-NEXT: shrq %rcx ; SSE2-NEXT: shrq %rcx
; SSE2-NEXT: andl $1, %eax ; SSE2-NEXT: andl $1, %eax
; SSE2-NEXT: orq %rcx, %rax ; SSE2-NEXT: orq %rcx, %rax
; SSE2-NEXT: xorps %xmm1, %xmm1 ; SSE2-NEXT: xorps %xmm0, %xmm0
; SSE2-NEXT: cvtsi2ss %rax, %xmm1 ; SSE2-NEXT: cvtsi2ss %rax, %xmm0
; SSE2-NEXT: addss %xmm1, %xmm1 ; SSE2-NEXT: addss %xmm0, %xmm0
; SSE2-NEXT: .LBB41_6: ; SSE2-NEXT: .LBB41_6:
; SSE2-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] ; SSE2-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
; SSE2-NEXT: testq %rax, %rax ; SSE2-NEXT: movq {{.*#+}} xmm0 = xmm1[0],zero
; SSE2-NEXT: xorps %xmm1, %xmm1
; SSE2-NEXT: js .LBB41_8
; SSE2-NEXT: # %bb.7:
; SSE2-NEXT: xorps %xmm1, %xmm1
; SSE2-NEXT: cvtsi2ss %rax, %xmm1
; SSE2-NEXT: .LBB41_8:
; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
; SSE2-NEXT: retq ; SSE2-NEXT: retq
; ;
; SSE41-LABEL: uitofp_4i64_to_4f32_undef: ; SSE41-LABEL: uitofp_4i64_to_4f32_undef:
; SSE41: # %bb.0: ; SSE41: # %bb.0:
; SSE41-NEXT: pextrq $1, %xmm0, %rax ; SSE41-NEXT: pextrq $1, %xmm0, %rax
; SSE41-NEXT: testq %rax, %rax ; SSE41-NEXT: testq %rax, %rax
; SSE41-NEXT: js .LBB41_1 ; SSE41-NEXT: js .LBB41_1
; SSE41-NEXT: # %bb.2: ; SSE41-NEXT: # %bb.2:
; SSE41-NEXT: cvtsi2ss %rax, %xmm1 ; SSE41-NEXT: cvtsi2ss %rax, %xmm1
; SSE41-NEXT: jmp .LBB41_3 ; SSE41-NEXT: jmp .LBB41_3
; SSE41-NEXT: .LBB41_1: ; SSE41-NEXT: .LBB41_1:
; SSE41-NEXT: movq %rax, %rcx ; SSE41-NEXT: movq %rax, %rcx
; SSE41-NEXT: shrq %rcx ; SSE41-NEXT: shrq %rcx
; SSE41-NEXT: andl $1, %eax ; SSE41-NEXT: andl $1, %eax
; SSE41-NEXT: orq %rcx, %rax ; SSE41-NEXT: orq %rcx, %rax
; SSE41-NEXT: cvtsi2ss %rax, %xmm1 ; SSE41-NEXT: cvtsi2ss %rax, %xmm1
; SSE41-NEXT: addss %xmm1, %xmm1 ; SSE41-NEXT: addss %xmm1, %xmm1
; SSE41-NEXT: .LBB41_3: ; SSE41-NEXT: .LBB41_3:
; SSE41-NEXT: movq %xmm0, %rax ; SSE41-NEXT: movq %xmm0, %rax
; SSE41-NEXT: testq %rax, %rax ; SSE41-NEXT: testq %rax, %rax
; SSE41-NEXT: js .LBB41_4 ; SSE41-NEXT: js .LBB41_4
; SSE41-NEXT: # %bb.5: ; SSE41-NEXT: # %bb.5:
; SSE41-NEXT: xorps %xmm0, %xmm0 ; SSE41-NEXT: xorps %xmm0, %xmm0
; SSE41-NEXT: cvtsi2ss %rax, %xmm0 ; SSE41-NEXT: cvtsi2ss %rax, %xmm0
; SSE41-NEXT: jmp .LBB41_6 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
; SSE41-NEXT: retq
; SSE41-NEXT: .LBB41_4: ; SSE41-NEXT: .LBB41_4:
; SSE41-NEXT: movq %rax, %rcx ; SSE41-NEXT: movq %rax, %rcx
; SSE41-NEXT: shrq %rcx ; SSE41-NEXT: shrq %rcx
; SSE41-NEXT: andl $1, %eax ; SSE41-NEXT: andl $1, %eax
; SSE41-NEXT: orq %rcx, %rax ; SSE41-NEXT: orq %rcx, %rax
; SSE41-NEXT: xorps %xmm0, %xmm0 ; SSE41-NEXT: xorps %xmm0, %xmm0
; SSE41-NEXT: cvtsi2ss %rax, %xmm0 ; SSE41-NEXT: cvtsi2ss %rax, %xmm0
; SSE41-NEXT: addss %xmm0, %xmm0 ; SSE41-NEXT: addss %xmm0, %xmm0
; SSE41-NEXT: .LBB41_6: ; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3]
; SSE41-NEXT: testq %rax, %rax
; SSE41-NEXT: xorps %xmm1, %xmm1
; SSE41-NEXT: js .LBB41_8
; SSE41-NEXT: # %bb.7:
; SSE41-NEXT: xorps %xmm1, %xmm1
; SSE41-NEXT: cvtsi2ss %rax, %xmm1
; SSE41-NEXT: .LBB41_8:
; SSE41-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
; SSE41-NEXT: retq ; SSE41-NEXT: retq
; ;
; VEX-LABEL: uitofp_4i64_to_4f32_undef: ; VEX-LABEL: uitofp_4i64_to_4f32_undef:
; VEX: # %bb.0: ; VEX: # %bb.0:
; VEX-NEXT: vpextrq $1, %xmm0, %rax ; VEX-NEXT: vpextrq $1, %xmm0, %rax
; VEX-NEXT: testq %rax, %rax ; VEX-NEXT: testq %rax, %rax
; VEX-NEXT: js .LBB41_1 ; VEX-NEXT: js .LBB41_1
; VEX-NEXT: # %bb.2: ; VEX-NEXT: # %bb.2:
; VEX-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1 ; VEX-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1
; VEX-NEXT: jmp .LBB41_3 ; VEX-NEXT: jmp .LBB41_3
; VEX-NEXT: .LBB41_1: ; VEX-NEXT: .LBB41_1:
; VEX-NEXT: movq %rax, %rcx ; VEX-NEXT: movq %rax, %rcx
; VEX-NEXT: shrq %rcx ; VEX-NEXT: shrq %rcx
; VEX-NEXT: andl $1, %eax ; VEX-NEXT: andl $1, %eax
; VEX-NEXT: orq %rcx, %rax ; VEX-NEXT: orq %rcx, %rax
; VEX-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1 ; VEX-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1
; VEX-NEXT: vaddss %xmm1, %xmm1, %xmm1 ; VEX-NEXT: vaddss %xmm1, %xmm1, %xmm1
; VEX-NEXT: .LBB41_3: ; VEX-NEXT: .LBB41_3:
; VEX-NEXT: vmovq %xmm0, %rax ; VEX-NEXT: vmovq %xmm0, %rax
; VEX-NEXT: testq %rax, %rax ; VEX-NEXT: testq %rax, %rax
; VEX-NEXT: js .LBB41_4 ; VEX-NEXT: js .LBB41_4
; VEX-NEXT: # %bb.5: ; VEX-NEXT: # %bb.5:
; VEX-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0 ; VEX-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0
; VEX-NEXT: jmp .LBB41_6 ; VEX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
; VEX-NEXT: retq
; VEX-NEXT: .LBB41_4: ; VEX-NEXT: .LBB41_4:
; VEX-NEXT: movq %rax, %rcx ; VEX-NEXT: movq %rax, %rcx
; VEX-NEXT: shrq %rcx ; VEX-NEXT: shrq %rcx
; VEX-NEXT: andl $1, %eax ; VEX-NEXT: andl $1, %eax
; VEX-NEXT: orq %rcx, %rax ; VEX-NEXT: orq %rcx, %rax
; VEX-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0 ; VEX-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0
; VEX-NEXT: vaddss %xmm0, %xmm0, %xmm0 ; VEX-NEXT: vaddss %xmm0, %xmm0, %xmm0
; VEX-NEXT: .LBB41_6: ; VEX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
; VEX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3]
; VEX-NEXT: testq %rax, %rax
; VEX-NEXT: vxorps %xmm1, %xmm1, %xmm1
; VEX-NEXT: js .LBB41_8
; VEX-NEXT: # %bb.7:
; VEX-NEXT: vcvtsi2ss %rax, %xmm2, %xmm1
; VEX-NEXT: .LBB41_8:
; VEX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
; VEX-NEXT: retq ; VEX-NEXT: retq
; ;
; AVX512F-LABEL: uitofp_4i64_to_4f32_undef: ; AVX512F-LABEL: uitofp_4i64_to_4f32_undef:
; AVX512F: # %bb.0: ; AVX512F: # %bb.0:
; AVX512F-NEXT: vpextrq $1, %xmm0, %rax ; AVX512F-NEXT: vpextrq $1, %xmm0, %rax
; AVX512F-NEXT: vcvtusi2ss %rax, %xmm1, %xmm1 ; AVX512F-NEXT: vcvtusi2ss %rax, %xmm1, %xmm1
; AVX512F-NEXT: vmovq %xmm0, %rax ; AVX512F-NEXT: vmovq %xmm0, %rax
; AVX512F-NEXT: vcvtusi2ss %rax, %xmm2, %xmm0 ; AVX512F-NEXT: vcvtusi2ss %rax, %xmm2, %xmm0
; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] ; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
; AVX512F-NEXT: vcvtusi2ss %rax, %xmm2, %xmm1
; AVX512F-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
; AVX512F-NEXT: retq ; AVX512F-NEXT: retq
; ;
; AVX512VL-LABEL: uitofp_4i64_to_4f32_undef: ; AVX512VL-LABEL: uitofp_4i64_to_4f32_undef:
; AVX512VL: # %bb.0: ; AVX512VL: # %bb.0:
; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax ; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax
; AVX512VL-NEXT: vcvtusi2ss %rax, %xmm1, %xmm1 ; AVX512VL-NEXT: vcvtusi2ss %rax, %xmm1, %xmm1
; AVX512VL-NEXT: vmovq %xmm0, %rax ; AVX512VL-NEXT: vmovq %xmm0, %rax
; AVX512VL-NEXT: vcvtusi2ss %rax, %xmm2, %xmm0 ; AVX512VL-NEXT: vcvtusi2ss %rax, %xmm2, %xmm0
; AVX512VL-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] ; AVX512VL-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; AVX512VL-NEXT: vcvtusi2ss %rax, %xmm2, %xmm1 ; AVX512VL-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
; AVX512VL-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
; AVX512VL-NEXT: retq ; AVX512VL-NEXT: retq
; ;
; AVX512DQ-LABEL: uitofp_4i64_to_4f32_undef: ; AVX512DQ-LABEL: uitofp_4i64_to_4f32_undef:
; AVX512DQ: # %bb.0: ; AVX512DQ: # %bb.0:
; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 ; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
; AVX512DQ-NEXT: vcvtuqq2ps %zmm0, %ymm0 ; AVX512DQ-NEXT: vcvtuqq2ps %zmm0, %ymm0
; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 ; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
; AVX512DQ-NEXT: vzeroupper ; AVX512DQ-NEXT: vzeroupper
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