[MIR-Canon] Add support for rewriting VRegs that are typed but don't have an RC.

[plotfi]

Summary

So it appears that in a lot of cases before registerbanks are selected, we dont have Register classes and MIR-Canon is crashing. This attempts to fix this by creating new override registers that use the generic type rather than the register class.

[compnerd]

llvm/lib/CodeGen/MIRCanonicalizerPass.cpp

320

I think that the do is superfluous

325

I think that this can just be return MRI.getRegClassOrNull(VReg0) || MRI.getType(VReg0) == MRI.getType(VReg1);

519

Why not sink the get into the conditional?

if (auto RC = MRI.getRegClassOrNull(VReg))
  return MRI.createVirtualRegister(RC, OS.str());

[bogner]

lgtm once you've addressed compnerd's comments

[plotfi]

Going to leave out the vregTypesMatch part as that changes some of the behavior in a way that causes llvm/test/CodeGen/MIR/AMDGPU/mir-canon-multi.mir to fail, and I'd like to understand why that is happening. But for now this change makes the cursor create vregs based on the vreg type if there is no register class to base off of.

llvm/lib/CodeGen/MIRCanonicalizerPass.cpp

LLVM_DEBUG(
       dbgs() << "Rescheduling Idempotent Instructions Lexographically.";);
   Changed |= rescheduleLexographically(
       PseudoIdempotentInstructions, MBB,
       [&]() -> MachineBasicBlock::iterator { return MBB->begin(); });
 
   return Changed;
 }
 
 static bool propagateLocalCopies(MachineBasicBlock *MBB) {
   bool Changed = false;
   MachineRegisterInfo &MRI = MBB->getParent()->getRegInfo();
 
   std::vector<MachineInstr *> Copies;
   for (MachineInstr &MI : MBB->instrs()) {
     if (MI.isCopy())
       Copies.push_back(&MI);
   }
 
   for (MachineInstr *MI : Copies) {
 
     if (!MI->getOperand(0).isReg())
       continue;
public:
 
   unsigned getVirtualVReg() const { return virtualVRegNumber; }
 
   unsigned incrementVirtualVReg(unsigned incr = 1) {
     virtualVRegNumber += incr;
     return virtualVRegNumber;
   }
 
-  unsigned createVirtualRegister(const TargetRegisterClass *RC) {
+  unsigned createVirtualRegister(unsigned VReg) {
     std::string S;
     raw_string_ostream OS(S);
     OS << "namedVReg" << (virtualVRegNumber & ~0x80000000);
     OS.flush();
     virtualVRegNumber++;
-
+    if (auto RC = MRI.getRegClassOrNull(VReg))
       return MRI.createVirtualRegister(RC, OS.str());
+    return MRI.createGenericVirtualRegister(MRI.getType(VReg), OS.str());
   }
 };
 } // namespace
 
 static std::map<unsigned, unsigned>
 GetVRegRenameMap(const std::vector<TypedVReg> &VRegs,
                  const std::vector<unsigned> &renamedInOtherBB,
                  MachineRegisterInfo &MRI, NamedVRegCursor &NVC) {
   std::map<unsigned, unsigned> VRegRenameMap;
   bool FirstCandidate = true;
 
   for (auto &vreg : VRegs) {
     if (vreg.isFrameIndex()) {
       // We skip one vreg for any frame index because there is a good chance
       // (especially when comparing SelectionDAG to GlobalISel generated MIR)
       // that in the other file we are just getting an incoming vreg that comes
for (auto &vreg : VRegs) {
 
     auto Reg = vreg.getReg();
     if (llvm::find(renamedInOtherBB, Reg) != renamedInOtherBB.end()) {
       LLVM_DEBUG(dbgs() << "Vreg " << Reg
                         << " already renamed in other BB.\n";);
       continue;
     }
 
-    auto Rename = NVC.createVirtualRegister(MRI.getRegClass(Reg));
+    auto Rename = NVC.createVirtualRegister(Reg);
 
     if (VRegRenameMap.find(Reg) == VRegRenameMap.end()) {
       LLVM_DEBUG(dbgs() << "Mapping vreg ";);
       if (MRI.reg_begin(Reg) != MRI.reg_end()) {
         LLVM_DEBUG(auto foo = &*MRI.reg_begin(Reg); foo->dump(););
       } else {
         LLVM_DEBUG(dbgs() << Reg;);
       }
static bool runOnBasicBlock(MachineBasicBlock *MBB,
   // named vregs instead.
   NVC.SkipVRegs();
 
   auto MII = MBB->begin();
   for (unsigned i = 0; i < IdempotentInstCount && MII != MBB->end(); ++i) {
     MachineInstr &MI = *MII++;
     Changed = true;
     unsigned vRegToRename = MI.getOperand(0).getReg();
-    auto Rename = NVC.createVirtualRegister(MRI.getRegClass(vRegToRename));
+    auto Rename = NVC.createVirtualRegister(vRegToRename);
 
     std::vector<MachineOperand *> RenameMOs;
     for (auto &MO : MRI.reg_operands(vRegToRename)) {
       RenameMOs.push_back(&MO);
     }
 
     for (auto *MO : RenameMOs) {
       MO->setReg(Rename);

llvm/test/CodeGen/MIR/AArch64/addrspace-memoperands.mir

 # RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass none -o - %s | FileCheck %s
+# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass mir-canonicalizer -o - %s
 
 --- |
 
   define void @addrspace_memoperands() {
     ret void
   }
 
 ...