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[ARM64][AArch64] Update disassembler attributes to ARMv8.5 ISA with SVE extensions
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Authored by omjavaid on May 22 2019, 12:19 AM.

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Summary

This patch updates assembler attributes for AArch64 targets so we can disassemble newer instructions supported in ISA version 8.5 and SVE extensions.

This revision is now accepted and ready to land.May 22 2019, 1:10 AM

This revision was automatically updated to reflect the committed changes.

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source/

Plugins/

Disassembler/

llvm/

6 lines

Show First 20 Lines • Show All 1,182 Lines • ▼ Show 20 Lines	if (arch.IsMIPS()) {
if (arch_flags & ArchSpec::eMIPSAse_msa)		if (arch_flags & ArchSpec::eMIPSAse_msa)
features_str += "+msa,";		features_str += "+msa,";
if (arch_flags & ArchSpec::eMIPSAse_dsp)		if (arch_flags & ArchSpec::eMIPSAse_dsp)
features_str += "+dsp,";		features_str += "+dsp,";
if (arch_flags & ArchSpec::eMIPSAse_dspr2)		if (arch_flags & ArchSpec::eMIPSAse_dspr2)
features_str += "+dspr2,";		features_str += "+dspr2,";
}		}

// If any AArch64 variant, enable the ARMv8.2 ISA extensions so we can		// If any AArch64 variant, enable the ARMv8.5 ISA with SVE extensions so we
// disassemble newer instructions.		// can disassemble newer instructions.
if (triple.getArch() == llvm::Triple::aarch64)		if (triple.getArch() == llvm::Triple::aarch64)
features_str += "+v8.2a";		features_str += "+v8.5a,+sve2";

if (triple.getArch() == llvm::Triple::aarch64		if (triple.getArch() == llvm::Triple::aarch64
&& triple.getVendor() == llvm::Triple::Apple) {		&& triple.getVendor() == llvm::Triple::Apple) {
cpu = "apple-latest";		cpu = "apple-latest";
}		}

// We use m_disasm_up.get() to tell whether we are valid or not, so if this		// We use m_disasm_up.get() to tell whether we are valid or not, so if this
// isn't good for some reason, we won't be valid and FindPlugin will fail and		// isn't good for some reason, we won't be valid and FindPlugin will fail and
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