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[ARM64][AArch64] Update disassembler attributes to ARMv8.5 ISA with S…
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…VE extensions

This patch updates assembler attributes for AArch64 targets so we can disassemble newer instructions supported in ISA version 8.5 and SVE extensions.

Differential Revision: https://reviews.llvm.org/D62235

llvm-svn: 361451
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omjavaid committed May 23, 2019
1 parent ada9d2d commit 772176d
Showing 1 changed file with 3 additions and 3 deletions.
6 changes: 3 additions & 3 deletions lldb/source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp
Original file line number Diff line number Diff line change
@@ -1188,10 +1188,10 @@ DisassemblerLLVMC::DisassemblerLLVMC(const ArchSpec &arch,
features_str += "+dspr2,";
}

// If any AArch64 variant, enable the ARMv8.2 ISA extensions so we can
// disassemble newer instructions.
// If any AArch64 variant, enable the ARMv8.5 ISA with SVE extensions so we
// can disassemble newer instructions.
if (triple.getArch() == llvm::Triple::aarch64)
features_str += "+v8.2a";
features_str += "+v8.5a,+sve2";

if (triple.getArch() == llvm::Triple::aarch64
&& triple.getVendor() == llvm::Triple::Apple) {

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