This is an archive of the discontinued LLVM Phabricator instance.

[mips] MIPS-I Branch on Coprocessor 3 Instructions
Needs RevisionPublic

Authored by ipetkovic on Nov 5 2014, 2:14 AM.

Details

Summary

This patch adds support for the BC3F and BC3T MIPS-I instructions. Besides the support, corresponding assembler and dissasembler tests are also added.

Diff Detail

Event Timeline

ipetkovic updated this revision to Diff 15802.Nov 5 2014, 2:14 AM
ipetkovic retitled this revision from to [mips] MIPS-I Branch on Coprocessor 3 Instructions.
ipetkovic updated this object.
ipetkovic edited the test plan for this revision. (Show Details)
ipetkovic added a subscriber: petarj.
dsanders accepted this revision.Nov 5 2014, 7:35 AM
dsanders edited edge metadata.

LGTM

lib/Target/Mips/MipsInstrFPU.td
537

Nit: Blank line

This revision is now accepted and ready to land.Nov 5 2014, 7:35 AM
ipetkovic updated this revision to Diff 15811.Nov 5 2014, 8:12 AM
ipetkovic edited edge metadata.

Unnecessary blank line removed.

seanbruno requested changes to this revision.Sep 26 2016, 7:08 AM
seanbruno added a reviewer: seanbruno.
seanbruno added a subscriber: seanbruno.

This looks like it needs to be refreshed against Trunk before its committed.

This revision now requires changes to proceed.Sep 26 2016, 7:08 AM
dsanders resigned from this revision.Jul 18 2019, 7:03 PM