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[AArch64] Add support for MTE intrinsics
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Authored by javed.absar on Apr 9 2019, 1:59 PM.

Details

Summary

This patch provides intrinsics support for Memory Tagging Extension (MTE),
which was introduced with the Armv8.5-a architecture.
This is llvm patch. The corresponding clang patch is: https://reviews.llvm.org/D60485

These intrinsics are available when __ARM_FEATURE_MEMORY_TAGGING is defined.
Each intrinsic is described in detail in the latest ACLE Q1 2019 documentation:

https://developer.arm.com/docs/101028/latest

However, below we also list the intrinsics:

  1. T* __arm_mte_create_random_tag(T* src, uint64_t mask); This intrinsic returns a pointer containing a randomly created logical address tag.
  2. T* __arm_mte_increment_tag(T* src, unsigned offset); This intrinsic returns a pointer which is a copy of the input pointer src but with the logical address tag part offset by a specified offset value.
  3. uint64_t __arm_mte_exclude_tag(T* src, uint64_t excluded); This intrinsic adds a logical tag to the set of excluded logical tags.
  4. void __arm_mte_set_tag(T* tag_address); This intrinsic stores an allocation tag, computed from the logical tag, to the tag memory thereby setting the allocation tag for the 16-byte granule of memory.
  5. T* __arm_mte_get_tag(T* address); This intrinsic loads the allocation tag from tag memory and returns the corresponding logical tag as part of the returned pointer value.
  6. ptrdiff_t __arm_mte_ptrdiff(T* a, T* b); The intrinsic calculates the difference between the address parts of the two pointers, ignoring the tags.

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javed.absar created this revision.Apr 9 2019, 1:59 PM

One nit otherwise LGTM.

include/llvm/IR/IntrinsicsAArch64.td
690 ↗(On Diff #194393)

Remove this.

Fixed as suggested

DavidSpickett accepted this revision.Apr 15 2019, 2:42 AM
This revision is now accepted and ready to land.Apr 15 2019, 2:42 AM
This revision was automatically updated to reflect the committed changes.
Herald added a project: Restricted Project. · View Herald TranscriptApr 23 2019, 2:38 AM
eugenis added a subscriber: eugenis.Jul 2 2019, 2:20 PM
eugenis added inline comments.
llvm/trunk/include/llvm/IR/IntrinsicsAArch64.td
692

Sorry for such a late question.
Why is IRG not IntrNoMem? Does this model the fact that it updates the internal state of the RNG in the CPU?

It is not covered by tests.

chill added a subscriber: chill.Jul 9 2019, 1:31 AM
chill added inline comments.
llvm/trunk/include/llvm/IR/IntrinsicsAArch64.td
692

IntrNoMem would be incorrect, as that means also no side effects whatsoever, and IRG potentially has side effects.
On the other hand it, in fact does not modify memory, so IntrInaccessibleMemOnly is pessimistic and I can't see how being pessimistic in this case ensures correctness (the only good reason for being pessimistic IMHO).
The spot on attribute would be IntrHasSideEffects.

chill added inline comments.Jul 9 2019, 1:32 AM
llvm/trunk/test/CodeGen/AArch64/arm64-mte.ll
12

IRG is mentioned here.

eugenis added inline comments.Jul 9 2019, 2:20 PM
llvm/trunk/include/llvm/IR/IntrinsicsAArch64.td
692

Sounds good, I can prepare a change.

llvm/trunk/test/CodeGen/AArch64/arm64-mte.ll
12

What I meant is, there are no tests that notice the change in the intrinsic attribute.