[GlobalISel] Add IRTranslator support for llvm.stacksave and llvm.stackrestore

[paquette]

Summary

Also update arm64-irtranslator.ll.

[aemerson]

LGTM.

llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp

case Intrinsic::stackprotector: {
     MIRBuilder.buildStore(
         GuardVal, getOrCreateVReg(*Slot),
         *MF->getMachineMemOperand(MachinePointerInfo::getFixedStack(*MF, FI),
                                   MachineMemOperand::MOStore |
                                       MachineMemOperand::MOVolatile,
                                   PtrTy.getSizeInBits() / 8, 8));
     return true;
   }
+  case Intrinsic::stacksave: {
+    // Save the stack pointer to the location provided by the intrinsic.
+    unsigned Reg = getOrCreateVReg(CI);
+    unsigned StackPtr = MF->getSubtarget()
+                            .getTargetLowering()
+                            ->getStackPointerRegisterToSaveRestore();
+
+    // If the target doesn't specify a stack pointer, then fall back.
+    if (!StackPtr)
+      return false;
+
+    MIRBuilder.buildCopy(Reg, StackPtr);
+    return true;
+  }
+  case Intrinsic::stackrestore: {
+    // Restore the stack pointer from the location provided by the intrinsic.
+    unsigned Reg = getOrCreateVReg(*CI.getArgOperand(0));
+    unsigned StackPtr = MF->getSubtarget()
+                            .getTargetLowering()
+                            ->getStackPointerRegisterToSaveRestore();
+
+    // If the target doesn't specify a stack pointer, then fall back.
+    if (!StackPtr)
+      return false;
+
+    MIRBuilder.buildCopy(StackPtr, Reg);
+    return true;
+  }
   case Intrinsic::cttz:
   case Intrinsic::ctlz: {
     ConstantInt *Cst = cast<ConstantInt>(CI.getArgOperand(1));
     bool isTrailing = ID == Intrinsic::cttz;
     unsigned Opcode = isTrailing
                           ? Cst->isZero() ? TargetOpcode::G_CTTZ
                                           : TargetOpcode::G_CTTZ_ZERO_UNDEF
                           : Cst->isZero() ? TargetOpcode::G_CTLZ

llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll

 define void @test_i1_arg_zext(void (i1)* %f) {
 ; CHECK-LABEL: name: test_i1_arg_zext
 ; CHECK: [[I1:%[0-9]+]]:_(s1) = G_CONSTANT i1 true
 ; CHECK: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[I1]](s1)
 ; CHECK: $w0 = COPY [[ZEXT]](s32)
   call void %f(i1 true)
   ret void
 }
+
+declare i8* @llvm.stacksave()
+declare void @llvm.stackrestore(i8*)
+define void @test_stacksaverestore() {
+  ; CHECK-LABEL: name: test_stacksaverestore
+  ; CHECK: [[SAVE:%[0-9]+]]:_(p0) = COPY $sp
+  ; CHECK-NEXT: $sp = COPY [[SAVE]](p0)
+  ; CHECK-NEXT: RET_ReallyLR
+  %sp = call i8* @llvm.stacksave()
+  call void @llvm.stackrestore(i8* %sp)
+  ret void
+}