[lldb] [Process/elf-core] Support aarch64 NetBSD core dumps

[mgorny]

Summary

Include support for NetBSD core dumps from evbarm/aarch64 system,
and matching test cases for them.

Based on earlier work by Kamil Rytarowski.

[krytarowski]

lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp

683

I would move it above x86_64 for sorting reasons.

[krytarowski]

lldb/packages/Python/lldbsuite/test/functionalities/postmortem/netbsd-core/TestNetBSDCore.py

241

I would move it above X86.

[mgorny]

Reordered as requested.

lldb/packages/Python/lldbsuite/test/functionalities/postmortem/netbsd-core/TestNetBSDCore.py

def check_stack(self, process, pid, filename):
         self.assertTrue(thread)
         self.assertEqual(thread.GetThreadID(), 1)
         self.assertEqual(thread.GetStopReason(), lldb.eStopReasonSignal)
         self.assertEqual(thread.GetStopReasonDataCount(), 1)
         self.assertEqual(thread.GetStopReasonDataAtIndex(0), signal.SIGSEGV)
         backtrace = ["bar", "foo", "main"]
         self.check_backtrace(thread, filename, backtrace)
 
+    @skipIfLLVMTargetMissing("AArch64")
+    def test_aarch64(self):
+        """Test single-threaded aarch64 core dump."""
+        self.do_test("1lwp_SIGSEGV.aarch64", pid=8339, region_count=32)
+
     @skipIfLLVMTargetMissing("X86")
     def test_amd64(self):
         """Test single-threaded amd64 core dump."""
         self.do_test("1lwp_SIGSEGV.amd64", pid=693, region_count=21)
 
 
 class NetBSD2LWPT2CoreTestCase(NetBSDCoreCommonTestCase):
     THREAD_COUNT = 2
def check_stack(self, process, pid, filename):
         self.check_backtrace(thread, filename, backtrace)
 
         # thread 1 should have no signal
         thread = process.GetThreadByID(1)
         self.assertEqual(thread.GetStopReason(), lldb.eStopReasonSignal)
         self.assertEqual(thread.GetStopReasonDataCount(), 1)
         self.assertEqual(thread.GetStopReasonDataAtIndex(0), 0)
 
+    @skipIfLLVMTargetMissing("AArch64")
+    def test_aarch64(self):
+        """Test double-threaded aarch64 core dump where thread 2 is signalled."""
+        self.do_test("2lwp_t2_SIGSEGV.aarch64", pid=14142, region_count=31)
+
     @skipIfLLVMTargetMissing("X86")
     def test_amd64(self):
         """Test double-threaded amd64 core dump where thread 2 is signalled."""
         self.do_test("2lwp_t2_SIGSEGV.amd64", pid=622, region_count=24)
 
 
 class NetBSD2LWPProcessSigCoreTestCase(NetBSDCoreCommonTestCase):
     THREAD_COUNT = 2
def check_stack(self, process, pid, filename):
         self.check_backtrace(thread, filename, backtrace)
 
         # thread 1 should have the same signal
         thread = process.GetThreadByID(1)
         self.assertEqual(thread.GetStopReason(), lldb.eStopReasonSignal)
         self.assertEqual(thread.GetStopReasonDataCount(), 1)
         self.assertEqual(thread.GetStopReasonDataAtIndex(0), signal.SIGSEGV)
 
+    @skipIfLLVMTargetMissing("AArch64")
+    def test_aarch64(self):
+        """Test double-threaded aarch64 core dump where process is signalled."""
+        self.do_test("2lwp_process_SIGSEGV.aarch64", pid=1403, region_count=30)
+
     @skipIfLLVMTargetMissing("X86")
     def test_amd64(self):
         """Test double-threaded amd64 core dump where process is signalled."""
         self.do_test("2lwp_process_SIGSEGV.amd64", pid=665, region_count=24)

lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp

if (name == "NetBSD-CORE") {
       lldb::tid_t tid;
       if (name.getAsInteger(10, tid))
         return llvm::make_error<llvm::StringError>(
             "Error parsing NetBSD core(5) notes: Cannot convert LWP ID "
             "to integer",
             llvm::inconvertibleErrorCode());
 
       switch (GetArchitecture().GetMachine()) {
+      case llvm::Triple::aarch64: {
+        // Assume order PT_GETREGS, PT_GETFPREGS
+        if (note.info.n_type == NETBSD::AARCH64::NT_REGS) {
+          // If this is the next thread, push the previous one first.
+          if (had_nt_regs) {
+            m_thread_data.push_back(thread_data);
+            thread_data = ThreadData();
+            had_nt_regs = false;
+          }
+
+          thread_data.gpregset = note.data;
+          thread_data.tid = tid;
+          if (thread_data.gpregset.GetByteSize() == 0)
+            return llvm::make_error<llvm::StringError>(
+                "Could not find general purpose registers note in core file.",
+                llvm::inconvertibleErrorCode());
+          had_nt_regs = true;
+        } else if (note.info.n_type == NETBSD::AARCH64::NT_FPREGS) {
+          if (!had_nt_regs || tid != thread_data.tid)
+            return llvm::make_error<llvm::StringError>(
+                "Error parsing NetBSD core(5) notes: Unexpected order "
+                "of NOTEs PT_GETFPREG before PT_GETREG",
+                llvm::inconvertibleErrorCode());
+          thread_data.notes.push_back(note);
+        }
+      } break;
       case llvm::Triple::x86_64: {
         // Assume order PT_GETREGS, PT_GETFPREGS
         if (note.info.n_type == NETBSD::AMD64::NT_REGS) {
           // If this is the next thread, push the previous one first.
           if (had_nt_regs) {
             m_thread_data.push_back(thread_data);
             thread_data = ThreadData();
             had_nt_regs = false;
if (name == "NetBSD-CORE") {
           if (!had_nt_regs || tid != thread_data.tid)
             return llvm::make_error<llvm::StringError>(
                 "Error parsing NetBSD core(5) notes: Unexpected order "
                 "of NOTEs PT_GETFPREG before PT_GETREG",
                 llvm::inconvertibleErrorCode());
           thread_data.notes.push_back(note);
         }
       } break;
       default:
         break;
       }
     }
   }
 
   // Push the last thread.
   if (had_nt_regs)
     m_thread_data.push_back(thread_data);

lldb/source/Plugins/Process/elf-core/RegisterUtilities.h

enum {
   NT_PROCINFO_CPI_RGID_SIZE = 4,
   NT_PROCINFO_CPI_EGID_SIZE = 4,
   NT_PROCINFO_CPI_SVGID_SIZE = 4,
   NT_PROCINFO_CPI_NLWPS_SIZE = 4,
   NT_PROCINFO_CPI_NAME_SIZE = 32,
   NT_PROCINFO_CPI_SIGLWP_SIZE = 4,
 };
 
+namespace AARCH64 {
+enum { NT_REGS = 32, NT_FPREGS = 34 };
+}
+
 namespace AMD64 {
 enum { NT_REGS = 33, NT_FPREGS = 35 };
 }
 
 } // namespace NETBSD
 
 namespace OPENBSD {
 enum {

 
 constexpr RegsetDesc FPR_Desc[] = {
     {llvm::Triple::FreeBSD, llvm::Triple::UnknownArch, FREEBSD::NT_FPREGSET},
     // In a i386 core file NT_FPREGSET is present, but it's not the result
     // of the FXSAVE instruction like in 64 bit files.
     // The result from FXSAVE is in NT_PRXFPREG for i386 core files
     {llvm::Triple::Linux, llvm::Triple::x86, LINUX::NT_PRXFPREG},
     {llvm::Triple::Linux, llvm::Triple::UnknownArch, LINUX::NT_FPREGSET},
+    {llvm::Triple::NetBSD, llvm::Triple::aarch64, NETBSD::AARCH64::NT_FPREGS},
     {llvm::Triple::NetBSD, llvm::Triple::x86_64, NETBSD::AMD64::NT_FPREGS},
     {llvm::Triple::OpenBSD, llvm::Triple::UnknownArch, OPENBSD::NT_FPREGS},
 };
 
 constexpr RegsetDesc PPC_VMX_Desc[] = {
     {llvm::Triple::FreeBSD, llvm::Triple::UnknownArch, FREEBSD::NT_PPC_VMX},
     {llvm::Triple::Linux, llvm::Triple::UnknownArch, LINUX::NT_PPC_VMX},
 };
 
 constexpr RegsetDesc PPC_VSX_Desc[] = {
     {llvm::Triple::Linux, llvm::Triple::UnknownArch, LINUX::NT_PPC_VSX},
 };
 
 } // namespace lldb_private
 
 #endif // #ifndef LLDB_REGISTERUTILITIES_H

lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp

case llvm::Triple::FreeBSD: {
       default:
         break;
       }
       break;
     }
 
     case llvm::Triple::NetBSD: {
       switch (arch.GetMachine()) {
+      case llvm::Triple::aarch64:
+        reg_interface = new RegisterInfoPOSIX_arm64(arch);
+        break;
       case llvm::Triple::x86_64:
         reg_interface = new RegisterContextNetBSD_x86_64(arch);
         break;
       default:
         break;
       }
       break;
     }