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Differential D59818

[x86] avoid cmov in movmsk reduction
ClosedPublic

Authored by spatel on Mar 26 2019, 6:54 AM.

Details

Reviewers
RKSimon
craig.topper
Commits
rG5bbf6f0bd896: [x86] avoid cmov in movmsk reduction
rL357172: [x86] avoid cmov in movmsk reduction
Summary

This is probably the least important of our movmsk problems, but I'm starting at the bottom to reduce distractions.

We were creating a select_cc which bypasses the select and bitmask codegen optimizations that we have now. If we produce a compare+negate instead, we allow things like neg/sbb carry bit hacks, and in all cases we avoid a cmov. There's no partial register update danger in these sequences because we always produce the zero-register xor ahead of the 'set' if needed.

There seems to be a missing fold for sext of a bool bit here:

negl %ecx
movslq %ecx, %rax

...but that's an independent transform.

Diff Detail

Event Timeline

spatel created this revision.Mar 26 2019, 6:54 AM
Herald added a project: Restricted Project. · View Herald TranscriptMar 26 2019, 6:54 AM
Herald added subscribers: jdoerfert, hiraditya, mcrosier. · View Herald Transcript
RKSimon accepted this revision.Mar 28 2019, 4:59 AM

LGTM - but that neg+movslq issue really needs fixing before we forget

This revision is now accepted and ready to land.Mar 28 2019, 4:59 AM
Closed by commit rL357172: [x86] avoid cmov in movmsk reduction (authored by spatel). · Explain WhyMar 28 2019, 7:15 AM
This revision was automatically updated to reflect the committed changes.
spatel mentioned this in rL357178: [DAGCombiner] fold sext into negation.Mar 28 2019, 8:47 AM
spatel mentioned this in rGffa8d3def761: [DAGCombiner] fold sext into negation.
spatel added a comment.Mar 28 2019, 8:50 AM
In D59818#1445817, @RKSimon wrote:

LGTM - but that neg+movslq issue really needs fixing before we forget

rL357178
Might be able to generalize on that, but I matched the negation case since we saw it here.
We also miss this in instcombine...

spatel mentioned this in rL357254: [DAGCombiner] fold sext into decrement.Mar 29 2019, 6:48 AM
spatel mentioned this in rG665a3850357c: [DAGCombiner] fold sext into decrement.

Revision Contents

PathSize
llvm/
lib/
Target/
X86/
40 lines
test/
CodeGen/
X86/
318 lines
252 lines

Diff 192265

llvm/lib/Target/X86/X86ISelLowering.cpp

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 34,282 Lines • ▼ Show 20 Linesstatic SDValue combineHorizontalPredicateResult(SDNode *Extract,
if (Match.getValueType().getVectorNumElements() <= 2) if (Match.getValueType().getVectorNumElements() <= 2)
return SDValue(); return SDValue();
// Check that we are extracting a reduction of all sign bits. // Check that we are extracting a reduction of all sign bits.
if (DAG.ComputeNumSignBits(Match) != BitWidth) if (DAG.ComputeNumSignBits(Match) != BitWidth)
return SDValue(); return SDValue();
// For 32/64 bit comparisons use MOVMSKPS/MOVMSKPD, else PMOVMSKB. // For 32/64 bit comparisons use MOVMSKPS/MOVMSKPD, else PMOVMSKB.
MVT MaskVT; MVT MaskSrcVT;
if (64 == BitWidth || 32 == BitWidth) if (64 == BitWidth || 32 == BitWidth)
MaskVT = MVT::getVectorVT(MVT::getFloatingPointVT(BitWidth), MaskSrcVT = MVT::getVectorVT(MVT::getFloatingPointVT(BitWidth),
MatchSizeInBits / BitWidth); MatchSizeInBits / BitWidth);
else else
MaskVT = MVT::getVectorVT(MVT::i8, MatchSizeInBits / 8); MaskSrcVT = MVT::getVectorVT(MVT::i8, MatchSizeInBits / 8);
APInt CompareBits; SDLoc DL(Extract);
SDValue CmpC;
ISD::CondCode CondCode; ISD::CondCode CondCode;
if (BinOp == ISD::OR) { if (BinOp == ISD::OR) {
// any_of -> MOVMSK != 0 // any_of -> MOVMSK != 0
CompareBits = APInt::getNullValue(32); CmpC = DAG.getConstant(0, DL, MVT::i32);
CondCode = ISD::CondCode::SETNE; CondCode = ISD::CondCode::SETNE;
} else { } else {
// all_of -> MOVMSK == ((1 << NumElts) - 1) // all_of -> MOVMSK == ((1 << NumElts) - 1)
CompareBits = APInt::getLowBitsSet(32, MaskVT.getVectorNumElements()); uint64_t NumElts = MaskSrcVT.getVectorNumElements();
assert(NumElts <= 32 && "Not expecting more than 32 elements");
CmpC = DAG.getConstant((1ULL << NumElts) - 1, DL, MVT::i32);
CondCode = ISD::CondCode::SETEQ; CondCode = ISD::CondCode::SETEQ;
} }
// Perform the select as i32/i64 and then truncate to avoid partial register // The setcc produces an i8 of 0/1, so extend that to the result width and
// stalls. // negate to get the final 0/-1 mask value.
unsigned ResWidth = std::max(BitWidth, 32u); SDValue BitcastLogicOp = DAG.getBitcast(MaskSrcVT, Match);
EVT ResVT = EVT::getIntegerVT(*DAG.getContext(), ResWidth); SDValue Movmsk = DAG.getNode(X86ISD::MOVMSK, DL, MVT::i32, BitcastLogicOp);
SDLoc DL(Extract); const TargetLowering &TLI = DAG.getTargetLoweringInfo();
SDValue Zero = DAG.getConstant(0, DL, ResVT); EVT SetccVT = TLI.getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(),
SDValue Ones = DAG.getAllOnesConstant(DL, ResVT); MVT::i32);
SDValue Res = DAG.getBitcast(MaskVT, Match); SDValue Setcc = DAG.getSetCC(DL, SetccVT, Movmsk, CmpC, CondCode);
Res = DAG.getNode(X86ISD::MOVMSK, DL, MVT::i32, Res); SDValue Zext = DAG.getZExtOrTrunc(Setcc, DL, ExtractVT);
Res = DAG.getSelectCC(DL, Res, DAG.getConstant(CompareBits, DL, MVT::i32), SDValue Zero = DAG.getConstant(0, DL, ExtractVT);
Ones, Zero, CondCode); return DAG.getNode(ISD::SUB, DL, ExtractVT, Zero, Zext);
return DAG.getSExtOrTrunc(Res, DL, ExtractVT);
} }
static SDValue combineBasicSADPattern(SDNode *Extract, SelectionDAG &DAG, static SDValue combineBasicSADPattern(SDNode *Extract, SelectionDAG &DAG,
const X86Subtarget &Subtarget) { const X86Subtarget &Subtarget) {
// PSADBW is only supported on SSE2 and up. // PSADBW is only supported on SSE2 and up.
if (!Subtarget.hasSSE2()) if (!Subtarget.hasSSE2())
return SDValue(); return SDValue();
▲ Show 20 Lines • Show All 9,626 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/vector-compare-all_of.ll

Show First 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[2,3,0,1] ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[2,3,0,1]
; SSE-NEXT: pand %xmm2, %xmm0 ; SSE-NEXT: pand %xmm2, %xmm0
; SSE-NEXT: movq %xmm0, %rax ; SSE-NEXT: movq %xmm0, %rax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX-LABEL: test_v4f64_sext: ; AVX-LABEL: test_v4f64_sext:
; AVX: # %bb.0: ; AVX: # %bb.0:
; AVX-NEXT: vcmpltpd %ymm0, %ymm1, %ymm0 ; AVX-NEXT: vcmpltpd %ymm0, %ymm1, %ymm0
; AVX-NEXT: vmovmskpd %ymm0, %eax ; AVX-NEXT: vmovmskpd %ymm0, %ecx
; AVX-NEXT: xorl %ecx, %ecx ; AVX-NEXT: xorl %eax, %eax
; AVX-NEXT: cmpl $15, %eax ; AVX-NEXT: cmpl $15, %ecx
; AVX-NEXT: movq $-1, %rax ; AVX-NEXT: sete %al
; AVX-NEXT: cmovneq %rcx, %rax ; AVX-NEXT: negq %rax
; AVX-NEXT: vzeroupper ; AVX-NEXT: vzeroupper
; AVX-NEXT: retq ; AVX-NEXT: retq
; ;
; AVX512-LABEL: test_v4f64_sext: ; AVX512-LABEL: test_v4f64_sext:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vcmpltpd %ymm0, %ymm1, %ymm0 ; AVX512-NEXT: vcmpltpd %ymm0, %ymm1, %ymm0
; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm1 ; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX512-NEXT: vandpd %xmm1, %xmm0, %xmm0 ; AVX512-NEXT: vandpd %xmm1, %xmm0, %xmm0
Show All 16 Lines
; SSE-LABEL: test_v4f64_legal_sext: ; SSE-LABEL: test_v4f64_legal_sext:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: cmpltpd %xmm1, %xmm3 ; SSE-NEXT: cmpltpd %xmm1, %xmm3
; SSE-NEXT: cmpltpd %xmm0, %xmm2 ; SSE-NEXT: cmpltpd %xmm0, %xmm2
; SSE-NEXT: packssdw %xmm3, %xmm2 ; SSE-NEXT: packssdw %xmm3, %xmm2
; SSE-NEXT: movmskps %xmm2, %eax ; SSE-NEXT: movmskps %xmm2, %eax
; SSE-NEXT: xorl %ecx, %ecx ; SSE-NEXT: xorl %ecx, %ecx
; SSE-NEXT: cmpl $15, %eax ; SSE-NEXT: cmpl $15, %eax
; SSE-NEXT: movq $-1, %rax ; SSE-NEXT: sete %cl
; SSE-NEXT: cmovneq %rcx, %rax ; SSE-NEXT: negl %ecx
; SSE-NEXT: movslq %ecx, %rax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX-LABEL: test_v4f64_legal_sext: ; AVX-LABEL: test_v4f64_legal_sext:
; AVX: # %bb.0: ; AVX: # %bb.0:
; AVX-NEXT: vcmpltpd %ymm0, %ymm1, %ymm0 ; AVX-NEXT: vcmpltpd %ymm0, %ymm1, %ymm0
; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1 ; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX-NEXT: vpackssdw %xmm1, %xmm0, %xmm0 ; AVX-NEXT: vpackssdw %xmm1, %xmm0, %xmm0
; AVX-NEXT: vmovmskps %xmm0, %eax ; AVX-NEXT: vmovmskps %xmm0, %eax
; AVX-NEXT: xorl %ecx, %ecx ; AVX-NEXT: xorl %ecx, %ecx
; AVX-NEXT: cmpl $15, %eax ; AVX-NEXT: cmpl $15, %eax
; AVX-NEXT: movq $-1, %rax ; AVX-NEXT: sete %cl
; AVX-NEXT: cmovneq %rcx, %rax ; AVX-NEXT: negl %ecx
; AVX-NEXT: movslq %ecx, %rax
; AVX-NEXT: vzeroupper ; AVX-NEXT: vzeroupper
; AVX-NEXT: retq ; AVX-NEXT: retq
; ;
; AVX512-LABEL: test_v4f64_legal_sext: ; AVX512-LABEL: test_v4f64_legal_sext:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vcmpltpd %ymm0, %ymm1, %k1 ; AVX512-NEXT: vcmpltpd %ymm0, %ymm1, %k1
; AVX512-NEXT: vpcmpeqd %xmm0, %xmm0, %xmm0 ; AVX512-NEXT: vpcmpeqd %xmm0, %xmm0, %xmm0
; AVX512-NEXT: vmovdqa32 %xmm0, %xmm0 {%k1} {z} ; AVX512-NEXT: vmovdqa32 %xmm0, %xmm0 {%k1} {z}
Show All 15 Lines; AVX512-NEXT: retq
%6 = sext i32 %5 to i64 %6 = sext i32 %5 to i64
ret i64 %6 ret i64 %6
} }
define i32 @test_v4f32_sext(<4 x float> %a0, <4 x float> %a1) { define i32 @test_v4f32_sext(<4 x float> %a0, <4 x float> %a1) {
; SSE-LABEL: test_v4f32_sext: ; SSE-LABEL: test_v4f32_sext:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: cmpltps %xmm0, %xmm1 ; SSE-NEXT: cmpltps %xmm0, %xmm1
; SSE-NEXT: movmskps %xmm1, %eax ; SSE-NEXT: movmskps %xmm1, %ecx
; SSE-NEXT: xorl %ecx, %ecx ; SSE-NEXT: xorl %eax, %eax
; SSE-NEXT: cmpl $15, %eax ; SSE-NEXT: cmpl $15, %ecx
; SSE-NEXT: movl $-1, %eax ; SSE-NEXT: sete %al
; SSE-NEXT: cmovnel %ecx, %eax ; SSE-NEXT: negl %eax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX-LABEL: test_v4f32_sext: ; AVX-LABEL: test_v4f32_sext:
; AVX: # %bb.0: ; AVX: # %bb.0:
; AVX-NEXT: vcmpltps %xmm0, %xmm1, %xmm0 ; AVX-NEXT: vcmpltps %xmm0, %xmm1, %xmm0
; AVX-NEXT: vmovmskps %xmm0, %eax ; AVX-NEXT: vmovmskps %xmm0, %ecx
; AVX-NEXT: xorl %ecx, %ecx ; AVX-NEXT: xorl %eax, %eax
; AVX-NEXT: cmpl $15, %eax ; AVX-NEXT: cmpl $15, %ecx
; AVX-NEXT: movl $-1, %eax ; AVX-NEXT: sete %al
; AVX-NEXT: cmovnel %ecx, %eax ; AVX-NEXT: negl %eax
; AVX-NEXT: retq ; AVX-NEXT: retq
; ;
; AVX512-LABEL: test_v4f32_sext: ; AVX512-LABEL: test_v4f32_sext:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vcmpltps %xmm0, %xmm1, %xmm0 ; AVX512-NEXT: vcmpltps %xmm0, %xmm1, %xmm0
; AVX512-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1] ; AVX512-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1]
; AVX512-NEXT: vandps %xmm1, %xmm0, %xmm0 ; AVX512-NEXT: vandps %xmm1, %xmm0, %xmm0
; AVX512-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[1,1,2,3] ; AVX512-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[1,1,2,3]
Show All 11 Lines
} }
define i32 @test_v8f32_sext(<8 x float> %a0, <8 x float> %a1) { define i32 @test_v8f32_sext(<8 x float> %a0, <8 x float> %a1) {
; SSE-LABEL: test_v8f32_sext: ; SSE-LABEL: test_v8f32_sext:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: cmpltps %xmm1, %xmm3 ; SSE-NEXT: cmpltps %xmm1, %xmm3
; SSE-NEXT: cmpltps %xmm0, %xmm2 ; SSE-NEXT: cmpltps %xmm0, %xmm2
; SSE-NEXT: andps %xmm3, %xmm2 ; SSE-NEXT: andps %xmm3, %xmm2
; SSE-NEXT: movmskps %xmm2, %eax ; SSE-NEXT: movmskps %xmm2, %ecx
; SSE-NEXT: xorl %ecx, %ecx ; SSE-NEXT: xorl %eax, %eax
; SSE-NEXT: cmpl $15, %eax ; SSE-NEXT: cmpl $15, %ecx
; SSE-NEXT: movl $-1, %eax ; SSE-NEXT: sete %al
; SSE-NEXT: cmovnel %ecx, %eax ; SSE-NEXT: negl %eax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX-LABEL: test_v8f32_sext: ; AVX-LABEL: test_v8f32_sext:
; AVX: # %bb.0: ; AVX: # %bb.0:
; AVX-NEXT: vcmpltps %ymm0, %ymm1, %ymm0 ; AVX-NEXT: vcmpltps %ymm0, %ymm1, %ymm0
; AVX-NEXT: vmovmskps %ymm0, %eax ; AVX-NEXT: vmovmskps %ymm0, %ecx
; AVX-NEXT: xorl %ecx, %ecx ; AVX-NEXT: xorl %eax, %eax
; AVX-NEXT: cmpl $255, %eax ; AVX-NEXT: cmpl $255, %ecx
; AVX-NEXT: movl $-1, %eax ; AVX-NEXT: sete %al
; AVX-NEXT: cmovnel %ecx, %eax ; AVX-NEXT: negl %eax
; AVX-NEXT: vzeroupper ; AVX-NEXT: vzeroupper
; AVX-NEXT: retq ; AVX-NEXT: retq
; ;
; AVX512-LABEL: test_v8f32_sext: ; AVX512-LABEL: test_v8f32_sext:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vcmpltps %ymm0, %ymm1, %ymm0 ; AVX512-NEXT: vcmpltps %ymm0, %ymm1, %ymm0
; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm1 ; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX512-NEXT: vandps %xmm1, %xmm0, %xmm0 ; AVX512-NEXT: vandps %xmm1, %xmm0, %xmm0
Show All 17 Lines
} }
define i32 @test_v8f32_legal_sext(<8 x float> %a0, <8 x float> %a1) { define i32 @test_v8f32_legal_sext(<8 x float> %a0, <8 x float> %a1) {
; SSE-LABEL: test_v8f32_legal_sext: ; SSE-LABEL: test_v8f32_legal_sext:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: cmpltps %xmm1, %xmm3 ; SSE-NEXT: cmpltps %xmm1, %xmm3
; SSE-NEXT: cmpltps %xmm0, %xmm2 ; SSE-NEXT: cmpltps %xmm0, %xmm2
; SSE-NEXT: packssdw %xmm3, %xmm2 ; SSE-NEXT: packssdw %xmm3, %xmm2
; SSE-NEXT: pmovmskb %xmm2, %eax ; SSE-NEXT: pmovmskb %xmm2, %ecx
; SSE-NEXT: xorl %ecx, %ecx ; SSE-NEXT: xorl %eax, %eax
; SSE-NEXT: cmpl $65535, %eax # imm = 0xFFFF ; SSE-NEXT: cmpl $65535, %ecx # imm = 0xFFFF
; SSE-NEXT: movl $-1, %eax ; SSE-NEXT: sete %al
; SSE-NEXT: cmovnel %ecx, %eax ; SSE-NEXT: negl %eax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX-LABEL: test_v8f32_legal_sext: ; AVX-LABEL: test_v8f32_legal_sext:
; AVX: # %bb.0: ; AVX: # %bb.0:
; AVX-NEXT: vcmpltps %ymm0, %ymm1, %ymm0 ; AVX-NEXT: vcmpltps %ymm0, %ymm1, %ymm0
; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1 ; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX-NEXT: vpackssdw %xmm1, %xmm0, %xmm0 ; AVX-NEXT: vpackssdw %xmm1, %xmm0, %xmm0
; AVX-NEXT: vpmovmskb %xmm0, %eax ; AVX-NEXT: vpmovmskb %xmm0, %ecx
; AVX-NEXT: xorl %ecx, %ecx ; AVX-NEXT: xorl %eax, %eax
; AVX-NEXT: cmpl $65535, %eax # imm = 0xFFFF ; AVX-NEXT: cmpl $65535, %ecx # imm = 0xFFFF
; AVX-NEXT: movl $-1, %eax ; AVX-NEXT: sete %al
; AVX-NEXT: cmovnel %ecx, %eax ; AVX-NEXT: negl %eax
; AVX-NEXT: vzeroupper ; AVX-NEXT: vzeroupper
; AVX-NEXT: retq ; AVX-NEXT: retq
; ;
; AVX512-LABEL: test_v8f32_legal_sext: ; AVX512-LABEL: test_v8f32_legal_sext:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vcmpltps %ymm0, %ymm1, %k0 ; AVX512-NEXT: vcmpltps %ymm0, %ymm1, %k0
; AVX512-NEXT: vpmovm2w %k0, %xmm0 ; AVX512-NEXT: vpmovm2w %k0, %xmm0
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
▲ Show 20 Lines • Show All 64 Lines • ▼ Show 20 Lines
; ;
; AVX1-LABEL: test_v4i64_sext: ; AVX1-LABEL: test_v4i64_sext:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT: vpcmpgtq %xmm2, %xmm3, %xmm2 ; AVX1-NEXT: vpcmpgtq %xmm2, %xmm3, %xmm2
; AVX1-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0 ; AVX1-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 ; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
; AVX1-NEXT: vmovmskpd %ymm0, %eax ; AVX1-NEXT: vmovmskpd %ymm0, %ecx
; AVX1-NEXT: xorl %ecx, %ecx ; AVX1-NEXT: xorl %eax, %eax
; AVX1-NEXT: cmpl $15, %eax ; AVX1-NEXT: cmpl $15, %ecx
; AVX1-NEXT: movq $-1, %rax ; AVX1-NEXT: sete %al
; AVX1-NEXT: cmovneq %rcx, %rax ; AVX1-NEXT: negq %rax
; AVX1-NEXT: vzeroupper ; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq ; AVX1-NEXT: retq
; ;
; AVX2-LABEL: test_v4i64_sext: ; AVX2-LABEL: test_v4i64_sext:
; AVX2: # %bb.0: ; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vmovmskpd %ymm0, %eax ; AVX2-NEXT: vmovmskpd %ymm0, %ecx
; AVX2-NEXT: xorl %ecx, %ecx ; AVX2-NEXT: xorl %eax, %eax
; AVX2-NEXT: cmpl $15, %eax ; AVX2-NEXT: cmpl $15, %ecx
; AVX2-NEXT: movq $-1, %rax ; AVX2-NEXT: sete %al
; AVX2-NEXT: cmovneq %rcx, %rax ; AVX2-NEXT: negq %rax
; AVX2-NEXT: vzeroupper ; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq ; AVX2-NEXT: retq
; ;
; AVX512-LABEL: test_v4i64_sext: ; AVX512-LABEL: test_v4i64_sext:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0 ; AVX512-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0
; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1 ; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX512-NEXT: vpand %xmm1, %xmm0, %xmm0 ; AVX512-NEXT: vpand %xmm1, %xmm0, %xmm0
Show All 16 Lines
; SSE-LABEL: test_v4i64_legal_sext: ; SSE-LABEL: test_v4i64_legal_sext:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: pcmpgtq %xmm3, %xmm1 ; SSE-NEXT: pcmpgtq %xmm3, %xmm1
; SSE-NEXT: pcmpgtq %xmm2, %xmm0 ; SSE-NEXT: pcmpgtq %xmm2, %xmm0
; SSE-NEXT: packssdw %xmm1, %xmm0 ; SSE-NEXT: packssdw %xmm1, %xmm0
; SSE-NEXT: movmskps %xmm0, %eax ; SSE-NEXT: movmskps %xmm0, %eax
; SSE-NEXT: xorl %ecx, %ecx ; SSE-NEXT: xorl %ecx, %ecx
; SSE-NEXT: cmpl $15, %eax ; SSE-NEXT: cmpl $15, %eax
; SSE-NEXT: movq $-1, %rax ; SSE-NEXT: sete %cl
; SSE-NEXT: cmovneq %rcx, %rax ; SSE-NEXT: negl %ecx
; SSE-NEXT: movslq %ecx, %rax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX1-LABEL: test_v4i64_legal_sext: ; AVX1-LABEL: test_v4i64_legal_sext:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT: vpcmpgtq %xmm2, %xmm3, %xmm2 ; AVX1-NEXT: vpcmpgtq %xmm2, %xmm3, %xmm2
; AVX1-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0 ; AVX1-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpackssdw %xmm2, %xmm0, %xmm0 ; AVX1-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vmovmskps %xmm0, %eax ; AVX1-NEXT: vmovmskps %xmm0, %eax
; AVX1-NEXT: xorl %ecx, %ecx ; AVX1-NEXT: xorl %ecx, %ecx
; AVX1-NEXT: cmpl $15, %eax ; AVX1-NEXT: cmpl $15, %eax
; AVX1-NEXT: movq $-1, %rax ; AVX1-NEXT: sete %cl
; AVX1-NEXT: cmovneq %rcx, %rax ; AVX1-NEXT: negl %ecx
; AVX1-NEXT: movslq %ecx, %rax
; AVX1-NEXT: vzeroupper ; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq ; AVX1-NEXT: retq
; ;
; AVX2-LABEL: test_v4i64_legal_sext: ; AVX2-LABEL: test_v4i64_legal_sext:
; AVX2: # %bb.0: ; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX2-NEXT: vpackssdw %xmm1, %xmm0, %xmm0 ; AVX2-NEXT: vpackssdw %xmm1, %xmm0, %xmm0
; AVX2-NEXT: vmovmskps %xmm0, %eax ; AVX2-NEXT: vmovmskps %xmm0, %eax
; AVX2-NEXT: xorl %ecx, %ecx ; AVX2-NEXT: xorl %ecx, %ecx
; AVX2-NEXT: cmpl $15, %eax ; AVX2-NEXT: cmpl $15, %eax
; AVX2-NEXT: movq $-1, %rax ; AVX2-NEXT: sete %cl
; AVX2-NEXT: cmovneq %rcx, %rax ; AVX2-NEXT: negl %ecx
; AVX2-NEXT: movslq %ecx, %rax
; AVX2-NEXT: vzeroupper ; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq ; AVX2-NEXT: retq
; ;
; AVX512-LABEL: test_v4i64_legal_sext: ; AVX512-LABEL: test_v4i64_legal_sext:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vpcmpgtq %ymm1, %ymm0, %k1 ; AVX512-NEXT: vpcmpgtq %ymm1, %ymm0, %k1
; AVX512-NEXT: vpcmpeqd %xmm0, %xmm0, %xmm0 ; AVX512-NEXT: vpcmpeqd %xmm0, %xmm0, %xmm0
; AVX512-NEXT: vmovdqa32 %xmm0, %xmm0 {%k1} {z} ; AVX512-NEXT: vmovdqa32 %xmm0, %xmm0 {%k1} {z}
Show All 15 Lines; AVX512-NEXT: retq
%6 = sext i32 %5 to i64 %6 = sext i32 %5 to i64
ret i64 %6 ret i64 %6
} }
define i32 @test_v4i32_sext(<4 x i32> %a0, <4 x i32> %a1) { define i32 @test_v4i32_sext(<4 x i32> %a0, <4 x i32> %a1) {
; SSE-LABEL: test_v4i32_sext: ; SSE-LABEL: test_v4i32_sext:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: pcmpgtd %xmm1, %xmm0 ; SSE-NEXT: pcmpgtd %xmm1, %xmm0
; SSE-NEXT: movmskps %xmm0, %eax ; SSE-NEXT: movmskps %xmm0, %ecx
; SSE-NEXT: xorl %ecx, %ecx ; SSE-NEXT: xorl %eax, %eax
; SSE-NEXT: cmpl $15, %eax ; SSE-NEXT: cmpl $15, %ecx
; SSE-NEXT: movl $-1, %eax ; SSE-NEXT: sete %al
; SSE-NEXT: cmovnel %ecx, %eax ; SSE-NEXT: negl %eax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX-LABEL: test_v4i32_sext: ; AVX-LABEL: test_v4i32_sext:
; AVX: # %bb.0: ; AVX: # %bb.0:
; AVX-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0 ; AVX-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0
; AVX-NEXT: vmovmskps %xmm0, %eax ; AVX-NEXT: vmovmskps %xmm0, %ecx
; AVX-NEXT: xorl %ecx, %ecx ; AVX-NEXT: xorl %eax, %eax
; AVX-NEXT: cmpl $15, %eax ; AVX-NEXT: cmpl $15, %ecx
; AVX-NEXT: movl $-1, %eax ; AVX-NEXT: sete %al
; AVX-NEXT: cmovnel %ecx, %eax ; AVX-NEXT: negl %eax
; AVX-NEXT: retq ; AVX-NEXT: retq
; ;
; AVX512-LABEL: test_v4i32_sext: ; AVX512-LABEL: test_v4i32_sext:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0 ; AVX512-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
; AVX512-NEXT: vpand %xmm1, %xmm0, %xmm0 ; AVX512-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
Show All 11 Lines
} }
define i32 @test_v8i32_sext(<8 x i32> %a0, <8 x i32> %a1) { define i32 @test_v8i32_sext(<8 x i32> %a0, <8 x i32> %a1) {
; SSE-LABEL: test_v8i32_sext: ; SSE-LABEL: test_v8i32_sext:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: pcmpgtd %xmm3, %xmm1 ; SSE-NEXT: pcmpgtd %xmm3, %xmm1
; SSE-NEXT: pcmpgtd %xmm2, %xmm0 ; SSE-NEXT: pcmpgtd %xmm2, %xmm0
; SSE-NEXT: pand %xmm1, %xmm0 ; SSE-NEXT: pand %xmm1, %xmm0
; SSE-NEXT: movmskps %xmm0, %eax ; SSE-NEXT: movmskps %xmm0, %ecx
; SSE-NEXT: xorl %ecx, %ecx ; SSE-NEXT: xorl %eax, %eax
; SSE-NEXT: cmpl $15, %eax ; SSE-NEXT: cmpl $15, %ecx
; SSE-NEXT: movl $-1, %eax ; SSE-NEXT: sete %al
; SSE-NEXT: cmovnel %ecx, %eax ; SSE-NEXT: negl %eax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX1-LABEL: test_v8i32_sext: ; AVX1-LABEL: test_v8i32_sext:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT: vpcmpgtd %xmm2, %xmm3, %xmm2 ; AVX1-NEXT: vpcmpgtd %xmm2, %xmm3, %xmm2
; AVX1-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0 ; AVX1-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 ; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
; AVX1-NEXT: vmovmskps %ymm0, %eax ; AVX1-NEXT: vmovmskps %ymm0, %ecx
; AVX1-NEXT: xorl %ecx, %ecx ; AVX1-NEXT: xorl %eax, %eax
; AVX1-NEXT: cmpl $255, %eax ; AVX1-NEXT: cmpl $255, %ecx
; AVX1-NEXT: movl $-1, %eax ; AVX1-NEXT: sete %al
; AVX1-NEXT: cmovnel %ecx, %eax ; AVX1-NEXT: negl %eax
; AVX1-NEXT: vzeroupper ; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq ; AVX1-NEXT: retq
; ;
; AVX2-LABEL: test_v8i32_sext: ; AVX2-LABEL: test_v8i32_sext:
; AVX2: # %bb.0: ; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vmovmskps %ymm0, %eax ; AVX2-NEXT: vmovmskps %ymm0, %ecx
; AVX2-NEXT: xorl %ecx, %ecx ; AVX2-NEXT: xorl %eax, %eax
; AVX2-NEXT: cmpl $255, %eax ; AVX2-NEXT: cmpl $255, %ecx
; AVX2-NEXT: movl $-1, %eax ; AVX2-NEXT: sete %al
; AVX2-NEXT: cmovnel %ecx, %eax ; AVX2-NEXT: negl %eax
; AVX2-NEXT: vzeroupper ; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq ; AVX2-NEXT: retq
; ;
; AVX512-LABEL: test_v8i32_sext: ; AVX512-LABEL: test_v8i32_sext:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0 ; AVX512-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0
; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1 ; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX512-NEXT: vpand %xmm1, %xmm0, %xmm0 ; AVX512-NEXT: vpand %xmm1, %xmm0, %xmm0
Show All 17 Lines
} }
define i32 @test_v8i32_legal_sext(<8 x i32> %a0, <8 x i32> %a1) { define i32 @test_v8i32_legal_sext(<8 x i32> %a0, <8 x i32> %a1) {
; SSE-LABEL: test_v8i32_legal_sext: ; SSE-LABEL: test_v8i32_legal_sext:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: pcmpgtd %xmm3, %xmm1 ; SSE-NEXT: pcmpgtd %xmm3, %xmm1
; SSE-NEXT: pcmpgtd %xmm2, %xmm0 ; SSE-NEXT: pcmpgtd %xmm2, %xmm0
; SSE-NEXT: packssdw %xmm1, %xmm0 ; SSE-NEXT: packssdw %xmm1, %xmm0
; SSE-NEXT: pmovmskb %xmm0, %eax ; SSE-NEXT: pmovmskb %xmm0, %ecx
; SSE-NEXT: xorl %ecx, %ecx ; SSE-NEXT: xorl %eax, %eax
; SSE-NEXT: cmpl $65535, %eax # imm = 0xFFFF ; SSE-NEXT: cmpl $65535, %ecx # imm = 0xFFFF
; SSE-NEXT: movl $-1, %eax ; SSE-NEXT: sete %al
; SSE-NEXT: cmovnel %ecx, %eax ; SSE-NEXT: negl %eax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX1-LABEL: test_v8i32_legal_sext: ; AVX1-LABEL: test_v8i32_legal_sext:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT: vpcmpgtd %xmm2, %xmm3, %xmm2 ; AVX1-NEXT: vpcmpgtd %xmm2, %xmm3, %xmm2
; AVX1-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0 ; AVX1-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpackssdw %xmm2, %xmm0, %xmm0 ; AVX1-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax ; AVX1-NEXT: vpmovmskb %xmm0, %ecx
; AVX1-NEXT: xorl %ecx, %ecx ; AVX1-NEXT: xorl %eax, %eax
; AVX1-NEXT: cmpl $65535, %eax # imm = 0xFFFF ; AVX1-NEXT: cmpl $65535, %ecx # imm = 0xFFFF
; AVX1-NEXT: movl $-1, %eax ; AVX1-NEXT: sete %al
; AVX1-NEXT: cmovnel %ecx, %eax ; AVX1-NEXT: negl %eax
; AVX1-NEXT: vzeroupper ; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq ; AVX1-NEXT: retq
; ;
; AVX2-LABEL: test_v8i32_legal_sext: ; AVX2-LABEL: test_v8i32_legal_sext:
; AVX2: # %bb.0: ; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX2-NEXT: vpackssdw %xmm1, %xmm0, %xmm0 ; AVX2-NEXT: vpackssdw %xmm1, %xmm0, %xmm0
; AVX2-NEXT: vpmovmskb %xmm0, %eax ; AVX2-NEXT: vpmovmskb %xmm0, %ecx
; AVX2-NEXT: xorl %ecx, %ecx ; AVX2-NEXT: xorl %eax, %eax
; AVX2-NEXT: cmpl $65535, %eax # imm = 0xFFFF ; AVX2-NEXT: cmpl $65535, %ecx # imm = 0xFFFF
; AVX2-NEXT: movl $-1, %eax ; AVX2-NEXT: sete %al
; AVX2-NEXT: cmovnel %ecx, %eax ; AVX2-NEXT: negl %eax
; AVX2-NEXT: vzeroupper ; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq ; AVX2-NEXT: retq
; ;
; AVX512-LABEL: test_v8i32_legal_sext: ; AVX512-LABEL: test_v8i32_legal_sext:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vpcmpgtd %ymm1, %ymm0, %k0 ; AVX512-NEXT: vpcmpgtd %ymm1, %ymm0, %k0
; AVX512-NEXT: vpmovm2w %k0, %xmm0 ; AVX512-NEXT: vpmovm2w %k0, %xmm0
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
Show All 18 Lines; AVX512-NEXT: retq
%8 = sext i16 %7 to i32 %8 = sext i16 %7 to i32
ret i32 %8 ret i32 %8
} }
define i16 @test_v8i16_sext(<8 x i16> %a0, <8 x i16> %a1) { define i16 @test_v8i16_sext(<8 x i16> %a0, <8 x i16> %a1) {
; SSE-LABEL: test_v8i16_sext: ; SSE-LABEL: test_v8i16_sext:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: pcmpgtw %xmm1, %xmm0 ; SSE-NEXT: pcmpgtw %xmm1, %xmm0
; SSE-NEXT: pmovmskb %xmm0, %eax ; SSE-NEXT: pmovmskb %xmm0, %ecx
; SSE-NEXT: xorl %ecx, %ecx ; SSE-NEXT: xorl %eax, %eax
; SSE-NEXT: cmpl $65535, %eax # imm = 0xFFFF ; SSE-NEXT: cmpl $65535, %ecx # imm = 0xFFFF
; SSE-NEXT: movl $-1, %eax ; SSE-NEXT: sete %al
; SSE-NEXT: cmovnel %ecx, %eax ; SSE-NEXT: negl %eax
; SSE-NEXT: # kill: def $ax killed $ax killed $eax ; SSE-NEXT: # kill: def $ax killed $ax killed $eax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX-LABEL: test_v8i16_sext: ; AVX-LABEL: test_v8i16_sext:
; AVX: # %bb.0: ; AVX: # %bb.0:
; AVX-NEXT: vpcmpgtw %xmm1, %xmm0, %xmm0 ; AVX-NEXT: vpcmpgtw %xmm1, %xmm0, %xmm0
; AVX-NEXT: vpmovmskb %xmm0, %eax ; AVX-NEXT: vpmovmskb %xmm0, %ecx
; AVX-NEXT: xorl %ecx, %ecx ; AVX-NEXT: xorl %eax, %eax
; AVX-NEXT: cmpl $65535, %eax # imm = 0xFFFF ; AVX-NEXT: cmpl $65535, %ecx # imm = 0xFFFF
; AVX-NEXT: movl $-1, %eax ; AVX-NEXT: sete %al
; AVX-NEXT: cmovnel %ecx, %eax ; AVX-NEXT: negl %eax
; AVX-NEXT: # kill: def $ax killed $ax killed $eax ; AVX-NEXT: # kill: def $ax killed $ax killed $eax
; AVX-NEXT: retq ; AVX-NEXT: retq
; ;
; AVX512-LABEL: test_v8i16_sext: ; AVX512-LABEL: test_v8i16_sext:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vpcmpgtw %xmm1, %xmm0, %xmm0 ; AVX512-NEXT: vpcmpgtw %xmm1, %xmm0, %xmm0
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
; AVX512-NEXT: vpand %xmm1, %xmm0, %xmm0 ; AVX512-NEXT: vpand %xmm1, %xmm0, %xmm0
Show All 17 Lines
} }
define i16 @test_v16i16_sext(<16 x i16> %a0, <16 x i16> %a1) { define i16 @test_v16i16_sext(<16 x i16> %a0, <16 x i16> %a1) {
; SSE-LABEL: test_v16i16_sext: ; SSE-LABEL: test_v16i16_sext:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: pcmpgtw %xmm3, %xmm1 ; SSE-NEXT: pcmpgtw %xmm3, %xmm1
; SSE-NEXT: pcmpgtw %xmm2, %xmm0 ; SSE-NEXT: pcmpgtw %xmm2, %xmm0
; SSE-NEXT: pand %xmm1, %xmm0 ; SSE-NEXT: pand %xmm1, %xmm0
; SSE-NEXT: pmovmskb %xmm0, %eax ; SSE-NEXT: pmovmskb %xmm0, %ecx
; SSE-NEXT: xorl %ecx, %ecx ; SSE-NEXT: xorl %eax, %eax
; SSE-NEXT: cmpl $65535, %eax # imm = 0xFFFF ; SSE-NEXT: cmpl $65535, %ecx # imm = 0xFFFF
; SSE-NEXT: movl $-1, %eax ; SSE-NEXT: sete %al
; SSE-NEXT: cmovnel %ecx, %eax ; SSE-NEXT: negl %eax
; SSE-NEXT: # kill: def $ax killed $ax killed $eax ; SSE-NEXT: # kill: def $ax killed $ax killed $eax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX1-LABEL: test_v16i16_sext: ; AVX1-LABEL: test_v16i16_sext:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT: vpcmpgtw %xmm2, %xmm3, %xmm2 ; AVX1-NEXT: vpcmpgtw %xmm2, %xmm3, %xmm2
Show All 11 Lines
; AVX1-NEXT: retq ; AVX1-NEXT: retq
; ;
; AVX2-LABEL: test_v16i16_sext: ; AVX2-LABEL: test_v16i16_sext:
; AVX2: # %bb.0: ; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpgtw %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: vpcmpgtw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpmovmskb %ymm0, %ecx ; AVX2-NEXT: vpmovmskb %ymm0, %ecx
; AVX2-NEXT: xorl %eax, %eax ; AVX2-NEXT: xorl %eax, %eax
; AVX2-NEXT: cmpl $-1, %ecx ; AVX2-NEXT: cmpl $-1, %ecx
; AVX2-NEXT: cmovel %ecx, %eax ; AVX2-NEXT: sete %al
; AVX2-NEXT: negl %eax
; AVX2-NEXT: # kill: def $ax killed $ax killed $eax ; AVX2-NEXT: # kill: def $ax killed $ax killed $eax
; AVX2-NEXT: vzeroupper ; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq ; AVX2-NEXT: retq
; ;
; AVX512-LABEL: test_v16i16_sext: ; AVX512-LABEL: test_v16i16_sext:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vpcmpgtw %ymm1, %ymm0, %ymm0 ; AVX512-NEXT: vpcmpgtw %ymm1, %ymm0, %ymm0
; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1 ; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
Show All 24 Lines
define i16 @test_v16i16_legal_sext(<16 x i16> %a0, <16 x i16> %a1) { define i16 @test_v16i16_legal_sext(<16 x i16> %a0, <16 x i16> %a1) {
; SSE-LABEL: test_v16i16_legal_sext: ; SSE-LABEL: test_v16i16_legal_sext:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: pcmpgtw %xmm3, %xmm1 ; SSE-NEXT: pcmpgtw %xmm3, %xmm1
; SSE-NEXT: pcmpgtw %xmm2, %xmm0 ; SSE-NEXT: pcmpgtw %xmm2, %xmm0
; SSE-NEXT: packsswb %xmm1, %xmm0 ; SSE-NEXT: packsswb %xmm1, %xmm0
; SSE-NEXT: pmovmskb %xmm0, %eax ; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: xorl %ecx, %ecx
; SSE-NEXT: cmpl $65535, %eax # imm = 0xFFFF ; SSE-NEXT: cmpl $65535, %eax # imm = 0xFFFF
; SSE-NEXT: movl $-1, %eax ; SSE-NEXT: sete %al
; SSE-NEXT: cmovnel %ecx, %eax ; SSE-NEXT: negb %al
; SSE-NEXT: movsbl %al, %eax
; SSE-NEXT: # kill: def $ax killed $ax killed $eax ; SSE-NEXT: # kill: def $ax killed $ax killed $eax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX1-LABEL: test_v16i16_legal_sext: ; AVX1-LABEL: test_v16i16_legal_sext:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT: vpcmpgtw %xmm2, %xmm3, %xmm2 ; AVX1-NEXT: vpcmpgtw %xmm2, %xmm3, %xmm2
; AVX1-NEXT: vpcmpgtw %xmm1, %xmm0, %xmm0 ; AVX1-NEXT: vpcmpgtw %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpacksswb %xmm2, %xmm0, %xmm0 ; AVX1-NEXT: vpacksswb %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax ; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: xorl %ecx, %ecx
; AVX1-NEXT: cmpl $65535, %eax # imm = 0xFFFF ; AVX1-NEXT: cmpl $65535, %eax # imm = 0xFFFF
; AVX1-NEXT: movl $-1, %eax ; AVX1-NEXT: sete %al
; AVX1-NEXT: cmovnel %ecx, %eax ; AVX1-NEXT: negb %al
; AVX1-NEXT: movsbl %al, %eax
; AVX1-NEXT: # kill: def $ax killed $ax killed $eax ; AVX1-NEXT: # kill: def $ax killed $ax killed $eax
; AVX1-NEXT: vzeroupper ; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq ; AVX1-NEXT: retq
; ;
; AVX2-LABEL: test_v16i16_legal_sext: ; AVX2-LABEL: test_v16i16_legal_sext:
; AVX2: # %bb.0: ; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpgtw %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: vpcmpgtw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX2-NEXT: vpacksswb %xmm1, %xmm0, %xmm0 ; AVX2-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
; AVX2-NEXT: vpmovmskb %xmm0, %eax ; AVX2-NEXT: vpmovmskb %xmm0, %eax
; AVX2-NEXT: xorl %ecx, %ecx
; AVX2-NEXT: cmpl $65535, %eax # imm = 0xFFFF ; AVX2-NEXT: cmpl $65535, %eax # imm = 0xFFFF
; AVX2-NEXT: movl $-1, %eax ; AVX2-NEXT: sete %al
; AVX2-NEXT: cmovnel %ecx, %eax ; AVX2-NEXT: negb %al
; AVX2-NEXT: movsbl %al, %eax
; AVX2-NEXT: # kill: def $ax killed $ax killed $eax ; AVX2-NEXT: # kill: def $ax killed $ax killed $eax
; AVX2-NEXT: vzeroupper ; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq ; AVX2-NEXT: retq
; ;
; AVX512-LABEL: test_v16i16_legal_sext: ; AVX512-LABEL: test_v16i16_legal_sext:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vpcmpgtw %ymm1, %ymm0, %k0 ; AVX512-NEXT: vpcmpgtw %ymm1, %ymm0, %k0
; AVX512-NEXT: vpmovm2b %k0, %xmm0 ; AVX512-NEXT: vpmovm2b %k0, %xmm0
Show All 25 Lines; AVX512-NEXT: retq
ret i16 %10 ret i16 %10
} }
define i8 @test_v16i8_sext(<16 x i8> %a0, <16 x i8> %a1) { define i8 @test_v16i8_sext(<16 x i8> %a0, <16 x i8> %a1) {
; SSE-LABEL: test_v16i8_sext: ; SSE-LABEL: test_v16i8_sext:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: pcmpgtb %xmm1, %xmm0 ; SSE-NEXT: pcmpgtb %xmm1, %xmm0
; SSE-NEXT: pmovmskb %xmm0, %eax ; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: xorl %ecx, %ecx
; SSE-NEXT: cmpl $65535, %eax # imm = 0xFFFF ; SSE-NEXT: cmpl $65535, %eax # imm = 0xFFFF
; SSE-NEXT: movl $-1, %eax ; SSE-NEXT: sete %al
; SSE-NEXT: cmovnel %ecx, %eax ; SSE-NEXT: negb %al
; SSE-NEXT: # kill: def $al killed $al killed $eax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX-LABEL: test_v16i8_sext: ; AVX-LABEL: test_v16i8_sext:
; AVX: # %bb.0: ; AVX: # %bb.0:
; AVX-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm0 ; AVX-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm0
; AVX-NEXT: vpmovmskb %xmm0, %eax ; AVX-NEXT: vpmovmskb %xmm0, %eax
; AVX-NEXT: xorl %ecx, %ecx
; AVX-NEXT: cmpl $65535, %eax # imm = 0xFFFF ; AVX-NEXT: cmpl $65535, %eax # imm = 0xFFFF
; AVX-NEXT: movl $-1, %eax ; AVX-NEXT: sete %al
; AVX-NEXT: cmovnel %ecx, %eax ; AVX-NEXT: negb %al
; AVX-NEXT: # kill: def $al killed $al killed $eax
; AVX-NEXT: retq ; AVX-NEXT: retq
; ;
; AVX512-LABEL: test_v16i8_sext: ; AVX512-LABEL: test_v16i8_sext:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm0 ; AVX512-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm0
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
; AVX512-NEXT: vpand %xmm1, %xmm0, %xmm0 ; AVX512-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
Show All 21 Lines
define i8 @test_v32i8_sext(<32 x i8> %a0, <32 x i8> %a1) { define i8 @test_v32i8_sext(<32 x i8> %a0, <32 x i8> %a1) {
; SSE-LABEL: test_v32i8_sext: ; SSE-LABEL: test_v32i8_sext:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: pcmpgtb %xmm3, %xmm1 ; SSE-NEXT: pcmpgtb %xmm3, %xmm1
; SSE-NEXT: pcmpgtb %xmm2, %xmm0 ; SSE-NEXT: pcmpgtb %xmm2, %xmm0
; SSE-NEXT: pand %xmm1, %xmm0 ; SSE-NEXT: pand %xmm1, %xmm0
; SSE-NEXT: pmovmskb %xmm0, %eax ; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: xorl %ecx, %ecx
; SSE-NEXT: cmpl $65535, %eax # imm = 0xFFFF ; SSE-NEXT: cmpl $65535, %eax # imm = 0xFFFF
; SSE-NEXT: movl $-1, %eax ; SSE-NEXT: sete %al
; SSE-NEXT: cmovnel %ecx, %eax ; SSE-NEXT: negb %al
; SSE-NEXT: # kill: def $al killed $al killed $eax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX1-LABEL: test_v32i8_sext: ; AVX1-LABEL: test_v32i8_sext:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT: vpcmpgtb %xmm2, %xmm3, %xmm2 ; AVX1-NEXT: vpcmpgtb %xmm2, %xmm3, %xmm2
; AVX1-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm0 ; AVX1-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm0
Show All 9 Lines
; AVX1-NEXT: vpextrb $0, %xmm0, %eax ; AVX1-NEXT: vpextrb $0, %xmm0, %eax
; AVX1-NEXT: # kill: def $al killed $al killed $eax ; AVX1-NEXT: # kill: def $al killed $al killed $eax
; AVX1-NEXT: vzeroupper ; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq ; AVX1-NEXT: retq
; ;
; AVX2-LABEL: test_v32i8_sext: ; AVX2-LABEL: test_v32i8_sext:
; AVX2: # %bb.0: ; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpgtb %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: vpcmpgtb %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpmovmskb %ymm0, %ecx ; AVX2-NEXT: vpmovmskb %ymm0, %eax
; AVX2-NEXT: xorl %eax, %eax ; AVX2-NEXT: cmpl $-1, %eax
; AVX2-NEXT: cmpl $-1, %ecx ; AVX2-NEXT: sete %al
; AVX2-NEXT: cmovel %ecx, %eax ; AVX2-NEXT: negb %al
; AVX2-NEXT: # kill: def $al killed $al killed $eax
; AVX2-NEXT: vzeroupper ; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq ; AVX2-NEXT: retq
; ;
; AVX512-LABEL: test_v32i8_sext: ; AVX512-LABEL: test_v32i8_sext:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vpcmpgtb %ymm1, %ymm0, %ymm0 ; AVX512-NEXT: vpcmpgtb %ymm1, %ymm0, %ymm0
; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1 ; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX512-NEXT: vpand %xmm1, %xmm0, %xmm0 ; AVX512-NEXT: vpand %xmm1, %xmm0, %xmm0
▲ Show 20 Lines • Show All 374 Lines • ▼ Show 20 Lines; AVX512-NEXT: retq
ret i1 %e ret i1 %e
} }
define i1 @bool_reduction_v16i8(<16 x i8> %x, <16 x i8> %y) { define i1 @bool_reduction_v16i8(<16 x i8> %x, <16 x i8> %y) {
; SSE-LABEL: bool_reduction_v16i8: ; SSE-LABEL: bool_reduction_v16i8:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: pcmpgtb %xmm1, %xmm0 ; SSE-NEXT: pcmpgtb %xmm1, %xmm0
; SSE-NEXT: pmovmskb %xmm0, %eax ; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: xorl %ecx, %ecx
; SSE-NEXT: cmpl $65535, %eax # imm = 0xFFFF ; SSE-NEXT: cmpl $65535, %eax # imm = 0xFFFF
; SSE-NEXT: movl $-1, %eax ; SSE-NEXT: sete %al
; SSE-NEXT: cmovnel %ecx, %eax ; SSE-NEXT: negb %al
; SSE-NEXT: # kill: def $al killed $al killed $eax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX-LABEL: bool_reduction_v16i8: ; AVX-LABEL: bool_reduction_v16i8:
; AVX: # %bb.0: ; AVX: # %bb.0:
; AVX-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm0 ; AVX-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm0
; AVX-NEXT: vpmovmskb %xmm0, %eax ; AVX-NEXT: vpmovmskb %xmm0, %eax
; AVX-NEXT: xorl %ecx, %ecx
; AVX-NEXT: cmpl $65535, %eax # imm = 0xFFFF ; AVX-NEXT: cmpl $65535, %eax # imm = 0xFFFF
; AVX-NEXT: movl $-1, %eax ; AVX-NEXT: sete %al
; AVX-NEXT: cmovnel %ecx, %eax ; AVX-NEXT: negb %al
; AVX-NEXT: # kill: def $al killed $al killed $eax
; AVX-NEXT: retq ; AVX-NEXT: retq
; ;
; AVX512-LABEL: bool_reduction_v16i8: ; AVX512-LABEL: bool_reduction_v16i8:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vpcmpgtb %xmm1, %xmm0, %k0 ; AVX512-NEXT: vpcmpgtb %xmm1, %xmm0, %k0
; AVX512-NEXT: kshiftrw $8, %k0, %k1 ; AVX512-NEXT: kshiftrw $8, %k0, %k1
; AVX512-NEXT: vpcmpgtb %xmm1, %xmm0, %k0 {%k1} ; AVX512-NEXT: vpcmpgtb %xmm1, %xmm0, %k0 {%k1}
; AVX512-NEXT: kshiftrw $4, %k0, %k1 ; AVX512-NEXT: kshiftrw $4, %k0, %k1
▲ Show 20 Lines • Show All 176 Lines • ▼ Show 20 Lines
define i1 @bool_reduction_v16i16(<16 x i16> %x, <16 x i16> %y) { define i1 @bool_reduction_v16i16(<16 x i16> %x, <16 x i16> %y) {
; SSE-LABEL: bool_reduction_v16i16: ; SSE-LABEL: bool_reduction_v16i16:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: pcmpeqw %xmm3, %xmm1 ; SSE-NEXT: pcmpeqw %xmm3, %xmm1
; SSE-NEXT: pcmpeqw %xmm2, %xmm0 ; SSE-NEXT: pcmpeqw %xmm2, %xmm0
; SSE-NEXT: packsswb %xmm1, %xmm0 ; SSE-NEXT: packsswb %xmm1, %xmm0
; SSE-NEXT: pmovmskb %xmm0, %eax ; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: xorl %ecx, %ecx
; SSE-NEXT: cmpl $65535, %eax # imm = 0xFFFF ; SSE-NEXT: cmpl $65535, %eax # imm = 0xFFFF
; SSE-NEXT: movl $-1, %eax ; SSE-NEXT: sete %al
; SSE-NEXT: cmovnel %ecx, %eax ; SSE-NEXT: negb %al
; SSE-NEXT: # kill: def $al killed $al killed $eax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX1-LABEL: bool_reduction_v16i16: ; AVX1-LABEL: bool_reduction_v16i16:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT: vpcmpeqw %xmm2, %xmm3, %xmm2 ; AVX1-NEXT: vpcmpeqw %xmm2, %xmm3, %xmm2
; AVX1-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0 ; AVX1-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpacksswb %xmm2, %xmm0, %xmm0 ; AVX1-NEXT: vpacksswb %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax ; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: xorl %ecx, %ecx
; AVX1-NEXT: cmpl $65535, %eax # imm = 0xFFFF ; AVX1-NEXT: cmpl $65535, %eax # imm = 0xFFFF
; AVX1-NEXT: movl $-1, %eax ; AVX1-NEXT: sete %al
; AVX1-NEXT: cmovnel %ecx, %eax ; AVX1-NEXT: negb %al
; AVX1-NEXT: # kill: def $al killed $al killed $eax
; AVX1-NEXT: vzeroupper ; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq ; AVX1-NEXT: retq
; ;
; AVX2-LABEL: bool_reduction_v16i16: ; AVX2-LABEL: bool_reduction_v16i16:
; AVX2: # %bb.0: ; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpeqw %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: vpcmpeqw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX2-NEXT: vpacksswb %xmm1, %xmm0, %xmm0 ; AVX2-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
; AVX2-NEXT: vpmovmskb %xmm0, %eax ; AVX2-NEXT: vpmovmskb %xmm0, %eax
; AVX2-NEXT: xorl %ecx, %ecx
; AVX2-NEXT: cmpl $65535, %eax # imm = 0xFFFF ; AVX2-NEXT: cmpl $65535, %eax # imm = 0xFFFF
; AVX2-NEXT: movl $-1, %eax ; AVX2-NEXT: sete %al
; AVX2-NEXT: cmovnel %ecx, %eax ; AVX2-NEXT: negb %al
; AVX2-NEXT: # kill: def $al killed $al killed $eax
; AVX2-NEXT: vzeroupper ; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq ; AVX2-NEXT: retq
; ;
; AVX512-LABEL: bool_reduction_v16i16: ; AVX512-LABEL: bool_reduction_v16i16:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vpcmpeqw %ymm1, %ymm0, %k0 ; AVX512-NEXT: vpcmpeqw %ymm1, %ymm0, %k0
; AVX512-NEXT: kshiftrw $8, %k0, %k1 ; AVX512-NEXT: kshiftrw $8, %k0, %k1
; AVX512-NEXT: vpcmpeqw %ymm1, %ymm0, %k0 {%k1} ; AVX512-NEXT: vpcmpeqw %ymm1, %ymm0, %k0 {%k1}
Show All 22 Lines
define i1 @bool_reduction_v32i8(<32 x i8> %x, <32 x i8> %y) { define i1 @bool_reduction_v32i8(<32 x i8> %x, <32 x i8> %y) {
; SSE-LABEL: bool_reduction_v32i8: ; SSE-LABEL: bool_reduction_v32i8:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: pcmpeqb %xmm2, %xmm0 ; SSE-NEXT: pcmpeqb %xmm2, %xmm0
; SSE-NEXT: pcmpeqb %xmm3, %xmm1 ; SSE-NEXT: pcmpeqb %xmm3, %xmm1
; SSE-NEXT: pand %xmm0, %xmm1 ; SSE-NEXT: pand %xmm0, %xmm1
; SSE-NEXT: pmovmskb %xmm1, %eax ; SSE-NEXT: pmovmskb %xmm1, %eax
; SSE-NEXT: xorl %ecx, %ecx
; SSE-NEXT: cmpl $65535, %eax # imm = 0xFFFF ; SSE-NEXT: cmpl $65535, %eax # imm = 0xFFFF
; SSE-NEXT: movl $-1, %eax ; SSE-NEXT: sete %al
; SSE-NEXT: cmovnel %ecx, %eax ; SSE-NEXT: negb %al
; SSE-NEXT: # kill: def $al killed $al killed $eax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX1-LABEL: bool_reduction_v32i8: ; AVX1-LABEL: bool_reduction_v32i8:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm2 ; AVX1-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
; AVX1-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm0 ; AVX1-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm0
Show All 9 Lines
; AVX1-NEXT: vpextrb $0, %xmm0, %eax ; AVX1-NEXT: vpextrb $0, %xmm0, %eax
; AVX1-NEXT: # kill: def $al killed $al killed $eax ; AVX1-NEXT: # kill: def $al killed $al killed $eax
; AVX1-NEXT: vzeroupper ; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq ; AVX1-NEXT: retq
; ;
; AVX2-LABEL: bool_reduction_v32i8: ; AVX2-LABEL: bool_reduction_v32i8:
; AVX2: # %bb.0: ; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpeqb %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: vpcmpeqb %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpmovmskb %ymm0, %ecx ; AVX2-NEXT: vpmovmskb %ymm0, %eax
; AVX2-NEXT: xorl %eax, %eax ; AVX2-NEXT: cmpl $-1, %eax
; AVX2-NEXT: cmpl $-1, %ecx ; AVX2-NEXT: sete %al
; AVX2-NEXT: cmovel %ecx, %eax ; AVX2-NEXT: negb %al
; AVX2-NEXT: # kill: def $al killed $al killed $eax
; AVX2-NEXT: vzeroupper ; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq ; AVX2-NEXT: retq
; ;
; AVX512-LABEL: bool_reduction_v32i8: ; AVX512-LABEL: bool_reduction_v32i8:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vpcmpeqb %ymm1, %ymm0, %k0 ; AVX512-NEXT: vpcmpeqb %ymm1, %ymm0, %k0
; AVX512-NEXT: kshiftrd $16, %k0, %k1 ; AVX512-NEXT: kshiftrd $16, %k0, %k1
; AVX512-NEXT: vpcmpeqb %ymm1, %ymm0, %k0 {%k1} ; AVX512-NEXT: vpcmpeqb %ymm1, %ymm0, %k0 {%k1}
Show All 26 Lines

llvm/test/CodeGen/X86/vector-compare-any_of.ll

Show First 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[2,3,0,1] ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[2,3,0,1]
; SSE-NEXT: por %xmm2, %xmm0 ; SSE-NEXT: por %xmm2, %xmm0
; SSE-NEXT: movq %xmm0, %rax ; SSE-NEXT: movq %xmm0, %rax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX-LABEL: test_v4f64_sext: ; AVX-LABEL: test_v4f64_sext:
; AVX: # %bb.0: ; AVX: # %bb.0:
; AVX-NEXT: vcmpltpd %ymm0, %ymm1, %ymm0 ; AVX-NEXT: vcmpltpd %ymm0, %ymm1, %ymm0
; AVX-NEXT: vmovmskpd %ymm0, %ecx ; AVX-NEXT: vmovmskpd %ymm0, %eax
; AVX-NEXT: xorl %eax, %eax ; AVX-NEXT: negl %eax
; AVX-NEXT: cmpl %ecx, %eax
; AVX-NEXT: sbbq %rax, %rax ; AVX-NEXT: sbbq %rax, %rax
; AVX-NEXT: vzeroupper ; AVX-NEXT: vzeroupper
; AVX-NEXT: retq ; AVX-NEXT: retq
; ;
; AVX512-LABEL: test_v4f64_sext: ; AVX512-LABEL: test_v4f64_sext:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vcmpltpd %ymm0, %ymm1, %ymm0 ; AVX512-NEXT: vcmpltpd %ymm0, %ymm1, %ymm0
; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm1 ; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm1
Show All 15 Lines
define i64 @test_v4f64_legal_sext(<4 x double> %a0, <4 x double> %a1) { define i64 @test_v4f64_legal_sext(<4 x double> %a0, <4 x double> %a1) {
; SSE-LABEL: test_v4f64_legal_sext: ; SSE-LABEL: test_v4f64_legal_sext:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: cmpltpd %xmm1, %xmm3 ; SSE-NEXT: cmpltpd %xmm1, %xmm3
; SSE-NEXT: cmpltpd %xmm0, %xmm2 ; SSE-NEXT: cmpltpd %xmm0, %xmm2
; SSE-NEXT: packssdw %xmm3, %xmm2 ; SSE-NEXT: packssdw %xmm3, %xmm2
; SSE-NEXT: movmskps %xmm2, %eax ; SSE-NEXT: movmskps %xmm2, %eax
; SSE-NEXT: xorl %ecx, %ecx ; SSE-NEXT: negl %eax
; SSE-NEXT: cmpl %eax, %ecx ; SSE-NEXT: sbbl %eax, %eax
; SSE-NEXT: sbbl %ecx, %ecx ; SSE-NEXT: cltq
; SSE-NEXT: movslq %ecx, %rax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX-LABEL: test_v4f64_legal_sext: ; AVX-LABEL: test_v4f64_legal_sext:
; AVX: # %bb.0: ; AVX: # %bb.0:
; AVX-NEXT: vcmpltpd %ymm0, %ymm1, %ymm0 ; AVX-NEXT: vcmpltpd %ymm0, %ymm1, %ymm0
; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1 ; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX-NEXT: vpackssdw %xmm1, %xmm0, %xmm0 ; AVX-NEXT: vpackssdw %xmm1, %xmm0, %xmm0
; AVX-NEXT: vmovmskps %xmm0, %eax ; AVX-NEXT: vmovmskps %xmm0, %eax
; AVX-NEXT: xorl %ecx, %ecx ; AVX-NEXT: negl %eax
; AVX-NEXT: cmpl %eax, %ecx ; AVX-NEXT: sbbl %eax, %eax
; AVX-NEXT: sbbl %ecx, %ecx ; AVX-NEXT: cltq
; AVX-NEXT: movslq %ecx, %rax
; AVX-NEXT: vzeroupper ; AVX-NEXT: vzeroupper
; AVX-NEXT: retq ; AVX-NEXT: retq
; ;
; AVX512-LABEL: test_v4f64_legal_sext: ; AVX512-LABEL: test_v4f64_legal_sext:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vcmpltpd %ymm0, %ymm1, %k1 ; AVX512-NEXT: vcmpltpd %ymm0, %ymm1, %k1
; AVX512-NEXT: vpcmpeqd %xmm0, %xmm0, %xmm0 ; AVX512-NEXT: vpcmpeqd %xmm0, %xmm0, %xmm0
; AVX512-NEXT: vmovdqa32 %xmm0, %xmm0 {%k1} {z} ; AVX512-NEXT: vmovdqa32 %xmm0, %xmm0 {%k1} {z}
Show All 15 Lines; AVX512-NEXT: retq
%6 = sext i32 %5 to i64 %6 = sext i32 %5 to i64
ret i64 %6 ret i64 %6
} }
define i32 @test_v4f32_sext(<4 x float> %a0, <4 x float> %a1) { define i32 @test_v4f32_sext(<4 x float> %a0, <4 x float> %a1) {
; SSE-LABEL: test_v4f32_sext: ; SSE-LABEL: test_v4f32_sext:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: cmpltps %xmm0, %xmm1 ; SSE-NEXT: cmpltps %xmm0, %xmm1
; SSE-NEXT: movmskps %xmm1, %ecx ; SSE-NEXT: movmskps %xmm1, %eax
; SSE-NEXT: xorl %eax, %eax ; SSE-NEXT: negl %eax
; SSE-NEXT: cmpl %ecx, %eax
; SSE-NEXT: sbbl %eax, %eax ; SSE-NEXT: sbbl %eax, %eax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX-LABEL: test_v4f32_sext: ; AVX-LABEL: test_v4f32_sext:
; AVX: # %bb.0: ; AVX: # %bb.0:
; AVX-NEXT: vcmpltps %xmm0, %xmm1, %xmm0 ; AVX-NEXT: vcmpltps %xmm0, %xmm1, %xmm0
; AVX-NEXT: vmovmskps %xmm0, %ecx ; AVX-NEXT: vmovmskps %xmm0, %eax
; AVX-NEXT: xorl %eax, %eax ; AVX-NEXT: negl %eax
; AVX-NEXT: cmpl %ecx, %eax
; AVX-NEXT: sbbl %eax, %eax ; AVX-NEXT: sbbl %eax, %eax
; AVX-NEXT: retq ; AVX-NEXT: retq
; ;
; AVX512-LABEL: test_v4f32_sext: ; AVX512-LABEL: test_v4f32_sext:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vcmpltps %xmm0, %xmm1, %xmm0 ; AVX512-NEXT: vcmpltps %xmm0, %xmm1, %xmm0
; AVX512-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1] ; AVX512-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1]
; AVX512-NEXT: vorps %xmm1, %xmm0, %xmm0 ; AVX512-NEXT: vorps %xmm1, %xmm0, %xmm0
Show All 12 Lines
} }
define i32 @test_v8f32_sext(<8 x float> %a0, <8 x float> %a1) { define i32 @test_v8f32_sext(<8 x float> %a0, <8 x float> %a1) {
; SSE-LABEL: test_v8f32_sext: ; SSE-LABEL: test_v8f32_sext:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: cmpltps %xmm1, %xmm3 ; SSE-NEXT: cmpltps %xmm1, %xmm3
; SSE-NEXT: cmpltps %xmm0, %xmm2 ; SSE-NEXT: cmpltps %xmm0, %xmm2
; SSE-NEXT: orps %xmm3, %xmm2 ; SSE-NEXT: orps %xmm3, %xmm2
; SSE-NEXT: movmskps %xmm2, %ecx ; SSE-NEXT: movmskps %xmm2, %eax
; SSE-NEXT: xorl %eax, %eax ; SSE-NEXT: negl %eax
; SSE-NEXT: cmpl %ecx, %eax
; SSE-NEXT: sbbl %eax, %eax ; SSE-NEXT: sbbl %eax, %eax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX-LABEL: test_v8f32_sext: ; AVX-LABEL: test_v8f32_sext:
; AVX: # %bb.0: ; AVX: # %bb.0:
; AVX-NEXT: vcmpltps %ymm0, %ymm1, %ymm0 ; AVX-NEXT: vcmpltps %ymm0, %ymm1, %ymm0
; AVX-NEXT: vmovmskps %ymm0, %ecx ; AVX-NEXT: vmovmskps %ymm0, %eax
; AVX-NEXT: xorl %eax, %eax ; AVX-NEXT: negl %eax
; AVX-NEXT: cmpl %ecx, %eax
; AVX-NEXT: sbbl %eax, %eax ; AVX-NEXT: sbbl %eax, %eax
; AVX-NEXT: vzeroupper ; AVX-NEXT: vzeroupper
; AVX-NEXT: retq ; AVX-NEXT: retq
; ;
; AVX512-LABEL: test_v8f32_sext: ; AVX512-LABEL: test_v8f32_sext:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vcmpltps %ymm0, %ymm1, %ymm0 ; AVX512-NEXT: vcmpltps %ymm0, %ymm1, %ymm0
; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm1 ; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm1
Show All 18 Lines
} }
define i32 @test_v8f32_legal_sext(<8 x float> %a0, <8 x float> %a1) { define i32 @test_v8f32_legal_sext(<8 x float> %a0, <8 x float> %a1) {
; SSE-LABEL: test_v8f32_legal_sext: ; SSE-LABEL: test_v8f32_legal_sext:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: cmpltps %xmm1, %xmm3 ; SSE-NEXT: cmpltps %xmm1, %xmm3
; SSE-NEXT: cmpltps %xmm0, %xmm2 ; SSE-NEXT: cmpltps %xmm0, %xmm2
; SSE-NEXT: packssdw %xmm3, %xmm2 ; SSE-NEXT: packssdw %xmm3, %xmm2
; SSE-NEXT: pmovmskb %xmm2, %ecx ; SSE-NEXT: pmovmskb %xmm2, %eax
; SSE-NEXT: xorl %eax, %eax ; SSE-NEXT: negl %eax
; SSE-NEXT: cmpl %ecx, %eax
; SSE-NEXT: sbbl %eax, %eax ; SSE-NEXT: sbbl %eax, %eax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX-LABEL: test_v8f32_legal_sext: ; AVX-LABEL: test_v8f32_legal_sext:
; AVX: # %bb.0: ; AVX: # %bb.0:
; AVX-NEXT: vcmpltps %ymm0, %ymm1, %ymm0 ; AVX-NEXT: vcmpltps %ymm0, %ymm1, %ymm0
; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1 ; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX-NEXT: vpackssdw %xmm1, %xmm0, %xmm0 ; AVX-NEXT: vpackssdw %xmm1, %xmm0, %xmm0
; AVX-NEXT: vpmovmskb %xmm0, %ecx ; AVX-NEXT: vpmovmskb %xmm0, %eax
; AVX-NEXT: xorl %eax, %eax ; AVX-NEXT: negl %eax
; AVX-NEXT: cmpl %ecx, %eax
; AVX-NEXT: sbbl %eax, %eax ; AVX-NEXT: sbbl %eax, %eax
; AVX-NEXT: vzeroupper ; AVX-NEXT: vzeroupper
; AVX-NEXT: retq ; AVX-NEXT: retq
; ;
; AVX512-LABEL: test_v8f32_legal_sext: ; AVX512-LABEL: test_v8f32_legal_sext:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vcmpltps %ymm0, %ymm1, %k0 ; AVX512-NEXT: vcmpltps %ymm0, %ymm1, %k0
; AVX512-NEXT: vpmovm2w %k0, %xmm0 ; AVX512-NEXT: vpmovm2w %k0, %xmm0
▲ Show 20 Lines • Show All 65 Lines • ▼ Show 20 Lines
; ;
; AVX1-LABEL: test_v4i64_sext: ; AVX1-LABEL: test_v4i64_sext:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT: vpcmpgtq %xmm2, %xmm3, %xmm2 ; AVX1-NEXT: vpcmpgtq %xmm2, %xmm3, %xmm2
; AVX1-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0 ; AVX1-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 ; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
; AVX1-NEXT: vmovmskpd %ymm0, %ecx ; AVX1-NEXT: vmovmskpd %ymm0, %eax
; AVX1-NEXT: xorl %eax, %eax ; AVX1-NEXT: negl %eax
; AVX1-NEXT: cmpl %ecx, %eax
; AVX1-NEXT: sbbq %rax, %rax ; AVX1-NEXT: sbbq %rax, %rax
; AVX1-NEXT: vzeroupper ; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq ; AVX1-NEXT: retq
; ;
; AVX2-LABEL: test_v4i64_sext: ; AVX2-LABEL: test_v4i64_sext:
; AVX2: # %bb.0: ; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vmovmskpd %ymm0, %ecx ; AVX2-NEXT: vmovmskpd %ymm0, %eax
; AVX2-NEXT: xorl %eax, %eax ; AVX2-NEXT: negl %eax
; AVX2-NEXT: cmpl %ecx, %eax
; AVX2-NEXT: sbbq %rax, %rax ; AVX2-NEXT: sbbq %rax, %rax
; AVX2-NEXT: vzeroupper ; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq ; AVX2-NEXT: retq
; ;
; AVX512-LABEL: test_v4i64_sext: ; AVX512-LABEL: test_v4i64_sext:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0 ; AVX512-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0
; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1 ; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
Show All 15 Lines
define i64 @test_v4i64_legal_sext(<4 x i64> %a0, <4 x i64> %a1) { define i64 @test_v4i64_legal_sext(<4 x i64> %a0, <4 x i64> %a1) {
; SSE-LABEL: test_v4i64_legal_sext: ; SSE-LABEL: test_v4i64_legal_sext:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: pcmpgtq %xmm3, %xmm1 ; SSE-NEXT: pcmpgtq %xmm3, %xmm1
; SSE-NEXT: pcmpgtq %xmm2, %xmm0 ; SSE-NEXT: pcmpgtq %xmm2, %xmm0
; SSE-NEXT: packssdw %xmm1, %xmm0 ; SSE-NEXT: packssdw %xmm1, %xmm0
; SSE-NEXT: movmskps %xmm0, %eax ; SSE-NEXT: movmskps %xmm0, %eax
; SSE-NEXT: xorl %ecx, %ecx ; SSE-NEXT: negl %eax
; SSE-NEXT: cmpl %eax, %ecx ; SSE-NEXT: sbbl %eax, %eax
; SSE-NEXT: sbbl %ecx, %ecx ; SSE-NEXT: cltq
; SSE-NEXT: movslq %ecx, %rax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX1-LABEL: test_v4i64_legal_sext: ; AVX1-LABEL: test_v4i64_legal_sext:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT: vpcmpgtq %xmm2, %xmm3, %xmm2 ; AVX1-NEXT: vpcmpgtq %xmm2, %xmm3, %xmm2
; AVX1-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0 ; AVX1-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpackssdw %xmm2, %xmm0, %xmm0 ; AVX1-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vmovmskps %xmm0, %eax ; AVX1-NEXT: vmovmskps %xmm0, %eax
; AVX1-NEXT: xorl %ecx, %ecx ; AVX1-NEXT: negl %eax
; AVX1-NEXT: cmpl %eax, %ecx ; AVX1-NEXT: sbbl %eax, %eax
; AVX1-NEXT: sbbl %ecx, %ecx ; AVX1-NEXT: cltq
; AVX1-NEXT: movslq %ecx, %rax
; AVX1-NEXT: vzeroupper ; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq ; AVX1-NEXT: retq
; ;
; AVX2-LABEL: test_v4i64_legal_sext: ; AVX2-LABEL: test_v4i64_legal_sext:
; AVX2: # %bb.0: ; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX2-NEXT: vpackssdw %xmm1, %xmm0, %xmm0 ; AVX2-NEXT: vpackssdw %xmm1, %xmm0, %xmm0
; AVX2-NEXT: vmovmskps %xmm0, %eax ; AVX2-NEXT: vmovmskps %xmm0, %eax
; AVX2-NEXT: xorl %ecx, %ecx ; AVX2-NEXT: negl %eax
; AVX2-NEXT: cmpl %eax, %ecx ; AVX2-NEXT: sbbl %eax, %eax
; AVX2-NEXT: sbbl %ecx, %ecx ; AVX2-NEXT: cltq
; AVX2-NEXT: movslq %ecx, %rax
; AVX2-NEXT: vzeroupper ; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq ; AVX2-NEXT: retq
; ;
; AVX512-LABEL: test_v4i64_legal_sext: ; AVX512-LABEL: test_v4i64_legal_sext:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vpcmpgtq %ymm1, %ymm0, %k1 ; AVX512-NEXT: vpcmpgtq %ymm1, %ymm0, %k1
; AVX512-NEXT: vpcmpeqd %xmm0, %xmm0, %xmm0 ; AVX512-NEXT: vpcmpeqd %xmm0, %xmm0, %xmm0
; AVX512-NEXT: vmovdqa32 %xmm0, %xmm0 {%k1} {z} ; AVX512-NEXT: vmovdqa32 %xmm0, %xmm0 {%k1} {z}
Show All 15 Lines; AVX512-NEXT: retq
%6 = sext i32 %5 to i64 %6 = sext i32 %5 to i64
ret i64 %6 ret i64 %6
} }
define i32 @test_v4i32_sext(<4 x i32> %a0, <4 x i32> %a1) { define i32 @test_v4i32_sext(<4 x i32> %a0, <4 x i32> %a1) {
; SSE-LABEL: test_v4i32_sext: ; SSE-LABEL: test_v4i32_sext:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: pcmpgtd %xmm1, %xmm0 ; SSE-NEXT: pcmpgtd %xmm1, %xmm0
; SSE-NEXT: movmskps %xmm0, %ecx ; SSE-NEXT: movmskps %xmm0, %eax
; SSE-NEXT: xorl %eax, %eax ; SSE-NEXT: negl %eax
; SSE-NEXT: cmpl %ecx, %eax
; SSE-NEXT: sbbl %eax, %eax ; SSE-NEXT: sbbl %eax, %eax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX-LABEL: test_v4i32_sext: ; AVX-LABEL: test_v4i32_sext:
; AVX: # %bb.0: ; AVX: # %bb.0:
; AVX-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0 ; AVX-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0
; AVX-NEXT: vmovmskps %xmm0, %ecx ; AVX-NEXT: vmovmskps %xmm0, %eax
; AVX-NEXT: xorl %eax, %eax ; AVX-NEXT: negl %eax
; AVX-NEXT: cmpl %ecx, %eax
; AVX-NEXT: sbbl %eax, %eax ; AVX-NEXT: sbbl %eax, %eax
; AVX-NEXT: retq ; AVX-NEXT: retq
; ;
; AVX512-LABEL: test_v4i32_sext: ; AVX512-LABEL: test_v4i32_sext:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0 ; AVX512-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0 ; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
Show All 12 Lines
} }
define i32 @test_v8i32_sext(<8 x i32> %a0, <8 x i32> %a1) { define i32 @test_v8i32_sext(<8 x i32> %a0, <8 x i32> %a1) {
; SSE-LABEL: test_v8i32_sext: ; SSE-LABEL: test_v8i32_sext:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: pcmpgtd %xmm3, %xmm1 ; SSE-NEXT: pcmpgtd %xmm3, %xmm1
; SSE-NEXT: pcmpgtd %xmm2, %xmm0 ; SSE-NEXT: pcmpgtd %xmm2, %xmm0
; SSE-NEXT: por %xmm1, %xmm0 ; SSE-NEXT: por %xmm1, %xmm0
; SSE-NEXT: movmskps %xmm0, %ecx ; SSE-NEXT: movmskps %xmm0, %eax
; SSE-NEXT: xorl %eax, %eax ; SSE-NEXT: negl %eax
; SSE-NEXT: cmpl %ecx, %eax
; SSE-NEXT: sbbl %eax, %eax ; SSE-NEXT: sbbl %eax, %eax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX1-LABEL: test_v8i32_sext: ; AVX1-LABEL: test_v8i32_sext:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT: vpcmpgtd %xmm2, %xmm3, %xmm2 ; AVX1-NEXT: vpcmpgtd %xmm2, %xmm3, %xmm2
; AVX1-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0 ; AVX1-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 ; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
; AVX1-NEXT: vmovmskps %ymm0, %ecx ; AVX1-NEXT: vmovmskps %ymm0, %eax
; AVX1-NEXT: xorl %eax, %eax ; AVX1-NEXT: negl %eax
; AVX1-NEXT: cmpl %ecx, %eax
; AVX1-NEXT: sbbl %eax, %eax ; AVX1-NEXT: sbbl %eax, %eax
; AVX1-NEXT: vzeroupper ; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq ; AVX1-NEXT: retq
; ;
; AVX2-LABEL: test_v8i32_sext: ; AVX2-LABEL: test_v8i32_sext:
; AVX2: # %bb.0: ; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vmovmskps %ymm0, %ecx ; AVX2-NEXT: vmovmskps %ymm0, %eax
; AVX2-NEXT: xorl %eax, %eax ; AVX2-NEXT: negl %eax
; AVX2-NEXT: cmpl %ecx, %eax
; AVX2-NEXT: sbbl %eax, %eax ; AVX2-NEXT: sbbl %eax, %eax
; AVX2-NEXT: vzeroupper ; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq ; AVX2-NEXT: retq
; ;
; AVX512-LABEL: test_v8i32_sext: ; AVX512-LABEL: test_v8i32_sext:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0 ; AVX512-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0
; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1 ; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
Show All 18 Lines
} }
define i32 @test_v8i32_legal_sext(<8 x i32> %a0, <8 x i32> %a1) { define i32 @test_v8i32_legal_sext(<8 x i32> %a0, <8 x i32> %a1) {
; SSE-LABEL: test_v8i32_legal_sext: ; SSE-LABEL: test_v8i32_legal_sext:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: pcmpgtd %xmm3, %xmm1 ; SSE-NEXT: pcmpgtd %xmm3, %xmm1
; SSE-NEXT: pcmpgtd %xmm2, %xmm0 ; SSE-NEXT: pcmpgtd %xmm2, %xmm0
; SSE-NEXT: packssdw %xmm1, %xmm0 ; SSE-NEXT: packssdw %xmm1, %xmm0
; SSE-NEXT: pmovmskb %xmm0, %ecx ; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: xorl %eax, %eax ; SSE-NEXT: negl %eax
; SSE-NEXT: cmpl %ecx, %eax
; SSE-NEXT: sbbl %eax, %eax ; SSE-NEXT: sbbl %eax, %eax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX1-LABEL: test_v8i32_legal_sext: ; AVX1-LABEL: test_v8i32_legal_sext:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT: vpcmpgtd %xmm2, %xmm3, %xmm2 ; AVX1-NEXT: vpcmpgtd %xmm2, %xmm3, %xmm2
; AVX1-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0 ; AVX1-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpackssdw %xmm2, %xmm0, %xmm0 ; AVX1-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %ecx ; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: xorl %eax, %eax ; AVX1-NEXT: negl %eax
; AVX1-NEXT: cmpl %ecx, %eax
; AVX1-NEXT: sbbl %eax, %eax ; AVX1-NEXT: sbbl %eax, %eax
; AVX1-NEXT: vzeroupper ; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq ; AVX1-NEXT: retq
; ;
; AVX2-LABEL: test_v8i32_legal_sext: ; AVX2-LABEL: test_v8i32_legal_sext:
; AVX2: # %bb.0: ; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX2-NEXT: vpackssdw %xmm1, %xmm0, %xmm0 ; AVX2-NEXT: vpackssdw %xmm1, %xmm0, %xmm0
; AVX2-NEXT: vpmovmskb %xmm0, %ecx ; AVX2-NEXT: vpmovmskb %xmm0, %eax
; AVX2-NEXT: xorl %eax, %eax ; AVX2-NEXT: negl %eax
; AVX2-NEXT: cmpl %ecx, %eax
; AVX2-NEXT: sbbl %eax, %eax ; AVX2-NEXT: sbbl %eax, %eax
; AVX2-NEXT: vzeroupper ; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq ; AVX2-NEXT: retq
; ;
; AVX512-LABEL: test_v8i32_legal_sext: ; AVX512-LABEL: test_v8i32_legal_sext:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vpcmpgtd %ymm1, %ymm0, %k0 ; AVX512-NEXT: vpcmpgtd %ymm1, %ymm0, %k0
; AVX512-NEXT: vpmovm2w %k0, %xmm0 ; AVX512-NEXT: vpmovm2w %k0, %xmm0
Show All 19 Lines; AVX512-NEXT: retq
%8 = sext i16 %7 to i32 %8 = sext i16 %7 to i32
ret i32 %8 ret i32 %8
} }
define i16 @test_v8i16_sext(<8 x i16> %a0, <8 x i16> %a1) { define i16 @test_v8i16_sext(<8 x i16> %a0, <8 x i16> %a1) {
; SSE-LABEL: test_v8i16_sext: ; SSE-LABEL: test_v8i16_sext:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: pcmpgtw %xmm1, %xmm0 ; SSE-NEXT: pcmpgtw %xmm1, %xmm0
; SSE-NEXT: pmovmskb %xmm0, %ecx ; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: xorl %eax, %eax ; SSE-NEXT: negl %eax
; SSE-NEXT: cmpl %ecx, %eax
; SSE-NEXT: sbbl %eax, %eax ; SSE-NEXT: sbbl %eax, %eax
; SSE-NEXT: # kill: def $ax killed $ax killed $eax ; SSE-NEXT: # kill: def $ax killed $ax killed $eax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX-LABEL: test_v8i16_sext: ; AVX-LABEL: test_v8i16_sext:
; AVX: # %bb.0: ; AVX: # %bb.0:
; AVX-NEXT: vpcmpgtw %xmm1, %xmm0, %xmm0 ; AVX-NEXT: vpcmpgtw %xmm1, %xmm0, %xmm0
; AVX-NEXT: vpmovmskb %xmm0, %ecx ; AVX-NEXT: vpmovmskb %xmm0, %eax
; AVX-NEXT: xorl %eax, %eax ; AVX-NEXT: negl %eax
; AVX-NEXT: cmpl %ecx, %eax
; AVX-NEXT: sbbl %eax, %eax ; AVX-NEXT: sbbl %eax, %eax
; AVX-NEXT: # kill: def $ax killed $ax killed $eax ; AVX-NEXT: # kill: def $ax killed $ax killed $eax
; AVX-NEXT: retq ; AVX-NEXT: retq
; ;
; AVX512-LABEL: test_v8i16_sext: ; AVX512-LABEL: test_v8i16_sext:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vpcmpgtw %xmm1, %xmm0, %xmm0 ; AVX512-NEXT: vpcmpgtw %xmm1, %xmm0, %xmm0
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
Show All 18 Lines
} }
define i16 @test_v16i16_sext(<16 x i16> %a0, <16 x i16> %a1) { define i16 @test_v16i16_sext(<16 x i16> %a0, <16 x i16> %a1) {
; SSE-LABEL: test_v16i16_sext: ; SSE-LABEL: test_v16i16_sext:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: pcmpgtw %xmm3, %xmm1 ; SSE-NEXT: pcmpgtw %xmm3, %xmm1
; SSE-NEXT: pcmpgtw %xmm2, %xmm0 ; SSE-NEXT: pcmpgtw %xmm2, %xmm0
; SSE-NEXT: por %xmm1, %xmm0 ; SSE-NEXT: por %xmm1, %xmm0
; SSE-NEXT: pmovmskb %xmm0, %ecx ; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: xorl %eax, %eax ; SSE-NEXT: negl %eax
; SSE-NEXT: cmpl %ecx, %eax
; SSE-NEXT: sbbl %eax, %eax ; SSE-NEXT: sbbl %eax, %eax
; SSE-NEXT: # kill: def $ax killed $ax killed $eax ; SSE-NEXT: # kill: def $ax killed $ax killed $eax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX1-LABEL: test_v16i16_sext: ; AVX1-LABEL: test_v16i16_sext:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
Show All 9 Lines
; AVX1-NEXT: vmovd %xmm0, %eax ; AVX1-NEXT: vmovd %xmm0, %eax
; AVX1-NEXT: # kill: def $ax killed $ax killed $eax ; AVX1-NEXT: # kill: def $ax killed $ax killed $eax
; AVX1-NEXT: vzeroupper ; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq ; AVX1-NEXT: retq
; ;
; AVX2-LABEL: test_v16i16_sext: ; AVX2-LABEL: test_v16i16_sext:
; AVX2: # %bb.0: ; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpgtw %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: vpcmpgtw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpmovmskb %ymm0, %ecx ; AVX2-NEXT: vpmovmskb %ymm0, %eax
; AVX2-NEXT: xorl %eax, %eax ; AVX2-NEXT: negl %eax
; AVX2-NEXT: cmpl %ecx, %eax
; AVX2-NEXT: sbbl %eax, %eax ; AVX2-NEXT: sbbl %eax, %eax
; AVX2-NEXT: # kill: def $ax killed $ax killed $eax ; AVX2-NEXT: # kill: def $ax killed $ax killed $eax
; AVX2-NEXT: vzeroupper ; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq ; AVX2-NEXT: retq
; ;
; AVX512-LABEL: test_v16i16_sext: ; AVX512-LABEL: test_v16i16_sext:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vpcmpgtw %ymm1, %ymm0, %ymm0 ; AVX512-NEXT: vpcmpgtw %ymm1, %ymm0, %ymm0
Show All 24 Lines
} }
define i16 @test_v16i16_legal_sext(<16 x i16> %a0, <16 x i16> %a1) { define i16 @test_v16i16_legal_sext(<16 x i16> %a0, <16 x i16> %a1) {
; SSE-LABEL: test_v16i16_legal_sext: ; SSE-LABEL: test_v16i16_legal_sext:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: pcmpgtw %xmm3, %xmm1 ; SSE-NEXT: pcmpgtw %xmm3, %xmm1
; SSE-NEXT: pcmpgtw %xmm2, %xmm0 ; SSE-NEXT: pcmpgtw %xmm2, %xmm0
; SSE-NEXT: packsswb %xmm1, %xmm0 ; SSE-NEXT: packsswb %xmm1, %xmm0
; SSE-NEXT: pmovmskb %xmm0, %ecx ; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: xorl %eax, %eax ; SSE-NEXT: negl %eax
; SSE-NEXT: cmpl %ecx, %eax ; SSE-NEXT: sbbw %ax, %ax
; SSE-NEXT: sbbl %eax, %eax
; SSE-NEXT: # kill: def $ax killed $ax killed $eax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX1-LABEL: test_v16i16_legal_sext: ; AVX1-LABEL: test_v16i16_legal_sext:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT: vpcmpgtw %xmm2, %xmm3, %xmm2 ; AVX1-NEXT: vpcmpgtw %xmm2, %xmm3, %xmm2
; AVX1-NEXT: vpcmpgtw %xmm1, %xmm0, %xmm0 ; AVX1-NEXT: vpcmpgtw %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpacksswb %xmm2, %xmm0, %xmm0 ; AVX1-NEXT: vpacksswb %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %ecx ; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: xorl %eax, %eax ; AVX1-NEXT: negl %eax
; AVX1-NEXT: cmpl %ecx, %eax ; AVX1-NEXT: sbbw %ax, %ax
; AVX1-NEXT: sbbl %eax, %eax
; AVX1-NEXT: # kill: def $ax killed $ax killed $eax
; AVX1-NEXT: vzeroupper ; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq ; AVX1-NEXT: retq
; ;
; AVX2-LABEL: test_v16i16_legal_sext: ; AVX2-LABEL: test_v16i16_legal_sext:
; AVX2: # %bb.0: ; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpgtw %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: vpcmpgtw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX2-NEXT: vpacksswb %xmm1, %xmm0, %xmm0 ; AVX2-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
; AVX2-NEXT: vpmovmskb %xmm0, %ecx ; AVX2-NEXT: vpmovmskb %xmm0, %eax
; AVX2-NEXT: xorl %eax, %eax ; AVX2-NEXT: negl %eax
; AVX2-NEXT: cmpl %ecx, %eax ; AVX2-NEXT: sbbw %ax, %ax
; AVX2-NEXT: sbbl %eax, %eax
; AVX2-NEXT: # kill: def $ax killed $ax killed $eax
; AVX2-NEXT: vzeroupper ; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq ; AVX2-NEXT: retq
; ;
; AVX512-LABEL: test_v16i16_legal_sext: ; AVX512-LABEL: test_v16i16_legal_sext:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vpcmpgtw %ymm1, %ymm0, %k0 ; AVX512-NEXT: vpcmpgtw %ymm1, %ymm0, %k0
; AVX512-NEXT: vpmovm2b %k0, %xmm0 ; AVX512-NEXT: vpmovm2b %k0, %xmm0
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
Show All 23 Lines; AVX512-NEXT: retq
%10 = sext i8 %9 to i16 %10 = sext i8 %9 to i16
ret i16 %10 ret i16 %10
} }
define i8 @test_v16i8_sext(<16 x i8> %a0, <16 x i8> %a1) { define i8 @test_v16i8_sext(<16 x i8> %a0, <16 x i8> %a1) {
; SSE-LABEL: test_v16i8_sext: ; SSE-LABEL: test_v16i8_sext:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: pcmpgtb %xmm1, %xmm0 ; SSE-NEXT: pcmpgtb %xmm1, %xmm0
; SSE-NEXT: pmovmskb %xmm0, %ecx ; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: xorl %eax, %eax ; SSE-NEXT: negl %eax
; SSE-NEXT: cmpl %ecx, %eax ; SSE-NEXT: sbbb %al, %al
; SSE-NEXT: sbbl %eax, %eax
; SSE-NEXT: # kill: def $al killed $al killed $eax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX-LABEL: test_v16i8_sext: ; AVX-LABEL: test_v16i8_sext:
; AVX: # %bb.0: ; AVX: # %bb.0:
; AVX-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm0 ; AVX-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm0
; AVX-NEXT: vpmovmskb %xmm0, %ecx ; AVX-NEXT: vpmovmskb %xmm0, %eax
; AVX-NEXT: xorl %eax, %eax ; AVX-NEXT: negl %eax
; AVX-NEXT: cmpl %ecx, %eax ; AVX-NEXT: sbbb %al, %al
; AVX-NEXT: sbbl %eax, %eax
; AVX-NEXT: # kill: def $al killed $al killed $eax
; AVX-NEXT: retq ; AVX-NEXT: retq
; ;
; AVX512-LABEL: test_v16i8_sext: ; AVX512-LABEL: test_v16i8_sext:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm0 ; AVX512-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm0
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0 ; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
Show All 20 Lines
} }
define i8 @test_v32i8_sext(<32 x i8> %a0, <32 x i8> %a1) { define i8 @test_v32i8_sext(<32 x i8> %a0, <32 x i8> %a1) {
; SSE-LABEL: test_v32i8_sext: ; SSE-LABEL: test_v32i8_sext:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: pcmpgtb %xmm3, %xmm1 ; SSE-NEXT: pcmpgtb %xmm3, %xmm1
; SSE-NEXT: pcmpgtb %xmm2, %xmm0 ; SSE-NEXT: pcmpgtb %xmm2, %xmm0
; SSE-NEXT: por %xmm1, %xmm0 ; SSE-NEXT: por %xmm1, %xmm0
; SSE-NEXT: pmovmskb %xmm0, %ecx ; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: xorl %eax, %eax ; SSE-NEXT: negl %eax
; SSE-NEXT: cmpl %ecx, %eax ; SSE-NEXT: sbbb %al, %al
; SSE-NEXT: sbbl %eax, %eax
; SSE-NEXT: # kill: def $al killed $al killed $eax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX1-LABEL: test_v32i8_sext: ; AVX1-LABEL: test_v32i8_sext:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT: vpcmpgtb %xmm2, %xmm3, %xmm2 ; AVX1-NEXT: vpcmpgtb %xmm2, %xmm3, %xmm2
; AVX1-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm0 ; AVX1-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm0
Show All 9 Lines
; AVX1-NEXT: vpextrb $0, %xmm0, %eax ; AVX1-NEXT: vpextrb $0, %xmm0, %eax
; AVX1-NEXT: # kill: def $al killed $al killed $eax ; AVX1-NEXT: # kill: def $al killed $al killed $eax
; AVX1-NEXT: vzeroupper ; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq ; AVX1-NEXT: retq
; ;
; AVX2-LABEL: test_v32i8_sext: ; AVX2-LABEL: test_v32i8_sext:
; AVX2: # %bb.0: ; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpgtb %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: vpcmpgtb %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpmovmskb %ymm0, %ecx ; AVX2-NEXT: vpmovmskb %ymm0, %eax
; AVX2-NEXT: xorl %eax, %eax ; AVX2-NEXT: negl %eax
; AVX2-NEXT: cmpl %ecx, %eax ; AVX2-NEXT: sbbb %al, %al
; AVX2-NEXT: sbbl %eax, %eax
; AVX2-NEXT: # kill: def $al killed $al killed $eax
; AVX2-NEXT: vzeroupper ; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq ; AVX2-NEXT: retq
; ;
; AVX512-LABEL: test_v32i8_sext: ; AVX512-LABEL: test_v32i8_sext:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vpcmpgtb %ymm1, %ymm0, %ymm0 ; AVX512-NEXT: vpcmpgtb %ymm1, %ymm0, %ymm0
; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1 ; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0 ; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
▲ Show 20 Lines • Show All 386 Lines • ▼ Show 20 Lines; AVX512-NEXT: retq
%e = extractelement <8 x i1> %d, i32 0 %e = extractelement <8 x i1> %d, i32 0
ret i1 %e ret i1 %e
} }
define i1 @bool_reduction_v16i8(<16 x i8> %x, <16 x i8> %y) { define i1 @bool_reduction_v16i8(<16 x i8> %x, <16 x i8> %y) {
; SSE-LABEL: bool_reduction_v16i8: ; SSE-LABEL: bool_reduction_v16i8:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: pcmpgtb %xmm1, %xmm0 ; SSE-NEXT: pcmpgtb %xmm1, %xmm0
; SSE-NEXT: pmovmskb %xmm0, %ecx ; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: xorl %eax, %eax ; SSE-NEXT: negl %eax
; SSE-NEXT: cmpl %ecx, %eax ; SSE-NEXT: sbbb %al, %al
; SSE-NEXT: sbbl %eax, %eax
; SSE-NEXT: # kill: def $al killed $al killed $eax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX-LABEL: bool_reduction_v16i8: ; AVX-LABEL: bool_reduction_v16i8:
; AVX: # %bb.0: ; AVX: # %bb.0:
; AVX-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm0 ; AVX-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm0
; AVX-NEXT: vpmovmskb %xmm0, %ecx ; AVX-NEXT: vpmovmskb %xmm0, %eax
; AVX-NEXT: xorl %eax, %eax ; AVX-NEXT: negl %eax
; AVX-NEXT: cmpl %ecx, %eax ; AVX-NEXT: sbbb %al, %al
; AVX-NEXT: sbbl %eax, %eax
; AVX-NEXT: # kill: def $al killed $al killed $eax
; AVX-NEXT: retq ; AVX-NEXT: retq
; ;
; AVX512-LABEL: bool_reduction_v16i8: ; AVX512-LABEL: bool_reduction_v16i8:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vpcmpgtb %xmm1, %xmm0, %k0 ; AVX512-NEXT: vpcmpgtb %xmm1, %xmm0, %k0
; AVX512-NEXT: kshiftrw $8, %k0, %k1 ; AVX512-NEXT: kshiftrw $8, %k0, %k1
; AVX512-NEXT: korw %k0, %k1, %k0 ; AVX512-NEXT: korw %k0, %k1, %k0
; AVX512-NEXT: kshiftrw $4, %k0, %k1 ; AVX512-NEXT: kshiftrw $4, %k0, %k1
▲ Show 20 Lines • Show All 180 Lines • ▼ Show 20 Lines
} }
define i1 @bool_reduction_v16i16(<16 x i16> %x, <16 x i16> %y) { define i1 @bool_reduction_v16i16(<16 x i16> %x, <16 x i16> %y) {
; SSE-LABEL: bool_reduction_v16i16: ; SSE-LABEL: bool_reduction_v16i16:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: pcmpeqw %xmm3, %xmm1 ; SSE-NEXT: pcmpeqw %xmm3, %xmm1
; SSE-NEXT: pcmpeqw %xmm2, %xmm0 ; SSE-NEXT: pcmpeqw %xmm2, %xmm0
; SSE-NEXT: packsswb %xmm1, %xmm0 ; SSE-NEXT: packsswb %xmm1, %xmm0
; SSE-NEXT: pmovmskb %xmm0, %ecx ; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: xorl %eax, %eax ; SSE-NEXT: negl %eax
; SSE-NEXT: cmpl %ecx, %eax ; SSE-NEXT: sbbb %al, %al
; SSE-NEXT: sbbl %eax, %eax
; SSE-NEXT: # kill: def $al killed $al killed $eax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX1-LABEL: bool_reduction_v16i16: ; AVX1-LABEL: bool_reduction_v16i16:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT: vpcmpeqw %xmm2, %xmm3, %xmm2 ; AVX1-NEXT: vpcmpeqw %xmm2, %xmm3, %xmm2
; AVX1-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0 ; AVX1-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpacksswb %xmm2, %xmm0, %xmm0 ; AVX1-NEXT: vpacksswb %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %ecx ; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: xorl %eax, %eax ; AVX1-NEXT: negl %eax
; AVX1-NEXT: cmpl %ecx, %eax ; AVX1-NEXT: sbbb %al, %al
; AVX1-NEXT: sbbl %eax, %eax
; AVX1-NEXT: # kill: def $al killed $al killed $eax
; AVX1-NEXT: vzeroupper ; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq ; AVX1-NEXT: retq
; ;
; AVX2-LABEL: bool_reduction_v16i16: ; AVX2-LABEL: bool_reduction_v16i16:
; AVX2: # %bb.0: ; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpeqw %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: vpcmpeqw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX2-NEXT: vpacksswb %xmm1, %xmm0, %xmm0 ; AVX2-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
; AVX2-NEXT: vpmovmskb %xmm0, %ecx ; AVX2-NEXT: vpmovmskb %xmm0, %eax
; AVX2-NEXT: xorl %eax, %eax ; AVX2-NEXT: negl %eax
; AVX2-NEXT: cmpl %ecx, %eax ; AVX2-NEXT: sbbb %al, %al
; AVX2-NEXT: sbbl %eax, %eax
; AVX2-NEXT: # kill: def $al killed $al killed $eax
; AVX2-NEXT: vzeroupper ; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq ; AVX2-NEXT: retq
; ;
; AVX512-LABEL: bool_reduction_v16i16: ; AVX512-LABEL: bool_reduction_v16i16:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vpcmpeqw %ymm1, %ymm0, %k0 ; AVX512-NEXT: vpcmpeqw %ymm1, %ymm0, %k0
; AVX512-NEXT: kshiftrw $8, %k0, %k1 ; AVX512-NEXT: kshiftrw $8, %k0, %k1
; AVX512-NEXT: korw %k0, %k1, %k0 ; AVX512-NEXT: korw %k0, %k1, %k0
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} }
define i1 @bool_reduction_v32i8(<32 x i8> %x, <32 x i8> %y) { define i1 @bool_reduction_v32i8(<32 x i8> %x, <32 x i8> %y) {
; SSE-LABEL: bool_reduction_v32i8: ; SSE-LABEL: bool_reduction_v32i8:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: pcmpeqb %xmm2, %xmm0 ; SSE-NEXT: pcmpeqb %xmm2, %xmm0
; SSE-NEXT: pcmpeqb %xmm3, %xmm1 ; SSE-NEXT: pcmpeqb %xmm3, %xmm1
; SSE-NEXT: por %xmm0, %xmm1 ; SSE-NEXT: por %xmm0, %xmm1
; SSE-NEXT: pmovmskb %xmm1, %ecx ; SSE-NEXT: pmovmskb %xmm1, %eax
; SSE-NEXT: xorl %eax, %eax ; SSE-NEXT: negl %eax
; SSE-NEXT: cmpl %ecx, %eax ; SSE-NEXT: sbbb %al, %al
; SSE-NEXT: sbbl %eax, %eax
; SSE-NEXT: # kill: def $al killed $al killed $eax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX1-LABEL: bool_reduction_v32i8: ; AVX1-LABEL: bool_reduction_v32i8:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm2 ; AVX1-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
; AVX1-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm0 ; AVX1-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm0
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; AVX1-NEXT: vpextrb $0, %xmm0, %eax ; AVX1-NEXT: vpextrb $0, %xmm0, %eax
; AVX1-NEXT: # kill: def $al killed $al killed $eax ; AVX1-NEXT: # kill: def $al killed $al killed $eax
; AVX1-NEXT: vzeroupper ; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq ; AVX1-NEXT: retq
; ;
; AVX2-LABEL: bool_reduction_v32i8: ; AVX2-LABEL: bool_reduction_v32i8:
; AVX2: # %bb.0: ; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpeqb %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: vpcmpeqb %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpmovmskb %ymm0, %ecx ; AVX2-NEXT: vpmovmskb %ymm0, %eax
; AVX2-NEXT: xorl %eax, %eax ; AVX2-NEXT: negl %eax
; AVX2-NEXT: cmpl %ecx, %eax ; AVX2-NEXT: sbbb %al, %al
; AVX2-NEXT: sbbl %eax, %eax
; AVX2-NEXT: # kill: def $al killed $al killed $eax
; AVX2-NEXT: vzeroupper ; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq ; AVX2-NEXT: retq
; ;
; AVX512-LABEL: bool_reduction_v32i8: ; AVX512-LABEL: bool_reduction_v32i8:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vpcmpeqb %ymm1, %ymm0, %k0 ; AVX512-NEXT: vpcmpeqb %ymm1, %ymm0, %k0
; AVX512-NEXT: kshiftrd $16, %k0, %k1 ; AVX512-NEXT: kshiftrd $16, %k0, %k1
; AVX512-NEXT: kord %k0, %k1, %k0 ; AVX512-NEXT: kord %k0, %k1, %k0
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