[AMDGPU][MC] Corrected truncation rules for integer inlinable constants to match rules for literals

[dp]

Summary

See bug 40806: https://bugs.llvm.org/show_bug.cgi?id=40806

Truncation rules used before this change are described here:

literals: https://llvm.org/docs/AMDGPUOperandSyntax.html#integer-literals
inlinable constants: https://llvm.org/docs/AMDGPUOperandSyntax.html#integer-inline-constants

[artem.tamazov]

LGTM

llvm/trunk/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp

if (Status != APFloat::opOK &&
       ((Status & APFloat::opOverflow)  != 0 ||
        (Status & APFloat::opUnderflow) != 0)) {
     return false;
   }
 
   return true;
 }
 
+static bool isSafeTruncation(int64_t Val, unsigned Size) {
+  return isUIntN(Size, Val) || isIntN(Size, Val);
+}
+
 bool AMDGPUOperand::isInlinableImm(MVT type) const {
 
   // This is a hack to enable named inline values like
   // shared_base with both 32-bit and 64-bit operands.
   // Note that these values are defined as
   // 32-bit operands only.
   if (isInlineValue()) {
     return true;
bool AMDGPUOperand::isInlinableImm(MVT type) const {
   }
 
   // We got int literal token.
   if (type == MVT::f64 || type == MVT::i64) { // Expected 64-bit operand
     return AMDGPU::isInlinableLiteral64(Imm.Val,
                                         AsmParser->hasInv2PiInlineImm());
   }
 
+  if (!isSafeTruncation(Imm.Val, type.getScalarSizeInBits())) {
+    return false;
+  }
+
   if (type.getScalarSizeInBits() == 16) {
     return AMDGPU::isInlinableLiteral16(
       static_cast<int16_t>(Literal.getLoBits(16).getSExtValue()),
       AsmParser->hasInv2PiInlineImm());
   }
 
   return AMDGPU::isInlinableLiteral32(
     static_cast<int32_t>(Literal.getLoBits(32).getZExtValue()),
if (!Imm.IsFPImm) {
     }
 
     unsigned Size = type.getSizeInBits();
     if (Size == 64)
       Size = 32;
 
     // FIXME: 64-bit operands can zero extend, sign extend, or pad zeroes for FP
     // types.
-    return isUIntN(Size, Imm.Val) || isIntN(Size, Imm.Val);
+    return isSafeTruncation(Imm.Val, Size);
   }
 
   // We got fp literal token
   if (type == MVT::f64) { // Expected 64-bit fp operand
     // We would set low 64-bits of literal to zeroes but we accept this literals
     return true;
   }
 
case AMDGPU::OPERAND_REG_INLINE_C_V2FP16: {
       APFloat FPLiteral(APFloat::IEEEdouble(), Literal);
       // Convert literal to single precision
       FPLiteral.convert(*getOpFltSemantics(OpTy),
                         APFloat::rmNearestTiesToEven, &lost);
       // We allow precision lost but not overflow or underflow. This should be
       // checked earlier in isLiteralImm()
 
       uint64_t ImmVal = FPLiteral.bitcastToAPInt().getZExtValue();
-      if (OpTy == AMDGPU::OPERAND_REG_INLINE_C_V2INT16 ||
-          OpTy == AMDGPU::OPERAND_REG_INLINE_C_V2FP16) {
-        ImmVal |= (ImmVal << 16);
-      }
-
       Inst.addOperand(MCOperand::createImm(ImmVal));
       return;
     }
     default:
       llvm_unreachable("invalid operand size");
     }
 
     return;
   }
 
-   // We got int literal token.
   // Only sign extend inline immediates.
-  // FIXME: No errors on truncation
   switch (OpTy) {
   case AMDGPU::OPERAND_REG_IMM_INT32:
   case AMDGPU::OPERAND_REG_IMM_FP32:
   case AMDGPU::OPERAND_REG_INLINE_C_INT32:
   case AMDGPU::OPERAND_REG_INLINE_C_FP32:
-    if (isInt<32>(Val) &&
+    if (isSafeTruncation(Val, 32) &&
         AMDGPU::isInlinableLiteral32(static_cast<int32_t>(Val),
                                      AsmParser->hasInv2PiInlineImm())) {
       Inst.addOperand(MCOperand::createImm(Val));
       return;
     }
 
     Inst.addOperand(MCOperand::createImm(Val & 0xffffffff));
     return;
case AMDGPU::OPERAND_REG_INLINE_C_FP64:
 
     Inst.addOperand(MCOperand::createImm(Lo_32(Val)));
     return;
 
   case AMDGPU::OPERAND_REG_IMM_INT16:
   case AMDGPU::OPERAND_REG_IMM_FP16:
   case AMDGPU::OPERAND_REG_INLINE_C_INT16:
   case AMDGPU::OPERAND_REG_INLINE_C_FP16:
-    if (isInt<16>(Val) &&
+    if (isSafeTruncation(Val, 16) &&
         AMDGPU::isInlinableLiteral16(static_cast<int16_t>(Val),
                                      AsmParser->hasInv2PiInlineImm())) {
       Inst.addOperand(MCOperand::createImm(Val));
       return;
     }
 
     Inst.addOperand(MCOperand::createImm(Val & 0xffff));
     return;
 
   case AMDGPU::OPERAND_REG_INLINE_C_V2INT16:
   case AMDGPU::OPERAND_REG_INLINE_C_V2FP16: {
-    auto LiteralVal = static_cast<uint16_t>(Literal.getLoBits(16).getZExtValue());
-    assert(AMDGPU::isInlinableLiteral16(LiteralVal,
+    assert(isSafeTruncation(Val, 16));
+    assert(AMDGPU::isInlinableLiteral16(static_cast<int16_t>(Val),
                                         AsmParser->hasInv2PiInlineImm()));
 
-    uint32_t ImmVal = static_cast<uint32_t>(LiteralVal) << 16 |
-                      static_cast<uint32_t>(LiteralVal);
-    Inst.addOperand(MCOperand::createImm(ImmVal));
+    Inst.addOperand(MCOperand::createImm(Val));
     return;
   }
   default:
     llvm_unreachable("invalid operand size");
   }
 }
 
 template <unsigned Bitwidth>

llvm/trunk/test/MC/AMDGPU/literal16-err.s

-// XFAIL: *
 // RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s 2>&1 | FileCheck -check-prefix=NOVI %s
 
 v_add_f16 v1, 0xfffff, v2
-// NOVI: 19: error: invalid operand for instruction
+// NOVI: error: invalid operand for instruction
 
 v_add_f16 v1, 0x10000, v2
-// NOVI: 19: error: invalid operand for instruction
+// NOVI: error: invalid operand for instruction
 
-v_add_f16 v1, v2, -0.0
-v_add_f16 v1, v2, 1
+v_add_f16 v1, 0xffffffffffff000f, v2
+// NOVI: error: invalid operand for instruction
 
+v_add_f16 v1, 0x1000ffff, v2
+// NOVI: error: invalid operand for instruction
 
-
-// FIXME: Should give truncate error
 v_add_f16 v1, -32769, v2
+// NOVI: error: invalid operand for instruction
+
 v_add_f16 v1, 65536, v2
+// NOVI: error: invalid operand for instruction
 
 v_add_f32 v1, 4294967296, v2
+// NOVI: error: invalid operand for instruction
+
 v_add_f32 v1, 0x0000000100000000, v2
+// NOVI: error: invalid operand for instruction
+
 v_and_b32 v1, 0x0000000100000000, v2
+// NOVI: error: invalid operand for instruction

llvm/trunk/test/MC/AMDGPU/literals.s

 // RUN: not llvm-mc -arch=amdgcn -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=SI --check-prefix=SICI
 // RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=SI --check-prefix=SICI
 // RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=SICI --check-prefix=CIVI
 // RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=CIVI --check-prefix=GFX89
 // RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=CIVI --check-prefix=GFX89 --check-prefix=GFX9
 
-// RUN: not llvm-mc -arch=amdgcn -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSI --check-prefix=NOSICI --check-prefix=NOSICIVI
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSI --check-prefix=NOSICI --check-prefix=NOSICIVI
-// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSICI --check-prefix=NOCIVI --check-prefix=NOSICIVI
-// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSICIVI -check-prefix=NOVI -check-prefix=NOGFX89
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s 2>&1 | FileCheck %s -check-prefix=NOGFX89 -check-prefix=NOGFX9
+// RUN: not llvm-mc -arch=amdgcn -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOGCN --check-prefix=NOSI --check-prefix=NOSICI --check-prefix=NOSICIVI
+// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOGCN --check-prefix=NOSI --check-prefix=NOSICI --check-prefix=NOSICIVI
+// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOGCN --check-prefix=NOSICI --check-prefix=NOCIVI --check-prefix=NOSICIVI
+// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOGCN --check-prefix=NOSICIVI --check-prefix=NOVI --check-prefix=NOGFX89
+// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOGCN --check-prefix=NOGFX89 --check-prefix=NOGFX9
 
 //---------------------------------------------------------------------------//
 // fp literal, expected fp operand
 //---------------------------------------------------------------------------//
 
 // SICI: v_fract_f64_e32 v[0:1], 0.5 ; encoding: [0xf0,0x7c,0x00,0x7e]
 // GFX89: v_fract_f64_e32 v[0:1], 0.5 ; encoding: [0xf0,0x64,0x00,0x7e]
 v_fract_f64 v[0:1], 0.5

 // GFX89: v_fract_f64_e32 v[0:1], 0.15915494309189532 ; encoding: [0xf8,0x64,0x00,0x7e]
 v_fract_f64 v[0:1], 0.159154943091895317852646485335
 
 // SICI: v_trunc_f32_e32 v0, 0x3e22f983 ; encoding: [0xff,0x42,0x00,0x7e,0x83,0xf9,0x22,0x3e]
 // GFX89: v_trunc_f32_e32 v0, 0.15915494 ; encoding: [0xf8,0x38,0x00,0x7e]
 v_trunc_f32 v0, 0.159154943091895317852646485335
 
 //---------------------------------------------------------------------------//
+// integer literal truncation checks
+//---------------------------------------------------------------------------//
+
+// NOGCN: error: invalid operand for instruction
+s_mov_b32 s0, 0x101ffffffff
+
+// NOGCN: error: invalid operand for instruction
+s_mov_b32 s0, 0x1000000001
+
+// NOGCN: error: invalid operand for instruction
+s_mov_b32 s0, 0x1000000fff
+
+// NOGCN: error: invalid operand for instruction
+v_trunc_f32 v0, 0x1fffffffff0
+
+// NOGCN: error: invalid operand for instruction
+v_trunc_f32 v0, 0x100000001
+
+// NOGCN: error: invalid operand for instruction
+v_trunc_f32 v0, 0x1fffffff000
+
+// NOGCN: error: invalid operand for instruction
+s_mov_b64 s[0:1], 0x101ffffffff
+
+// NOGCN: error: invalid operand for instruction
+s_mov_b64 s[0:1], 0x1000000001
+
+// NOGCN: error: invalid operand for instruction
+s_mov_b64 s[0:1], 0x1000000fff
+
+// NOGCN: error: invalid operand for instruction
+v_trunc_f64 v[0:1], 0x1fffffffff0
+
+// NOGCN: error: invalid operand for instruction
+v_trunc_f64 v[0:1], 0x100000001
+
+// NOGCN: error: invalid operand for instruction
+v_trunc_f64 v[0:1], 0x1fffffff000
+
+//---------------------------------------------------------------------------//
 // named inline values like shared_base
 //---------------------------------------------------------------------------//
 
 // NOSICIVI: error: not a valid operand.
 // GFX9: buffer_atomic_add v0, off, s[0:3], src_shared_base offset:4095 ; encoding: [0xff,0x0f,0x08,0xe1,0x00,0x00,0x00,0xeb]
 buffer_atomic_add v0, off, s[0:3], src_shared_base offset:4095
 
 // NOSICIVI: error: not a valid operand.

llvm/trunk/test/MC/AMDGPU/literalv216-err.s

 // RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s 2>&1 | FileCheck -check-prefix=GFX9 %s
 
 v_pk_add_f16 v1, -17, v2
-// GFX9: :19: error: invalid operand for instruction
+// GFX9: error: invalid operand for instruction
 
 v_pk_add_f16 v1, 65, v2
-// GFX9: :18: error: invalid operand for instruction
+// GFX9: error: invalid operand for instruction
 
 v_pk_add_f16 v1, 64.0, v2
-// GFX9: :18: error: invalid operand for instruction
+// GFX9: error: invalid operand for instruction
 
 v_pk_add_f16 v1, -0.15915494, v2
-// GFX9: :19: error: invalid operand for instruction
+// GFX9: error: invalid operand for instruction
 
 v_pk_add_f16 v1, -0.0, v2
-// GFX9: :19: error: invalid operand for instruction
+// GFX9: error: invalid operand for instruction
 
 v_pk_add_f16 v1, -32768, v2
-// GFX9: :19: error: invalid operand for instruction
+// GFX9: error: invalid operand for instruction
 
 v_pk_add_f16 v1, 32767, v2
-// GFX9: :18: error: invalid operand for instruction
+// GFX9: error: invalid operand for instruction
+
+v_pk_add_f16 v1, 0xffffffffffff000f, v2
+// GFX9: error: invalid operand for instruction
+
+v_pk_add_f16 v1, 0x1000ffff, v2
+// GFX9: error: invalid operand for instruction