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[ARC] Better classify add/sub immediate instructions in frame lowering.
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Authored by petecoup on Mar 13 2019, 1:49 PM.

Details

Summary

Some operations have multiple ARC instructions that are applicable.
For instance, "add r0, r0, 123" can be encoded as a "LImm" instruction
with a 32-bit immediate (8-bytes), or as a signed 12-bit immediate instruction
for the case where the source and destination register are the same (4-bytes).
The ARC assembler will choose the shortest encoding, but we should track
the correct instruction in the compiler.
This patch fixes the instruction used in some cases from ARCFrameLowering.

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Repository
rL LLVM

Event Timeline

petecoup created this revision.Mar 13 2019, 1:49 PM
yan_luo accepted this revision.Mar 13 2019, 3:16 PM
This revision is now accepted and ready to land.Mar 13 2019, 3:16 PM
This revision was automatically updated to reflect the committed changes.