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dantrushin (Denis Antrushin)
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User Since
Aug 28 2018, 7:55 AM (109 w, 1 d)

Recent Activity

Mon, Sep 21

dantrushin committed rGee86688b8175: [Statepoints][ISEL] gc.relocate uniquification should be based on SDValue, not… (authored by dantrushin).
[Statepoints][ISEL] gc.relocate uniquification should be based on SDValue, not…
Mon, Sep 21, 5:45 AM
dantrushin closed D87695: [Statepoints][ISEL] gc.relocate uniquification should be based on SDValue, not IR Value..
Mon, Sep 21, 5:45 AM · Restricted Project

Sat, Sep 19

dantrushin added inline comments to D87488: [ImplicitNullCheck] Hoisting multiple dependencies.
Sat, Sep 19, 11:22 AM · Restricted Project

Fri, Sep 18

dantrushin updated the diff for D87154: [WIP][Statepoints] Change statepoint machine instr format to better suit VReg lowering..

Rebase on tip and use newly added API;
Slightly change GC pointer operand lowering;

Fri, Sep 18, 9:18 AM · Restricted Project
dantrushin requested review of D87915: [WIP][Statepoints] Unlimited tied operands..
Fri, Sep 18, 9:15 AM · Restricted Project

Tue, Sep 15

dantrushin requested review of D87695: [Statepoints][ISEL] gc.relocate uniquification should be based on SDValue, not IR Value..
Tue, Sep 15, 7:46 AM · Restricted Project

Thu, Sep 10

dantrushin added a comment to D87148: [ImplicitNullCheck] Handle Nonzero faulting pages and complex addressing.

Thanks, it reads much better for me now.
Looks good.

Thu, Sep 10, 10:36 AM · Restricted Project

Wed, Sep 9

dantrushin committed rG4358fa782e3d: [Statepoints] Update DAG root after emitting statepoint. (authored by dantrushin).
[Statepoints] Update DAG root after emitting statepoint.
Wed, Sep 9, 6:22 AM
dantrushin closed D87251: [Statepoints] Update DAG root after emitting statepoint..
Wed, Sep 9, 6:22 AM · Restricted Project
dantrushin committed rG2a52c3301a52: [Statepoints] Properly handle const base pointer. (authored by dantrushin).
[Statepoints] Properly handle const base pointer.
Wed, Sep 9, 12:08 AM
dantrushin closed D87252: [Statepoints] Properly handle const base pointer..
Wed, Sep 9, 12:08 AM · Restricted Project

Tue, Sep 8

dantrushin added inline comments to D87148: [ImplicitNullCheck] Handle Nonzero faulting pages and complex addressing.
Tue, Sep 8, 7:29 AM · Restricted Project

Mon, Sep 7

dantrushin requested review of D87252: [Statepoints] Properly handle const base pointer..
Mon, Sep 7, 11:23 AM · Restricted Project
dantrushin requested review of D87251: [Statepoints] Update DAG root after emitting statepoint..
Mon, Sep 7, 11:22 AM · Restricted Project

Fri, Sep 4

dantrushin added a comment to D87154: [WIP][Statepoints] Change statepoint machine instr format to better suit VReg lowering..

Can we come up with better format for gc pointer map (base/derived)?
I wish it were possible to have it in separate psude instruction glued with statepoint. Unfortunately, that seems impossible now.

Fri, Sep 4, 11:56 AM · Restricted Project
dantrushin updated the summary of D87154: [WIP][Statepoints] Change statepoint machine instr format to better suit VReg lowering..
Fri, Sep 4, 11:50 AM · Restricted Project
dantrushin requested review of D87154: [WIP][Statepoints] Change statepoint machine instr format to better suit VReg lowering..
Fri, Sep 4, 11:46 AM · Restricted Project
dantrushin added a comment to D87108: [ImplicitNullCheck] Handle instructions that do not modify null behaviour of null checked reg.

Looks good for me.
The only thing that worries me is shouldn't we have broader audience since we're changing 'global' APIs?

Fri, Sep 4, 4:42 AM · Restricted Project

Thu, Sep 3

dantrushin added inline comments to D87108: [ImplicitNullCheck] Handle instructions that do not modify null behaviour of null checked reg.
Thu, Sep 3, 12:38 PM · Restricted Project

Aug 28 2020

dantrushin committed rGfabd4c1ae1fc: [Statepoint] Always spill base pointer. (authored by dantrushin).
[Statepoint] Always spill base pointer.
Aug 28 2020, 9:22 AM
dantrushin closed D86712: [Statepoint] Always spill base pointer..
Aug 28 2020, 9:22 AM · Restricted Project
dantrushin closed D81603: [WIP] MIR Statepoint refactoring: Pass GC pointergs in VRegs..
Aug 28 2020, 7:51 AM · Restricted Project
dantrushin accepted D81603: [WIP] MIR Statepoint refactoring: Pass GC pointergs in VRegs..

All pieces has been landed, so closing it.
Unfortunately, final result (e.g. ISEL part) diverged quite a bit from this, but idea at large has not changed

Aug 28 2020, 7:51 AM · Restricted Project
dantrushin committed rG248a67f1445d: [Statepoint] Turn assert into check in foldPatchpoint. (authored by dantrushin).
[Statepoint] Turn assert into check in foldPatchpoint.
Aug 28 2020, 6:02 AM

Aug 27 2020

dantrushin requested review of D86712: [Statepoint] Always spill base pointer..
Aug 27 2020, 7:17 AM · Restricted Project

Aug 14 2020

dantrushin committed rG1c80a6ce5f22: [Statepoints] FixupStatepoint: properly set isKill on spilled register. (authored by dantrushin).
[Statepoints] FixupStatepoint: properly set isKill on spilled register.
Aug 14 2020, 8:20 AM
dantrushin added inline comments to D81647: MIR Statepoint refactoring. Part 3: Spill GC Ptr regs..
Aug 14 2020, 8:07 AM · Restricted Project
dantrushin committed rG5f6bee77fad6: [Statepoints] Spill GC Ptr regs in FixupStatepoints. (authored by dantrushin).
[Statepoints] Spill GC Ptr regs in FixupStatepoints.
Aug 14 2020, 6:22 AM
dantrushin closed D81647: MIR Statepoint refactoring. Part 3: Spill GC Ptr regs..
Aug 14 2020, 6:21 AM · Restricted Project
dantrushin accepted D85959: [InstCombine] Remove unused entries in gc-liv bundle of statepoint.

LGTM with couple nits inline

Aug 14 2020, 5:37 AM · Restricted Project

Aug 5 2020

dantrushin closed D81646: MIR Statepoint refactoring. Part 2: Operand folding..

https://reviews.llvm.org/rGd21ce4082181

Aug 5 2020, 8:40 AM · Restricted Project
dantrushin abandoned D83965: MIR Statepoint refactoring. Part 5: Handle non-local relocates in ISEL..
Aug 5 2020, 7:11 AM · Restricted Project
dantrushin committed rGd21ce4082181: [Statepoints] Operand folding in presense of tied registers. (authored by dantrushin).
[Statepoints] Operand folding in presense of tied registers.
Aug 5 2020, 6:19 AM

Aug 4 2020

dantrushin added a comment to D81646: MIR Statepoint refactoring. Part 2: Operand folding..


Attached test will explode if isTied check is removed as suggested.
Essential part is:

%10:gr64 = MOV64rm killed %9, 1, $noreg, 0, $noreg :: (load 8 from %ir.p0, addrspace 1)
%6:gr64, %7:gr64 = STATEPOINT 0, 0, 0, @foo, 2, 0, 2, 0, 2, 0, %8, %8(tied-def 0), killed %10, %0(tied-def 1), ...

It is synthetic (i.e. we do no generate such MIR from any IR), but still not invalid

Aug 4 2020, 11:22 AM · Restricted Project

Aug 3 2020

dantrushin added inline comments to D81647: MIR Statepoint refactoring. Part 3: Spill GC Ptr regs..
Aug 3 2020, 12:24 PM · Restricted Project
dantrushin updated the diff for D81647: MIR Statepoint refactoring. Part 3: Spill GC Ptr regs..
  • Mark MMOs for gc register spill slots as load/store ones;
  • Add assert that there is only one EHPad;
Aug 3 2020, 12:21 PM · Restricted Project
dantrushin added a comment to D84964: [WIP] Demo a functional problem from D81647 with a fix and test case.

I will incorporate this into D81647, since fix will be even simpler there.

Aug 3 2020, 11:33 AM · Restricted Project
dantrushin abandoned D81393: [ScheduleDAG][NFC] Use MCInstrDesc API to check PhysReg definition..

This was landed as part of larger patch (D81648) for which this was a blocker. Abandoning this review.

Aug 3 2020, 9:43 AM · Restricted Project

Jul 17 2020

dantrushin added a comment to D81645: MIR Statepoint refactoring. Part 1: Basic MI level changes..

Hi, I see CodeGen/X86/statepoint-vreg.mir failing with UBSAN enabled on our internal bots:

Jul 17 2020, 11:26 PM · Restricted Project
dantrushin added a comment to D81647: MIR Statepoint refactoring. Part 3: Spill GC Ptr regs..

That EHPad reload tracking does not fit very well in existing design. I added it as a separate entity stored in StatepointProcessor and passed to
StatepointState::insertReloads.
Ideally, I would insert all reloads in a single sweep after all statepoints has been processed. But I did not find a clean way to do that without refactoring
(like merging StatepointStates functionality into`StatepointProcessor`).

Jul 17 2020, 8:42 AM · Restricted Project
dantrushin updated the diff for D81647: MIR Statepoint refactoring. Part 3: Spill GC Ptr regs..

Add tracking of reloads inserted in landing pads.

Jul 17 2020, 8:31 AM · Restricted Project

Jul 16 2020

dantrushin committed rGe04fe9aefd4b: [Statepoint] Fix bug found by sanitaizer. (authored by dantrushin).
[Statepoint] Fix bug found by sanitaizer.
Jul 16 2020, 1:07 PM
dantrushin committed rGef658ebd6292: MIR Statepoint refactoring. Part 1: Basic MI level changes. (authored by dantrushin).
MIR Statepoint refactoring. Part 1: Basic MI level changes.
Jul 16 2020, 10:58 AM
dantrushin closed D81645: MIR Statepoint refactoring. Part 1: Basic MI level changes..
Jul 16 2020, 10:58 AM · Restricted Project
dantrushin updated the diff for D81603: [WIP] MIR Statepoint refactoring: Pass GC pointergs in VRegs..

Update to reflect current state of development

Jul 16 2020, 10:19 AM · Restricted Project
dantrushin updated the diff for D83965: MIR Statepoint refactoring. Part 5: Handle non-local relocates in ISEL..

Another attempt

Jul 16 2020, 10:11 AM · Restricted Project
dantrushin updated the diff for D83965: MIR Statepoint refactoring. Part 5: Handle non-local relocates in ISEL..

Remove accidently added test option

Jul 16 2020, 10:07 AM · Restricted Project
Herald added a project to D83965: MIR Statepoint refactoring. Part 5: Handle non-local relocates in ISEL.: Restricted Project.
Jul 16 2020, 10:02 AM · Restricted Project
dantrushin updated the diff for D81646: MIR Statepoint refactoring. Part 2: Operand folding..

Add test demonstrating statepoint operand folding.

Jul 16 2020, 8:06 AM · Restricted Project
dantrushin updated the diff for D81647: MIR Statepoint refactoring. Part 3: Spill GC Ptr regs..

Rework slot reservation according to comments.
Add an option to disable copy propagation.

Jul 16 2020, 4:45 AM · Restricted Project

Jul 14 2020

dantrushin updated the diff for D81648: MIR Statepoint refactoring. Part 4: ISEL changes..

Clear DerivedPtrMap at new statepoint.

Jul 14 2020, 7:07 AM · Restricted Project
dantrushin added a comment to D81648: MIR Statepoint refactoring. Part 4: ISEL changes..

Second, there appears to be a semantic problem around the handling of base vs derived slots unless we *always* spill the base. We can't tie both uses to a single def. This may warrant some offline discussion.

Jul 14 2020, 5:35 AM · Restricted Project
dantrushin updated the diff for D81648: MIR Statepoint refactoring. Part 4: ISEL changes..

Another attempt to submit update.

Jul 14 2020, 3:33 AM · Restricted Project

Jul 10 2020

dantrushin updated the diff for D81648: MIR Statepoint refactoring. Part 4: ISEL changes..

Addressed comments.

Jul 10 2020, 12:47 PM · Restricted Project
dantrushin added inline comments to D81648: MIR Statepoint refactoring. Part 4: ISEL changes..
Jul 10 2020, 12:43 PM · Restricted Project
dantrushin updated the summary of D81648: MIR Statepoint refactoring. Part 4: ISEL changes..
Jul 10 2020, 9:12 AM · Restricted Project
dantrushin updated the diff for D81647: MIR Statepoint refactoring. Part 3: Spill GC Ptr regs..

Restore accidently destroyed review.

Jul 10 2020, 8:38 AM · Restricted Project
dantrushin updated the diff for D81648: MIR Statepoint refactoring. Part 4: ISEL changes..

Changed DerivedPtrMap and moved it to StatepointLowering.h as it only
needed for local gc.relocate processing;
Rebased on tip, rewrote lowerStatepointMetaArgs as been told;
Deleted test mods, will add separate test later;

Jul 10 2020, 7:57 AM · Restricted Project
dantrushin updated the diff for D81647: MIR Statepoint refactoring. Part 3: Spill GC Ptr regs..

Changed DerivedPtrMap and moved it to StatepointLowering.h as it only
needed for local gc.relocate processing;
Rebased on tip, rewrote lowerStatepointMetaArgs as been told;
Deleted test mods, will add separate test later;

Jul 10 2020, 7:55 AM · Restricted Project

Jul 8 2020

dantrushin updated the diff for D81647: MIR Statepoint refactoring. Part 3: Spill GC Ptr regs..

Add (hand crafted) test for shared landing pad;
Slightly change cache handling code to better handle shared landing pads;
Improve debug output;

Jul 8 2020, 9:56 AM · Restricted Project

Jul 7 2020

dantrushin updated the diff for D81647: MIR Statepoint refactoring. Part 3: Spill GC Ptr regs..

Add two simple MIR tests

Jul 7 2020, 11:32 AM · Restricted Project
dantrushin updated the diff for D81647: MIR Statepoint refactoring. Part 3: Spill GC Ptr regs..

Return back old implementation of collectGCRegs as I've found case
where statepoint defs != gc args;

Jul 7 2020, 8:28 AM · Restricted Project
dantrushin added inline comments to D81647: MIR Statepoint refactoring. Part 3: Spill GC Ptr regs..
Jul 7 2020, 2:08 AM · Restricted Project

Jul 6 2020

dantrushin updated the diff for D81647: MIR Statepoint refactoring. Part 3: Spill GC Ptr regs..

Address review comments and fix clang-format errors

Jul 6 2020, 10:45 AM · Restricted Project
dantrushin added inline comments to D81647: MIR Statepoint refactoring. Part 3: Spill GC Ptr regs..
Jul 6 2020, 7:55 AM · Restricted Project
dantrushin added inline comments to D81647: MIR Statepoint refactoring. Part 3: Spill GC Ptr regs..
Jul 6 2020, 7:03 AM · Restricted Project

Jul 3 2020

dantrushin updated the diff for D81648: MIR Statepoint refactoring. Part 4: ISEL changes..

Correctly handle vectors of pointers.

Jul 3 2020, 11:17 AM · Restricted Project

Jul 2 2020

dantrushin updated the diff for D81648: MIR Statepoint refactoring. Part 4: ISEL changes..

Do not handle statepoints with cross-block relocates, spill their args as before.

Jul 2 2020, 6:25 AM · Restricted Project

Jun 30 2020

dantrushin updated the diff for D81647: MIR Statepoint refactoring. Part 3: Spill GC Ptr regs..

Move copy propagation to separate function;
Simplify statepoint defs handling a bit;

Jun 30 2020, 12:29 PM · Restricted Project

Jun 29 2020

dantrushin updated the diff for D81648: MIR Statepoint refactoring. Part 4: ISEL changes..

Version without GC pointers sorting.

Jun 29 2020, 10:48 AM · Restricted Project

Jun 25 2020

dantrushin added inline comments to D81647: MIR Statepoint refactoring. Part 3: Spill GC Ptr regs..
Jun 25 2020, 3:04 AM · Restricted Project

Jun 22 2020

dantrushin added a comment to D81648: MIR Statepoint refactoring. Part 4: ISEL changes..
  1. Since some of the complexity here seems specific to invokes, let's restrict the first patch to call instructions. If we see an invoke, we can simply use the stack lowering.
Jun 22 2020, 8:35 AM · Restricted Project

Jun 15 2020

dantrushin added a comment to D81646: MIR Statepoint refactoring. Part 2: Operand folding..

InlineSpiller::spillAroundUses folds/spills ALL concurrences of vreg1 , so it will turn

Jun 15 2020, 10:55 AM · Restricted Project
dantrushin added a comment to D81646: MIR Statepoint refactoring. Part 2: Operand folding..

I can't wrap my head around why untieing operands would be correct here. It seems like we could end up with a use folded, but a def not leaving to invalid codegen? Can you either expand on the justification or discuss offline?

Jun 15 2020, 7:00 AM · Restricted Project

Jun 11 2020

dantrushin abandoned D80193: MIR Statepoint refactoring: pass GC pointers in VRegs. Part 3/5..

Abandoned in favor of D81648

Jun 11 2020, 5:26 AM · Restricted Project
dantrushin abandoned D80195: MIR Statepoint refactoring: pass GC pointers in VRegs. Part 4/5..

Abandoned in favor of D81646

Jun 11 2020, 5:26 AM · Restricted Project
dantrushin abandoned D80196: MIR Statepoint refactoring: pass GC pointers in VRegs. Part 5/5..

Abandoned in favor of D81647

Jun 11 2020, 5:26 AM · Restricted Project
dantrushin abandoned D80191: MIR Statepoint refactoring: pass GC pointers in VRegs. Part 1/5..

Adandoned in favor of D81648

Jun 11 2020, 5:26 AM · Restricted Project
dantrushin abandoned D80192: MIR Statepoint refactoring: pass GC pointers in VRegs. Part 2/5..

Abandoned in favor of D81645

Jun 11 2020, 5:26 AM · Restricted Project
dantrushin created D81648: MIR Statepoint refactoring. Part 4: ISEL changes..
Jun 11 2020, 5:26 AM · Restricted Project
dantrushin created D81647: MIR Statepoint refactoring. Part 3: Spill GC Ptr regs..
Jun 11 2020, 5:26 AM · Restricted Project
dantrushin created D81645: MIR Statepoint refactoring. Part 1: Basic MI level changes..
Jun 11 2020, 5:26 AM · Restricted Project
dantrushin created D81646: MIR Statepoint refactoring. Part 2: Operand folding..
Jun 11 2020, 5:26 AM · Restricted Project

Jun 10 2020

dantrushin updated the diff for D81603: [WIP] MIR Statepoint refactoring: Pass GC pointergs in VRegs..

Fix style and some comments.

Jun 10 2020, 11:41 AM · Restricted Project
dantrushin created D81603: [WIP] MIR Statepoint refactoring: Pass GC pointergs in VRegs..
Jun 10 2020, 11:08 AM · Restricted Project

Jun 8 2020

dantrushin created D81393: [ScheduleDAG][NFC] Use MCInstrDesc API to check PhysReg definition..
Jun 8 2020, 7:06 AM · Restricted Project

Jun 5 2020

dantrushin added a comment to D81181: [TargetLowering][NFC] More efficient emitPatchpoint()..

ah sorry, I guess that might have been the wrong link. My copy pasting skills are flaky.

what I'm seeing is this:

FAILED: lib/CodeGen/CMakeFiles/LLVMCodeGen.dir/TargetLoweringBase.cpp.o 
/usr/local/bin/c++  -DGTEST_HAS_RTTI=0 -D_DEBUG -D_GNU_SOURCE -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS -Ilib/CodeGen -I/home/tcwg-buildslave/worker/clang-cmake-aarch64-quick/llvm/llvm/lib/CodeGen -I/usr/include/libxml2 -Iinclude -I/home/tcwg-buildslave/worker/clang-cmake-aarch64-quick/llvm/llvm/include -fPIC -fvisibility-inlines-hidden -Werror=date-time -Wall -Wextra -Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wno-missing-field-initializers -pedantic -Wno-long-long -Wimplicit-fallthrough -Wno-maybe-uninitialized -Wno-class-memaccess -Wno-redundant-move -Wno-noexcept-type -Wdelete-non-virtual-dtor -Wno-comment -fdiagnostics-color -ffunction-sections -fdata-sections -O3     -fno-exceptions -fno-rtti -UNDEBUG -std=c++14 -MD -MT lib/CodeGen/CMakeFiles/LLVMCodeGen.dir/TargetLoweringBase.cpp.o -MF lib/CodeGen/CMakeFiles/LLVMCodeGen.dir/TargetLoweringBase.cpp.o.d -o lib/CodeGen/CMakeFiles/LLVMCodeGen.dir/TargetLoweringBase.cpp.o -c /home/tcwg-buildslave/worker/clang-cmake-aarch64-quick/llvm/llvm/lib/CodeGen/TargetLoweringBase.cpp
/home/tcwg-buildslave/worker/clang-cmake-aarch64-quick/llvm/llvm/lib/CodeGen/TargetLoweringBase.cpp: In member function ‘llvm::MachineBasicBlock* llvm::TargetLoweringBase::emitPatchPoint(llvm::MachineInstr&, llvm::MachineBasicBlock*) const’:
/home/tcwg-buildslave/worker/clang-cmake-aarch64-quick/llvm/llvm/lib/CodeGen/TargetLoweringBase.cpp:1037:30: error: ‘OperIdx’ was not declared in this scope
 1037 |       MIB.add(MI->getOperand(OperIdx));
      |                              ^~~~~~~
/home/tcwg-buildslave/worker/clang-cmake-aarch64-quick/llvm/llvm/lib/CodeGen/TargetLoweringBase.cpp:1054:30: error: ‘OperIdx’ was not declared in this scope
 1054 |       MIB.add(MI->getOperand(OperIdx));
      |                              ^~~~~~~
/home/tcwg-buildslave/worker/clang-cmake-aarch64-quick/llvm/llvm/lib/CodeGen/TargetLoweringBase.cpp:1060:30: error: ‘OperIdx’ was not declared in this scope
 1060 |       MIB.add(MI->getOperand(OperIdx));

from: http://lab.llvm.org:8011/builders/clang-cmake-aarch64-quick/builds/23856/steps/build%20stage%201/logs/stdio

Jun 5 2020, 6:33 AM · Restricted Project
dantrushin committed rGdae64d8f421c: Fix build breakage caused by 66a1b83bf93ec46f6d7a06c47d5981ae154f9ea0 (authored by dantrushin).
Fix build breakage caused by 66a1b83bf93ec46f6d7a06c47d5981ae154f9ea0
Jun 5 2020, 6:03 AM
dantrushin added a comment to D81181: [TargetLowering][NFC] More efficient emitPatchpoint()..

Ah, I see. I indeed broke the build. Will fix in a moment

Jun 5 2020, 6:01 AM · Restricted Project
dantrushin added a comment to D81181: [TargetLowering][NFC] More efficient emitPatchpoint()..

Seems like this is breaking on buildbot (and also my local checkout): http://lab.llvm.org:8011/builders/lldb-x64-windows-ninja/builds/16759

Jun 5 2020, 6:01 AM · Restricted Project
dantrushin committed rG66a1b83bf93e: [TargetLowering][NFC] More efficient emitPatchpoint(). (authored by dantrushin).
[TargetLowering][NFC] More efficient emitPatchpoint().
Jun 5 2020, 5:29 AM
dantrushin closed D81181: [TargetLowering][NFC] More efficient emitPatchpoint()..
Jun 5 2020, 5:28 AM · Restricted Project

Jun 4 2020

dantrushin updated the diff for D81181: [TargetLowering][NFC] More efficient emitPatchpoint()..

Address comments

Jun 4 2020, 1:50 PM · Restricted Project
dantrushin created D81181: [TargetLowering][NFC] More efficient emitPatchpoint()..
Jun 4 2020, 11:36 AM · Restricted Project
dantrushin committed rGf2c97656644e: [TableGen] Handle (outs variable_ops) (authored by dantrushin).
[TableGen] Handle (outs variable_ops)
Jun 4 2020, 6:31 AM
dantrushin closed D81095: [TableGen] Handle (outs variable_ops).
Jun 4 2020, 6:31 AM · Restricted Project
dantrushin accepted D81121: [Statepoint] Switch RS4GC to using gc-live bundle form.

LGTM

Jun 4 2020, 3:13 AM · Restricted Project

Jun 3 2020

dantrushin added reviewers for D81095: [TableGen] Handle (outs variable_ops): bogner, aemerson, dsanders.
Jun 3 2020, 12:38 PM · Restricted Project
dantrushin updated the diff for D81095: [TableGen] Handle (outs variable_ops).

Add small but most important lost part.

Jun 3 2020, 12:38 PM · Restricted Project
dantrushin updated subscribers of D81095: [TableGen] Handle (outs variable_ops).
Jun 3 2020, 10:58 AM · Restricted Project