- User Since
- Aug 28 2018, 7:55 AM (200 w, 1 d)
Mon, Jun 20
In general looks OK to me (modulo few style nits).
But I'm not an ISEL type legalization expert. Would be nice to have LGTM from someone else as well.
Thu, Jun 16
Idea is being able to push something like these though upstream:
From our downstream point of view they look reasonable, but we've encountered upstream resistance on first (so most likely will see it on second as well if we do it unconditionally)
Wed, Jun 15
Tue, Jun 14
Thu, Jun 9
Fix spaces in test to minimize differences
Rebase on top of precommitted test
Wed, Jun 8
Wed, Jun 1
May 30 2022
May 25 2022
May 19 2022
Looks like this has to live downstream. Still I think if upstream provides some public api (CallBase::getParamElementType) it should be available to all users
May 18 2022
No, Statepoint does not use this function.
May 16 2022
Intrinsics allow to specify element type of its pointer arguments via elementtype attribute.
Atomic memory intrinsics hide this possibility behind quite complicated hierarchy. This patch makes it accessible for any interested party. I don't see what's wrong with that?
May 13 2022
May 12 2022
@MatzeB Matthias, is test statepoint-vreg-twoaddr.mir looks meaningful? If yes, I can precommit it to make changes more obvious. Also, any suggestion on improving description?
(Yes, I know that IR part in .mir test is redundant, but I find it handy when I occasionally have to modify tests)
Apr 29 2022
Added test to show changes in TwoAddress pass.
Apr 28 2022
Apr 27 2022
Superceeded by D124444
Apr 26 2022
Introduce new relocation type and use it to lower local gc.relocates.
Realized we can s/Value2Res/LowerAsVReg/g
Apr 22 2022
Update test comment lost during merge
Apr 21 2022
Rebase on tip
Apr 19 2022
Apr 11 2022
Mar 29 2022
I'm sorry, I perhaps wasn't clear - English is not my native language. Let me try again.
Mar 28 2022
StackMap contents is opaque for compiler and is interpreted by runtime. With your change, relocating garbage collector can get some garbage in register and try to relocate (move) it. This will result in immediate crash.
Also, StackMap can encode operand types in it. Suddenly changing operand size from .quad to .long might also break runtime's invariants.
Mar 4 2022
Feb 11 2022
RS4GC knows how to split edges. so it can do it.
What I've been trying to do is to avoid repeatable merging (performed by SimplifyCFG) and splitting (performed by LoopSimplify) of landingpads.
Since these passes are run before RS4GC, we do not have statepoints in IR yet.
Feb 8 2022
Update test checks
Feb 3 2022
May 11 2021
Apr 27 2021
Added test for instruction with two RegMask operands.
Apr 16 2021
@arsenm, Is this OK for you?
Apr 8 2021
- use any_of
- get rid of AssignedTiedDefs vector
Apr 7 2021
Support multiple RegMasks per instruction.
Any reason why do you specify alignment in bits instead of bytes?
Is there any (supported by LLVM) CPU architecture with bit-addressing of memory?
(That really look strange to me, given byte size is hardcoded to 8 bits)
Apr 2 2021
Apr 1 2021
Rework algorithm a bit:
- Store intruction RegMask (if any) in a global;
- Look at RegMask when allocating register if we care about physical register use. (Re)Use LookAtPhysRegUses for this.
Mar 31 2021
Address review comments:
- Do this for all tied operands with regmask instructions;
- Strip all unnecessary data from test, add comment;
Mar 24 2021
Mar 11 2021
Ah, my bad, I missed that :)
There is method GCStatepointInst::getGCResult() which became invalid now.
You should either remove it or change to return vector (like getGCRelocates()` does) and use it here.
Personally I prefer latter.
Mar 10 2021
Mar 9 2021
Mar 5 2021
Wouldn't it make more sense to fix RS4GC then?
I think D97885 makes this mostly irrelevant. Even if it is not, we might try to detect duplicate phis in RS4GC.
Feb 20 2021
Feb 2 2021
BTW, we can completely delete tied dead,undef pair. But additional complexity might not worth it.
Jan 18 2021
Jan 15 2021
Add test case;
Jan 14 2021
Jan 12 2021
Though, I don't see much point in having it :)
Jan 11 2021
Dec 21 2020
Dec 17 2020
Dec 16 2020
Oct 23 2020
Oct 20 2020