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dantrushin (Denis Antrushin)
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User Since
Aug 28 2018, 7:55 AM (74 w, 8 h)

Recent Activity

Today

dantrushin updated the diff for D73496: [IRCE] Use SCEVExpander to modify loop bound.

Fix clang-format error

Tue, Jan 28, 12:43 AM · Restricted Project

Yesterday

dantrushin created D73496: [IRCE] Use SCEVExpander to modify loop bound.
Mon, Jan 27, 11:25 AM · Restricted Project

Fri, Jan 24

dantrushin updated the diff for D73181: [SCEV] Use backedge SCEV of PHI only if its input is loop invariant.

Get rid of IsAvailableOnEntry, as supposedly, loop invariant value
should be available on loop entry already.
(But again, was it really needed in original version?
PHI operand should be available. Can its SCEV be not?)

Fri, Jan 24, 7:55 AM · Restricted Project

Thu, Jan 23

dantrushin added inline comments to D73181: [SCEV] Use backedge SCEV of PHI only if its input is loop invariant.
Thu, Jan 23, 11:07 AM · Restricted Project
dantrushin retitled D73181: [SCEV] Use backedge SCEV of PHI only if its input is loop invariant from [SCEV] Do not use backedge SCEV of PHI if its input is another PHI to [SCEV] Use backedge SCEV of PHI only if its input is loop invariant.
Thu, Jan 23, 10:02 AM · Restricted Project
dantrushin updated the diff for D73181: [SCEV] Use backedge SCEV of PHI only if its input is loop invariant.

Rework patch to actually reqiure PHI backedge value to be loop invariant,
as original comment stated.

Thu, Jan 23, 10:00 AM · Restricted Project
dantrushin added inline comments to D73181: [SCEV] Use backedge SCEV of PHI only if its input is loop invariant.
Thu, Jan 23, 8:19 AM · Restricted Project
dantrushin added inline comments to D73032: [DependenceAnalysis] Memory dependence analysis internal caching mechanism is broken in presence of TBAA (PR42733)..
Thu, Jan 23, 8:01 AM · Restricted Project
dantrushin updated the diff for D73181: [SCEV] Use backedge SCEV of PHI only if its input is loop invariant.

Introduced lambda according to comments.

Thu, Jan 23, 3:07 AM · Restricted Project
dantrushin updated the diff for D73181: [SCEV] Use backedge SCEV of PHI only if its input is loop invariant.
  • Check that PHI's input is the PHI from the same block(loop);
  • Add comment to test explaining its complexity
Thu, Jan 23, 2:00 AM · Restricted Project
dantrushin added inline comments to D73181: [SCEV] Use backedge SCEV of PHI only if its input is loop invariant.
Thu, Jan 23, 2:00 AM · Restricted Project

Wed, Jan 22

dantrushin updated the diff for D73181: [SCEV] Use backedge SCEV of PHI only if its input is loop invariant.
  • Changed source code comment
  • Ran test case through update_test_checks
Wed, Jan 22, 9:55 AM · Restricted Project
dantrushin added inline comments to D73181: [SCEV] Use backedge SCEV of PHI only if its input is loop invariant.
Wed, Jan 22, 9:18 AM · Restricted Project
dantrushin added inline comments to D73181: [SCEV] Use backedge SCEV of PHI only if its input is loop invariant.
Wed, Jan 22, 8:59 AM · Restricted Project
dantrushin created D73181: [SCEV] Use backedge SCEV of PHI only if its input is loop invariant.
Wed, Jan 22, 6:05 AM · Restricted Project
dantrushin added inline comments to D73181: [SCEV] Use backedge SCEV of PHI only if its input is loop invariant.
Wed, Jan 22, 6:05 AM · Restricted Project
dantrushin added a comment to D73032: [DependenceAnalysis] Memory dependence analysis internal caching mechanism is broken in presence of TBAA (PR42733)..

Please excuse me for hijacking the review, but what is _exact_ meaning of BBSkipFirstBlockPair?
(I asked on llvm-dev@, but got no answer). Does it marks BB where query starts? Or first block where we've found something relevant? Anything else?

Wed, Jan 22, 4:52 AM · Restricted Project

Tue, Jan 21

dantrushin accepted D73063: [StackColoring] Remap PseudoSourceValue frame indices via MachineFunction::getPSVManager().

LGTM

Tue, Jan 21, 1:17 AM · Restricted Project

Mon, Jan 20

dantrushin added a comment to rGeaab1bf21e1d: [StackColoring] Remap FixedStackPseudoSourceValue frame index referenced by….

PseudoSourceValues are uniqued, and directly changing FixedStackPseudoSource value in one MachineMemOperand will change all of them in the whole MachineFunction, which may be incorrect.
Proper way of handling this is to use PseudoSourceValueManager , like this:

Mon, Jan 20, 4:26 AM

Dec 19 2019

dantrushin added a comment to D69563: [LV] Strip wrap flags from vectorized reductions.

@Ayal : Thanks! Could you commit it for me, as I have no commit access yet?

Dec 19 2019, 6:25 AM · Restricted Project
dantrushin updated the diff for D69563: [LV] Strip wrap flags from vectorized reductions.

Fixed final nits

Dec 19 2019, 6:25 AM · Restricted Project
dantrushin updated the diff for D69563: [LV] Strip wrap flags from vectorized reductions.

Addressed comments:

  • removed unsused function
  • updated tests
  • added short circuit compare to LoopExitInstr
Dec 19 2019, 3:55 AM · Restricted Project

Dec 18 2019

dantrushin added inline comments to D69563: [LV] Strip wrap flags from vectorized reductions.
Dec 18 2019, 1:22 PM · Restricted Project
dantrushin added inline comments to D69563: [LV] Strip wrap flags from vectorized reductions.
Dec 18 2019, 6:24 AM · Restricted Project
dantrushin updated the diff for D69563: [LV] Strip wrap flags from vectorized reductions.

Moved all reduction flag stuff into single procedure (I had to make
it member of InnerLoopVectorizer).

Dec 18 2019, 6:18 AM · Restricted Project

Dec 17 2019

dantrushin added inline comments to D69563: [LV] Strip wrap flags from vectorized reductions.
Dec 17 2019, 5:13 AM · Restricted Project
dantrushin updated the diff for D69563: [LV] Strip wrap flags from vectorized reductions.

Addressed comments.

Dec 17 2019, 5:04 AM · Restricted Project

Dec 16 2019

dantrushin added inline comments to D71473: [Alignment][NFC] Deprecate untyped variants of CreateMemCpy/CreateMemMove.
Dec 16 2019, 7:11 AM · Restricted Project
dantrushin added a comment to D69563: [LV] Strip wrap flags from vectorized reductions.

Ping

Dec 16 2019, 5:04 AM · Restricted Project

Dec 9 2019

dantrushin updated the diff for D69563: [LV] Strip wrap flags from vectorized reductions.

Addressed @Ayal's comments

Dec 9 2019, 8:33 AM · Restricted Project
dantrushin added inline comments to D69563: [LV] Strip wrap flags from vectorized reductions.
Dec 9 2019, 8:33 AM · Restricted Project

Dec 2 2019

dantrushin added a reviewer for D69563: [LV] Strip wrap flags from vectorized reductions: Ayal.
Dec 2 2019, 6:37 AM · Restricted Project
dantrushin added inline comments to D69563: [LV] Strip wrap flags from vectorized reductions.
Dec 2 2019, 6:31 AM · Restricted Project
dantrushin updated the diff for D69563: [LV] Strip wrap flags from vectorized reductions.

Fixed bad formatting

Dec 2 2019, 6:28 AM · Restricted Project
dantrushin updated the diff for D69563: [LV] Strip wrap flags from vectorized reductions.

Removed debug leftovers...

Dec 2 2019, 6:12 AM · Restricted Project
dantrushin updated the diff for D69563: [LV] Strip wrap flags from vectorized reductions.

Update according to @Ayal's comments.

Dec 2 2019, 6:10 AM · Restricted Project

Nov 28 2019

dantrushin added a comment to D69563: [LV] Strip wrap flags from vectorized reductions.

Good catch, binary operations that perform reduction must indeed be vectorized w/o wrap flags.

But this should apply to all such operations that participate in the vectorized part of the loop. Note that
(1) there may be several such add/sub instructions, as in llvm/test/Transforms/LoopVectorize/reduction.ll tests, and

Nov 28 2019, 11:24 AM · Restricted Project

Nov 22 2019

dantrushin added a comment to D69563: [LV] Strip wrap flags from vectorized reductions.

Thanks.
If we're done, could you approve it and commit it for me? I have no commit access yet :-/

Nov 22 2019, 4:43 AM · Restricted Project

Nov 17 2019

dantrushin added a comment to D69563: [LV] Strip wrap flags from vectorized reductions.

Ping.
@lebedev.ri : did I addressed your comments?

Nov 17 2019, 7:01 AM · Restricted Project

Nov 9 2019

dantrushin added a comment to D69563: [LV] Strip wrap flags from vectorized reductions.

Are we essentially saying that any reassociation can't preserve NSW/NUW flags?

Say, X = MAX_INT, Y = -1, and Z = 1. "t1 = X + Y; t2 = t1 + Z" does not cause signed wrap. "t1 = X + Z; t2 = t1 + Y" does, right?

If we agree on that, since vector reduction is a form of reassociation transformation. we need to drop NSW/NUW flags. We need to look at all other reassociation as well. Are we heading to that direction?

Nov 9 2019, 7:36 AM · Restricted Project
dantrushin updated the diff for D69563: [LV] Strip wrap flags from vectorized reductions.
Nov 9 2019, 7:09 AM · Restricted Project
dantrushin added inline comments to D69563: [LV] Strip wrap flags from vectorized reductions.
Nov 9 2019, 7:09 AM · Restricted Project

Nov 5 2019

dantrushin added inline comments to D69563: [LV] Strip wrap flags from vectorized reductions.
Nov 5 2019, 1:54 AM · Restricted Project

Oct 29 2019

dantrushin added inline comments to D69563: [LV] Strip wrap flags from vectorized reductions.
Oct 29 2019, 7:20 AM · Restricted Project
dantrushin added a comment to D69563: [LV] Strip wrap flags from vectorized reductions.

I remember seeing similar patch for SLPVectorizer(?).
There the consensus was that the flags that are present on all instructions, can be preserved.
This isn't applicable here?

Oct 29 2019, 7:20 AM · Restricted Project
dantrushin created D69563: [LV] Strip wrap flags from vectorized reductions.
Oct 29 2019, 6:52 AM · Restricted Project

Oct 15 2019

dantrushin added a comment to D68544: [X86][AVX] Access a scalar float/double as a free extract from a broadcast load (PR43217).

@dantrushin did @craig.topper 's change at rL374862 solve your issue?

Oct 15 2019, 10:11 AM · Restricted Project
dantrushin added a comment to D68544: [X86][AVX] Access a scalar float/double as a free extract from a broadcast load (PR43217).

I noticed that this problem has been fixed already, but I'm attaching reduced testcase anyway

Oct 15 2019, 3:58 AM · Restricted Project

Oct 14 2019

dantrushin added a comment to D68544: [X86][AVX] Access a scalar float/double as a free extract from a broadcast load (PR43217).

Sure, but it will take some time to minimize it etc.
Meantime, my original comment was wrong - basically, I have these DAG nodes:

Oct 14 2019, 11:20 AM · Restricted Project
dantrushin added inline comments to D68544: [X86][AVX] Access a scalar float/double as a free extract from a broadcast load (PR43217).
Oct 14 2019, 10:43 AM · Restricted Project

May 29 2019

dantrushin accepted D62549: [ARC] Cleanup ARCAsmPrinter..

LGTM

May 29 2019, 5:25 AM · Restricted Project

Apr 10 2019

dantrushin added a comment to D60135: [Pipeliner] Incorrect loop carried dependence calculation.

I don't have commit access. Brendon, could you do it for me?

Apr 10 2019, 5:53 AM · Restricted Project

Apr 8 2019

dantrushin added reviewers for D60135: [Pipeliner] Incorrect loop carried dependence calculation: kparzysz, sgundapa.
Apr 8 2019, 6:42 AM · Restricted Project

Apr 2 2019

dantrushin created D60135: [Pipeliner] Incorrect loop carried dependence calculation.
Apr 2 2019, 9:01 AM · Restricted Project

Mar 20 2019

dantrushin added a comment to D59553: [LLD][ELF][DebugInfo] llvm-symbolizer shows incorrect source line info if --gc-sections used.
In D59553#1435134, @avl wrote:

I am not sure about using grep and sed in the test. I see it used in other parts of llvm but not inside lld.

Mar 20 2019, 5:38 AM · lld, Restricted Project

Mar 18 2019

dantrushin added a comment to D59409: [ARC] ARCOptAddrMode pass to generate postincrement loads/stores.

Yes, please. I still have no commit access bit...

Mar 18 2019, 9:27 AM · Restricted Project

Mar 15 2019

dantrushin created D59409: [ARC] ARCOptAddrMode pass to generate postincrement loads/stores.
Mar 15 2019, 2:38 AM · Restricted Project

Mar 14 2019

dantrushin added inline comments to D59036: Memory writes overlap in the pipelined loop.
Mar 14 2019, 10:51 AM · Restricted Project
dantrushin accepted D59326: [ARC] Better classify add/sub immediate instructions in frame lowering..

LGTM

Mar 14 2019, 2:27 AM · Restricted Project

Mar 11 2019

dantrushin added a comment to D58980: [ARC] Add more load/store variants and simple pass to generate postincrement instructions.

I do not have commit access. Pete, could you push it for me?

Mar 11 2019, 7:05 AM · Restricted Project

Mar 7 2019

yakush awarded D58980: [ARC] Add more load/store variants and simple pass to generate postincrement instructions a Like token.
Mar 7 2019, 6:57 AM · Restricted Project

Mar 6 2019

dantrushin updated the diff for D58980: [ARC] Add more load/store variants and simple pass to generate postincrement instructions.
  • Removed redundant braces
  • Renamed RINFO parameter to more common MRI name
  • Added a handful of disassembler tests
Mar 6 2019, 7:20 AM · Restricted Project

Mar 5 2019

dantrushin added inline comments to D58980: [ARC] Add more load/store variants and simple pass to generate postincrement instructions.
Mar 5 2019, 10:18 AM · Restricted Project
dantrushin created D58980: [ARC] Add more load/store variants and simple pass to generate postincrement instructions.
Mar 5 2019, 10:12 AM · Restricted Project