[WebAssembly] Disable MachineBlockPlacement pass

[aheejin]

Summary

This pass hurts code size for wasm and sometimes generates irreducible
control flow.
Context: https://github.com/emscripten-core/emscripten/pull/8233

[aheejin]

test/CodeGen/WebAssembly/cfg-stackify.ll

2 ↗

(On Diff #189279)

Now that we disabled MachineBlockPlacement, these two commands are equivalent. So deleted all OPT tests.

test/CodeGen/WebAssembly/implicit-def.ll

13 ↗

(On Diff #189279)

For this test, the positions of the stackified IMPLICIT_DEF changed.

[kripken]

Code change lgtm, thanks!

lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp

293 ↗

(On Diff #189279)

I would change "and sometimes generates" to "because it can generate", since I believe the issue is just that of irreducibility.

(In theory if we could run that pass with a guarantee it would not create irredicuble control flow then it might be useful for us, although maybe not even then because the wasm VM might change the block order anyhow...)

[dschuff]

LGTM with the comment suggestion.

[aheejin]

• Address comments

llvm/trunk/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp

void WebAssemblyPassConfig::addPostRegAlloc() {
   disablePass(&PostRAMachineSinkingID);
   disablePass(&PostRASchedulerID);
   disablePass(&FuncletLayoutID);
   disablePass(&StackMapLivenessID);
   disablePass(&LiveDebugValuesID);
   disablePass(&PatchableFunctionID);
   disablePass(&ShrinkWrapID);
 
+  // This pass hurts code size for wasm because it can generate irreducible
+  // control flow.
+  disablePass(&MachineBlockPlacementID);
+
   TargetPassConfig::addPostRegAlloc();
 }
 
 void WebAssemblyPassConfig::addPreEmitPass() {
   TargetPassConfig::addPreEmitPass();
 
   // Rewrite pseudo call_indirect instructions as real instructions.
   // This needs to run before register stackification, because we change the

llvm/trunk/test/CodeGen/WebAssembly/cfg-stackify.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -disable-block-placement -verify-machineinstrs -fast-isel=false -machine-sink-split-probability-threshold=0 -cgp-freq-ratio-to-skip-merge=1000 | FileCheck %s
-; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -tail-dup-placement=0 -verify-machineinstrs -fast-isel=false -machine-sink-split-probability-threshold=0 -cgp-freq-ratio-to-skip-merge=1000 | FileCheck -check-prefix=OPT %s
 
 ; Test the CFG stackifier pass.
 
 ; Explicitly disable fast-isel, since it gets implicitly enabled in the
 ; optnone test.
 
 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"

 ; CHECK-NEXT: .LBB0_3:
 ; CHECK-NEXT: end_block
 ; CHECK-NEXT: i32.const
 ; CHECK-NEXT: i32.add
 ; CHECK-NEXT: call
 ; CHECK-NEXT: br
 ; CHECK-NEXT: .LBB0_4:
 ; CHECK-NEXT: end_loop
-; OPT-LABEL: test0:
-; OPT: loop
-; OPT:      i32.ge_s
-; OPT-NEXT: br_if
-; OPT-NEXT: i32.const
-; OPT-NEXT: i32.add
-; OPT-NOT: br
-; OPT: call
-; OPT: br 0{{$}}
-; OPT: return{{$}}
 define void @test0(i32 %n) {
 entry:
   br label %header
 
 header:
   %i = phi i32 [ 0, %entry ], [ %i.next, %back ]
   %i.next = add i32 %i, 1
 

 ; CHECK-NEXT: .LBB1_3:
 ; CHECK-NEXT: end_block
 ; CHECK-NEXT: i32.const
 ; CHECK-NEXT: i32.add
 ; CHECK-NEXT: call
 ; CHECK-NEXT: br
 ; CHECK-NEXT: .LBB1_4:
 ; CHECK-NEXT: end_loop
-; OPT-LABEL: test1:
-; OPT: loop
-; OPT:      i32.ge_s
-; OPT-NEXT: br_if
-; OPT-NEXT: i32.const
-; OPT-NEXT: i32.add
-; OPT-NOT: br
-; OPT: call
-; OPT: br 0{{$}}
-; OPT: return{{$}}
 define void @test1(i32 %n) {
 entry:
   br label %header
 
 header:
   %i = phi i32 [ 0, %entry ], [ %i.next, %back ]
   %i.next = add i32 %i, 1
 

 ; CHECK: br_if 0, {{[^,]+}}{{$}}
 ; CHECK: .LBB2_{{[0-9]+}}:
 ; CHECK: loop
 ; CHECK: br_if 0, $pop{{[0-9]+}}{{$}}
 ; CHECK: .LBB2_{{[0-9]+}}:
 ; CHECK: end_loop
 ; CHECK: end_block
 ; CHECK: return{{$}}
-; OPT-LABEL: test2:
-; OPT-NOT: local
-; OPT: block   {{$}}
-; OPT: br_if 0, {{[^,]+}}{{$}}
-; OPT: .LBB2_{{[0-9]+}}:
-; OPT: loop
-; OPT: br_if 0, $pop{{[0-9]+}}{{$}}
-; OPT: .LBB2_{{[0-9]+}}:
-; OPT: end_loop
-; OPT: end_block
-; OPT: return{{$}}
 define void @test2(double* nocapture %p, i32 %n) {
 entry:
   %cmp.4 = icmp sgt i32 %n, 0
   br i1 %cmp.4, label %for.body.preheader, label %for.end
 
 for.body.preheader:
   br label %for.body
 

 ; CHECK: br_if 0, ${{[^,]+}}{{$}}
 ; CHECK: br 1{{$}}
 ; CHECK: .LBB3_4:
 ; CHECK-NEXT: end_block{{$}}
 ; CHECK: .LBB3_5:
 ; CHECK-NEXT: end_block{{$}}
 ; CHECK: i32.const $push{{[0-9]+}}=, 0{{$}}
 ; CHECK-NEXT: return $pop{{[0-9]+}}{{$}}
-; OPT-LABEL: doublediamond:
-; OPT:      block   {{$}}
-; OPT-NEXT: block   {{$}}
-; OPT-NEXT: block   {{$}}
-; OPT:      br_if 0, ${{[^,]+}}{{$}}
-; OPT:      br_if 1, ${{[^,]+}}{{$}}
-; OPT:      br 2{{$}}
-; OPT-NEXT: .LBB3_3:
-; OPT-NEXT: end_block
-; OPT:      br 1{{$}}
-; OPT-NEXT: .LBB3_4:
-; OPT:      .LBB3_5:
-; OPT-NEXT: end_block
-; OPT:      return $pop{{[0-9]+}}{{$}}
 define i32 @doublediamond(i32 %a, i32 %b, i32* %p) {
 entry:
   %c = icmp eq i32 %a, 0
   %d = icmp eq i32 %b, 0
   store volatile i32 0, i32* %p
   br i1 %c, label %true, label %false
 true:
   store volatile i32 1, i32* %p
exit:
   ret i32 0
 }
 
 ; CHECK-LABEL: triangle:
 ; CHECK: block   {{$}}
 ; CHECK: br_if 0, $1{{$}}
 ; CHECK: .LBB4_2:
 ; CHECK: return
-; OPT-LABEL: triangle:
-; OPT: block   {{$}}
-; OPT: br_if 0, $1{{$}}
-; OPT: .LBB4_2:
-; OPT: return
 define i32 @triangle(i32* %p, i32 %a) {
 entry:
   %c = icmp eq i32 %a, 0
   store volatile i32 0, i32* %p
   br i1 %c, label %true, label %exit
 true:
   store volatile i32 1, i32* %p
   br label %exit
 exit:
   store volatile i32 2, i32* %p
   ret i32 0
 }
 
 ; CHECK-LABEL: diamond:
 ; CHECK: block   {{$}}
 ; CHECK: block   {{$}}
 ; CHECK: br_if 0, $1{{$}}
 ; CHECK: br 1{{$}}
 ; CHECK: .LBB5_2:
 ; CHECK: .LBB5_3:
 ; CHECK: i32.const $push{{[0-9]+}}=, 0{{$}}
 ; CHECK-NEXT: return $pop{{[0-9]+}}{{$}}
-; OPT-LABEL: diamond:
-; OPT: block   {{$}}
-; OPT: block   {{$}}
-; OPT: br_if 0, {{[^,]+}}{{$}}
-; OPT: br 1{{$}}
-; OPT: .LBB5_2:
-; OPT: .LBB5_3:
-; OPT: i32.const $push{{[0-9]+}}=, 0{{$}}
-; OPT-NEXT: return $pop{{[0-9]+}}{{$}}
 define i32 @diamond(i32* %p, i32 %a) {
 entry:
   %c = icmp eq i32 %a, 0
   store volatile i32 0, i32* %p
   br i1 %c, label %true, label %false
 true:
   store volatile i32 1, i32* %p
   br label %exit
 false:
   store volatile i32 2, i32* %p
   br label %exit
 exit:
   store volatile i32 3, i32* %p
   ret i32 0
 }
 
 ; CHECK-LABEL: single_block:
 ; CHECK-NOT: br
 ; CHECK: return $pop{{[0-9]+}}{{$}}
-; OPT-LABEL: single_block:
-; OPT-NOT: br
-; OPT: return $pop{{[0-9]+}}{{$}}
 define i32 @single_block(i32* %p) {
 entry:
   store volatile i32 0, i32* %p
   ret i32 0
 }
 
 ; CHECK-LABEL: minimal_loop:
 ; CHECK-NOT: br
 ; CHECK: .LBB7_1:
 ; CHECK: loop i32
 ; CHECK: i32.store 0($0), $pop{{[0-9]+}}{{$}}
 ; CHECK: br 0{{$}}
 ; CHECK: .LBB7_2:
-; OPT-LABEL: minimal_loop:
-; OPT-NOT: br
-; OPT: .LBB7_1:
-; OPT: loop i32
-; OPT: i32.store 0($0), $pop{{[0-9]+}}{{$}}
-; OPT: br 0{{$}}
-; OPT: .LBB7_2:
 define i32 @minimal_loop(i32* %p) {
 entry:
   store volatile i32 0, i32* %p
   br label %loop
 loop:
   store volatile i32 1, i32* %p
   br label %loop
 }
 
 ; CHECK-LABEL: simple_loop:
 ; CHECK-NOT: br
 ; CHECK: .LBB8_1:
 ; CHECK: loop    {{$}}
 ; CHECK: br_if 0, $pop{{[0-9]+}}{{$}}
 ; CHECK-NEXT: end_loop{{$}}
 ; CHECK: i32.const $push{{[0-9]+}}=, 0{{$}}
 ; CHECK-NEXT: return $pop{{[0-9]+}}{{$}}
-; OPT-LABEL: simple_loop:
-; OPT-NOT: br
-; OPT: .LBB8_1:
-; OPT: loop    {{$}}
-; OPT: br_if 0, {{[^,]+}}{{$}}
-; OPT-NEXT: end_loop{{$}}
-; OPT: i32.const $push{{[0-9]+}}=, 0{{$}}
-; OPT-NEXT: return $pop{{[0-9]+}}{{$}}
 define i32 @simple_loop(i32* %p, i32 %a) {
 entry:
   %c = icmp eq i32 %a, 0
   store volatile i32 0, i32* %p
   br label %loop
 loop:
   store volatile i32 1, i32* %p
   br i1 %c, label %loop, label %exit
 exit:
   store volatile i32 2, i32* %p
   ret i32 0
 }
 
 ; CHECK-LABEL: doubletriangle:
 ; CHECK: block   {{$}}
 ; CHECK: br_if 0, $0{{$}}
 ; CHECK: block   {{$}}
 ; CHECK: br_if 0, $1{{$}}
 ; CHECK: .LBB9_3:
 ; CHECK: .LBB9_4:
 ; CHECK: return
-; OPT-LABEL: doubletriangle:
-; OPT: block   {{$}}
-; OPT: br_if 0, $0{{$}}
-; OPT: block   {{$}}
-; OPT: br_if 0, $1{{$}}
-; OPT: .LBB9_3:
-; OPT: .LBB9_4:
-; OPT: return
 define i32 @doubletriangle(i32 %a, i32 %b, i32* %p) {
 entry:
   %c = icmp eq i32 %a, 0
   %d = icmp eq i32 %b, 0
   store volatile i32 0, i32* %p
   br i1 %c, label %true, label %exit
 true:
   store volatile i32 2, i32* %p

 ; CHECK: block   {{$}}
 ; CHECK: br_if 0, $0{{$}}
 ; CHECK: br 1{{$}}
 ; CHECK: .LBB10_2:
 ; CHECK: br_if 0, $1{{$}}
 ; CHECK: .LBB10_4:
 ; CHECK: i32.const $push{{[0-9]+}}=, 0{{$}}
 ; CHECK-NEXT: return $pop{{[0-9]+}}{{$}}
-; OPT-LABEL: ifelse_earlyexits:
-; OPT: block   {{$}}
-; OPT: block   {{$}}
-; OPT: br_if 0, {{[^,]+}}{{$}}
-; OPT: br_if 1, $1{{$}}
-; OPT: br 1{{$}}
-; OPT: .LBB10_3:
-; OPT: .LBB10_4:
-; OPT: i32.const $push{{[0-9]+}}=, 0{{$}}
-; OPT-NEXT: return $pop{{[0-9]+}}{{$}}
 define i32 @ifelse_earlyexits(i32 %a, i32 %b, i32* %p) {
 entry:
   %c = icmp eq i32 %a, 0
   %d = icmp eq i32 %b, 0
   store volatile i32 0, i32* %p
   br i1 %c, label %true, label %false
 true:
   store volatile i32 1, i32* %p

 ; CHECK: end_block{{$}}
 ; CHECK: block   {{$}}
 ; CHECK: br_if           0, $1{{$}}
 ; CHECK: br              1{{$}}
 ; CHECK: .LBB11_5:
 ; CHECK: br              0{{$}}
 ; CHECK: .LBB11_6:
 ; CHECK-NEXT: end_loop{{$}}
-; OPT-LABEL: doublediamond_in_a_loop:
-; OPT:      .LBB11_1:
-; OPT:      loop i32{{$}}
-; OPT:      block   {{$}}
-; OPT:      br_if           0, {{[^,]+}}{{$}}
-; OPT:      block   {{$}}
-; OPT:      br_if           0, {{[^,]+}}{{$}}
-; OPT:      br              2{{$}}
-; OPT-NEXT: .LBB11_4:
-; OPT-NEXT: end_block{{$}}
-; OPT:      br              1{{$}}
-; OPT:      .LBB11_5:
-; OPT-NEXT: end_block{{$}}
-; OPT:      br              0{{$}}
-; OPT:      .LBB11_6:
-; OPT-NEXT: end_loop{{$}}
 define i32 @doublediamond_in_a_loop(i32 %a, i32 %b, i32* %p) {
 entry:
   br label %header
 header:
   %c = icmp eq i32 %a, 0
   %d = icmp eq i32 %b, 0
   store volatile i32 0, i32* %p
   br i1 %c, label %true, label %false

 
 ; Test that nested loops are handled.
 
 ; CHECK-LABEL: test3:
 ; CHECK: loop
 ; CHECK-NEXT: br_if
 ; CHECK-NEXT: .LBB{{[0-9]+}}_{{[0-9]+}}:
 ; CHECK-NEXT: loop
-; OPT-LABEL: test3:
-; OPT: block
-; OPT: br_if
-; OPT: .LBB{{[0-9]+}}_{{[0-9]+}}:
-; OPT-NEXT: loop
-; OPT-NEXT: block
-; OPT-NEXT: block
-; OPT-NEXT: br_if
-; OPT-NEXT: .LBB{{[0-9]+}}_{{[0-9]+}}:
-; OPT-NEXT: loop
-; OPT: br_if
-; OPT-NEXT: br
-; OPT-NEXT: .LBB{{[0-9]+}}_{{[0-9]+}}:
-; OPT-NEXT: end_loop
-; OPT-NEXT: end_block
-; OPT-NEXT: unreachable
-; OPT-NEXT: .LBB{{[0-9]+}}_{{[0-9]+}}:
-; OPT-NEXT: end_block
-; OPT: br
-; OPT-NEXT: .LBB{{[0-9]+}}_{{[0-9]+}}:
-; OPT-NEXT: end_loop
 declare void @bar()
 define void @test3(i32 %w)  {
 entry:
   br i1 undef, label %outer.ph, label %exit
 
 outer.ph:
   br label %outer
 

 ; CHECK:      br_if 0, $pop{{[0-9]+}}{{$}}
 ; CHECK:      br_if 1, $pop{{[0-9]+}}{{$}}
 ; CHECK-NEXT: .LBB13_5:
 ; CHECK-NEXT: end_block{{$}}
 ; CHECK-NEXT: return{{$}}
 ; CHECK-NEXT: .LBB13_6:
 ; CHECK-NEXT: end_block{{$}}
 ; CHECK-NEXT: return{{$}}
-; OPT-LABEL: test4:
-; OPT-NEXT: .functype test4 (i32) -> (){{$}}
-; OPT:      block   {{$}}
-; OPT-NEXT: block   {{$}}
-; OPT:      br_if       0, $pop{{[0-9]+}}{{$}}
-; OPT:      br_if       1, $pop{{[0-9]+}}{{$}}
-; OPT:      br          1{{$}}
-; OPT-NEXT: .LBB13_3:
-; OPT-NEXT: end_block{{$}}
-; OPT-NEXT: block   {{$}}
-; OPT:      br_if       0, $pop{{[0-9]+}}{{$}}
-; OPT:      br_if       1, $pop{{[0-9]+}}{{$}}
-; OPT-NEXT: .LBB13_5:
-; OPT-NEXT: end_block{{$}}
-; OPT-NEXT: return{{$}}
-; OPT-NEXT: .LBB13_6:
-; OPT-NEXT: end_block{{$}}
-; OPT-NEXT: return{{$}}
 define void @test4(i32 %t) {
 entry:
   switch i32 %t, label %default [
     i32 0, label %bb2
     i32 2, label %bb2
     i32 4, label %bb1
     i32 622, label %bb0
   ]

 ; CHECK-NEXT:  block   {{$}}
 ; CHECK-NEXT:  loop    {{$}}
 ; CHECK:       br_if 1, {{[^,]+}}{{$}}
 ; CHECK:       br_if 0, {{[^,]+}}{{$}}
 ; CHECK-NEXT:  end_loop{{$}}
 ; CHECK:       return{{$}}
 ; CHECK-NEXT:  .LBB14_4:
 ; CHECK:       return{{$}}
-; OPT-LABEL: test5:
-; OPT:       .LBB14_1:
-; OPT-NEXT:  block   {{$}}
-; OPT-NEXT:  loop    {{$}}
-; OPT:       br_if 1, {{[^,]+}}{{$}}
-; OPT:       br_if 0, {{[^,]+}}{{$}}
-; OPT-NEXT:  end_loop{{$}}
-; OPT:       return{{$}}
-; OPT-NEXT:  .LBB14_4:
-; OPT:       return{{$}}
 define void @test5(i1 %p, i1 %q) {
 entry:
   br label %header
 
 header:
   store volatile i32 0, i32* null
   br i1 %p, label %more, label %alt
 

 ; CHECK:       return{{$}}
 ; CHECK-NEXT:  .LBB15_5:
 ; CHECK-NEXT:  end_block{{$}}
 ; CHECK-NOT:   block
 ; CHECK:       .LBB15_6:
 ; CHECK-NEXT:  end_block{{$}}
 ; CHECK-NOT:   block
 ; CHECK:       return{{$}}
-; OPT-LABEL: test6:
-; OPT:       .LBB15_1:
-; OPT-NEXT:  block   {{$}}
-; OPT-NEXT:  block   {{$}}
-; OPT-NEXT:  loop    {{$}}
-; OPT-NOT:   block
-; OPT:       br_if 2, {{[^,]+}}{{$}}
-; OPT-NOT:   block
-; OPT:       br_if 1, {{[^,]+}}{{$}}
-; OPT-NOT:   block
-; OPT:       br_if 0, {{[^,]+}}{{$}}
-; OPT-NEXT:  end_loop{{$}}
-; OPT-NOT:   block
-; OPT:       return{{$}}
-; OPT-NEXT:  .LBB15_5:
-; OPT-NEXT:  end_block{{$}}
-; OPT-NOT:   block
-; OPT:       .LBB15_6:
-; OPT-NEXT:  end_block{{$}}
-; OPT-NOT:   block
-; OPT:       return{{$}}
 define void @test6(i1 %p, i1 %q) {
 entry:
   br label %header
 
 header:
   store volatile i32 0, i32* null
   br i1 %p, label %more, label %second
 

 ; CHECK:       unreachable
 ; CHECK-NEXT:  .LBB16_4:
 ; CHECK-NEXT:  end_block{{$}}
 ; CHECK-NOT:   block
 ; CHECK:       br_if 0, {{[^,]+}}{{$}}
 ; CHECK-NEXT:  end_loop{{$}}
 ; CHECK-NOT:   block
 ; CHECK:       unreachable
-; OPT-LABEL: test7:
-; OPT:       .LBB16_1:
-; OPT-NEXT:  block
-; OPT-NEXT:  loop    {{$}}
-; OPT-NOT:   block
-; OPT:       block   {{$}}
-; OPT-NOT:   block
-; OPT:       br_if 0, {{[^,]+}}{{$}}
-; OPT-NOT:   block
-; OPT:       br_if 1, {{[^,]+}}{{$}}
-; OPT:       br 2{{$}}
-; OPT-NEXT:  .LBB16_3:
-; OPT-NEXT:  end_block
-; OPT-NOT:   block
-; OPT:       br_if 0, {{[^,]+}}{{$}}
-; OPT-NEXT:  end_loop
-; OPT-NOT:   block
-; OPT:       unreachable
-; OPT-NEXT:  .LBB16_5:
-; OPT-NEXT:  end_block
-; OPT-NOT:   block
-; OPT:       unreachable
 define void @test7(i1 %tobool2, i1 %tobool9) {
 entry:
   store volatile i32 0, i32* null
   br label %loop
 
 loop:
   store volatile i32 1, i32* null
   br i1 %tobool2, label %l1, label %l0

 ; CHECK-LABEL: test8:
 ; CHECK:       .LBB17_1:
 ; CHECK-NEXT:  loop i32{{$}}
 ; CHECK-NEXT:  i32.const $push{{[^,]+}}, 0{{$}}
 ; CHECK-NEXT:  br_if    0, {{[^,]+}}{{$}}
 ; CHECK-NEXT:  br       0{{$}}
 ; CHECK-NEXT:  .LBB17_2:
 ; CHECK-NEXT:  end_loop{{$}}
-; OPT-LABEL: test8:
-; OPT:       .LBB17_1:
-; OPT-NEXT:  loop i32{{$}}
-; OPT-NEXT:  i32.const $push{{[^,]+}}, 0{{$}}
-; OPT-NEXT:  br_if    0, {{[^,]+}}{{$}}
-; OPT-NEXT:  br       0{{$}}
-; OPT-NEXT:  .LBB17_2:
-; OPT-NEXT:  end_loop{{$}}
 define i32 @test8() {
 bb:
   br label %bb1
 
 bb1:
   br i1 undef, label %bb2, label %bb3
 
 bb2:

 ; CHECK-NOT:   block
 ; CHECK:       br_if     1, {{[^,]+}}{{$}}
 ; CHECK-NEXT:  br        0{{$}}
 ; CHECK-NEXT:  .LBB18_5:
 ; CHECK-NOT:   block
 ; CHECK:       end_block
 ; CHECK-NOT:   block
 ; CHECK:       return{{$}}
-; OPT-LABEL: test9:
-; OPT:       .LBB18_1:
-; OPT-NEXT:  block   {{$}}
-; OPT-NEXT:  loop    {{$}}
-; OPT-NOT:   block
-; OPT:       br_if     1, {{[^,]+}}{{$}}
-; OPT-NEXT:  .LBB18_2:
-; OPT-NEXT:  loop    {{$}}
-; OPT-NOT:   block
-; OPT:       block   {{$}}
-; OPT-NOT:   block
-; OPT:       br_if     0, {{[^,]+}}{{$}}
-; OPT-NOT:   block
-; OPT:       br_if     1, {{[^,]+}}{{$}}
-; OPT-NEXT:  br        2{{$}}
-; OPT-NEXT:  .LBB18_4:
-; OPT-NEXT:  end_block{{$}}
-; OPT-NOT:   block
-; OPT:       br_if     0, {{[^,]+}}{{$}}
-; OPT-NEXT:  br        1{{$}}
-; OPT-NEXT:  .LBB18_5:
-; OPT-NOT:   block
-; OPT:       end_block
-; OPT-NOT:   block
-; OPT:       return{{$}}
 declare i1 @a()
 define void @test9() {
 entry:
   store volatile i32 0, i32* null
   br label %header
 
 header:
   store volatile i32 1, i32* null

 ; CHECK-NOT:   block
 ; CHECK:       br_if    1, {{[^,]+}}{{$}}
 ; CHECK-NEXT:  return{{$}}
 ; CHECK-NEXT:  .LBB19_9:
 ; CHECK-NEXT:  end_block{{$}}
 ; CHECK-NOT:   block
 ; CHECK:       br       0{{$}}
 ; CHECK-NEXT:  .LBB19_10:
-; OPT-LABEL: test10:
-; OPT:       .LBB19_1:
-; OPT-NEXT:  loop    {{$}}
-; OPT-NOT:   block
-; OPT:       br_if    0, {{[^,]+}}{{$}}
-; OPT:       .LBB19_3:
-; OPT-NEXT:  block   {{$}}
-; OPT-NEXT:  loop    {{$}}
-; OPT-NOT:   block
-; OPT:       .LBB19_4:
-; OPT-NEXT:  loop    {{$}}
-; OPT-NOT:   block
-; OPT:       br_if    0, {{[^,]+}}{{$}}
-; OPT-NEXT:  end_loop{{$}}
-; OPT:       br_if    1, {{[^,]+}}{{$}}
-; OPT-NOT:   block
-; OPT:       br_if    0, {{[^,]+}}{{$}}
-; OPT-NEXT:  end_loop{{$}}
-; OPT-NOT:   block
-; OPT:       br_if    1, {{[^,]+}}{{$}}
-; OPT-NEXT:  return{{$}}
-; OPT-NEXT:  .LBB19_9:
-; OPT-NEXT:  end_block{{$}}
-; OPT-NOT:   block
-; OPT:       br       0{{$}}
-; OPT-NEXT:  .LBB19_10:
 define void @test10() {
 bb0:
   br label %bb1
 
 bb1:
   %tmp = phi i32 [ 2, %bb0 ], [ 3, %bb3 ]
   %tmp3 = phi i32 [ undef, %bb0 ], [ %tmp11, %bb3 ]
   %tmp4 = icmp eq i32 %tmp3, 0

 ; CHECK-NEXT:  .LBB20_7:
 ; CHECK-NEXT:  end_block{{$}}
 ; CHECK-NOT:   block
 ; CHECK:       return{{$}}
 ; CHECK-NEXT:  .LBB20_8:
 ; CHECK-NEXT:  end_block{{$}}
 ; CHECK-NOT:   block
 ; CHECK:       return{{$}}
-; OPT-LABEL: test11:
-; OPT:       block   {{$}}
-; OPT-NEXT:  block   {{$}}
-; OPT:       br_if        0, $pop{{[0-9]+}}{{$}}
-; OPT-NOT:   block
-; OPT:       block   {{$}}
-; OPT-NEXT:  i32.const
-; OPT-NEXT:  br_if        0, {{[^,]+}}{{$}}
-; OPT-NOT:   block
-; OPT:       br_if        2, {{[^,]+}}{{$}}
-; OPT-NEXT:  .LBB20_3:
-; OPT-NEXT:  end_block{{$}}
-; OPT-NOT:   block
-; OPT:       return{{$}}
-; OPT-NEXT:  .LBB20_4:
-; OPT-NEXT:  end_block{{$}}
-; OPT-NOT:   block
-; OPT:       block   {{$}}
-; OPT-NOT:   block
-; OPT:       br_if        0, $pop{{[0-9]+}}{{$}}
-; OPT-NOT:   block
-; OPT:       return{{$}}
-; OPT-NEXT:  .LBB20_6:
-; OPT-NEXT:  end_block{{$}}
-; OPT-NOT:   block
-; OPT:       br_if        0, $pop{{[0-9]+}}{{$}}
-; OPT-NOT:   block
-; OPT:       return{{$}}
-; OPT-NEXT:  .LBB20_8:
-; OPT-NEXT:  end_block{{$}}
-; OPT-NOT:   block
-; OPT:       return{{$}}
 define void @test11() {
 bb0:
   store volatile i32 0, i32* null
   br i1 undef, label %bb1, label %bb4
 bb1:
   store volatile i32 1, i32* null
   br i1 undef, label %bb3, label %bb2
 bb2:

 ; CHECK-NEXT:  .LBB21_6:
 ; CHECK-NEXT:  end_block{{$}}
 ; CHECK-NOT:   block
 ; CHECK:       br          0{{$}}
 ; CHECK-NEXT:  .LBB21_7:
 ; CHECK-NEXT:  end_loop{{$}}
 ; CHECK-NEXT:  end_block{{$}}
 ; CHECK-NEXT:  return{{$}}
-; OPT-LABEL: test12:
-; OPT:       .LBB21_1:
-; OPT-NEXT:  block   {{$}}
-; OPT-NEXT:  loop    {{$}}
-; OPT-NOT:   block
-; OPT:       block   {{$}}
-; OPT-NEXT:  block   {{$}}
-; OPT:       br_if       0, {{[^,]+}}{{$}}
-; OPT-NOT:   block
-; OPT:       br_if       1, {{[^,]+}}{{$}}
-; OPT-NOT:   block
-; OPT:       br_if       1, {{[^,]+}}{{$}}
-; OPT-NEXT:  br          3{{$}}
-; OPT-NEXT:  .LBB21_4:
-; OPT-NEXT:  end_block{{$}}
-; OPT-NOT:   block
-; OPT:       br_if       0, {{[^,]+}}{{$}}
-; OPT-NOT:   block
-; OPT:       br_if       2, {{[^,]+}}{{$}}
-; OPT-NEXT:  .LBB21_6:
-; OPT-NEXT:  end_block{{$}}
-; OPT:       br          0{{$}}
-; OPT-NEXT:  .LBB21_7:
-; OPT-NEXT:  end_loop{{$}}
-; OPT-NEXT:  end_block{{$}}
-; OPT-NEXT:  return{{$}}
 define void @test12(i8* %arg) {
 bb:
   br label %bb1
 
 bb1:
   %tmp = phi i32 [ 0, %bb ], [ %tmp5, %bb4 ]
   %tmp2 = getelementptr i8, i8* %arg, i32 %tmp
   %tmp3 = load i8, i8* %tmp2

 ; CHECK:       br_if 1, $pop{{[0-9]+}}{{$}}
 ; CHECK-NEXT:  br 1{{$}}
 ; CHECK-NEXT:  .LBB22_4:
 ; CHECK-NEXT:  end_block{{$}}
 ; CHECK-NEXT:  return{{$}}
 ; CHECK-NEXT:  .LBB22_5:
 ; CHECK-NEXT:  end_block{{$}}
 ; CHECK-NEXT:  unreachable{{$}}
-; OPT-LABEL: test13:
-; OPT:       block   {{$}}
-; OPT-NEXT:  block   {{$}}
-; OPT:       br_if 0, $pop0{{$}}
-; OPT:       block   {{$}}
-; OPT:       br_if 0, $pop3{{$}}
-; OPT:       .LBB22_3:
-; OPT-NEXT:  end_block{{$}}
-; OPT:       br_if 1, $pop{{[0-9]+}}{{$}}
-; OPT-NEXT:  br 1{{$}}
-; OPT-NEXT:  .LBB22_4:
-; OPT-NEXT:  end_block
-; OPT-NEXT:  return
-; OPT-NEXT:  .LBB22_5:
-; OPT-NEXT:  end_block{{$}}
-; OPT-NEXT:  unreachable{{$}}
 define void @test13() noinline optnone {
 bb:
   br i1 undef, label %bb5, label %bb2
 bb1:
   unreachable
 bb2:
   br i1 undef, label %bb3, label %bb4
 bb3:

 ; CHECK-NEXT:   end_block{{$}}
 ; CHECK:        br_if       1, $pop{{.*}}{{$}}
 ; CHECK:        return{{$}}
 ; CHECK:        .LBB24_7:
 ; CHECK-NEXT:   end_block{{$}}
 ; CHECK:        .LBB24_8:
 ; CHECK-NEXT:   end_block{{$}}
 ; CHECK-NEXT:   return{{$}}
-; OPT-LABEL: test15:
-; OPT:        block
-; OPT:        block
-; OPT-NEXT:   i32.const   $push
-; OPT-NEXT:   i32.eqz     $push{{.*}}=, $pop{{.*}}{{$}}
-; OPT-NEXT:   br_if       0, $pop{{.*}}{{$}}
-; OPT-NEXT:   call        test15_callee1{{$}}
-; OPT-NEXT:   br          1{{$}}
-; OPT-NEXT: .LBB24_2:
-; OPT-NEXT:   end_block
-; OPT-NEXT:   i32.const
-; OPT-NEXT: .LBB24_3:
-; OPT-NEXT:   block
-; OPT-NEXT:   block
-; OPT-NEXT:   loop
 %0 = type { i8, i32 }
 declare void @test15_callee0()
 declare void @test15_callee1()
 define void @test15() {
 bb:
   %tmp1 = icmp eq i8 1, 0
   br i1 %tmp1, label %bb2, label %bb14
 

llvm/trunk/test/CodeGen/WebAssembly/conv-trap.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=-nontrapping-fptoint | FileCheck %s
 
 ; Test that basic conversion operations assemble as expected using
 ; the trapping opcodes and explicit code to suppress the trapping.
 
 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: i32_trunc_s_f32:
 ; CHECK-NEXT: .functype i32_trunc_s_f32 (f32) -> (i32){{$}}
 ; CHECK-NEXT: block
 ; CHECK-NEXT: f32.abs $push[[ABS:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: f32.const $push[[LIMIT:[0-9]+]]=, 0x1p31{{$}}
 ; CHECK-NEXT: f32.lt $push[[LT:[0-9]+]]=, $pop[[ABS]], $pop[[LIMIT]]{{$}}
-; CHECK-NEXT: br_if 0, $pop[[LT]]{{$}}
-; CHECK-NEXT: i32.const $push[[ALT:[0-9]+]]=, -2147483648{{$}}
-; CHECK-NEXT: return $pop[[ALT]]{{$}}
-; CHECK-NEXT: BB
-; CHECK-NEXT: end_block
+; CHECK-NEXT: i32.eqz $push[[EQZ:[0-9]+]]=, $pop[[LT]]
+; CHECK-NEXT: br_if 0, $pop[[EQZ]]{{$}}
 ; CHECK-NEXT: i32.trunc_f32_s $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
+; CHECK-NEXT: BB
+; CHECK-NEXT: end_block
+; CHECK-NEXT: i32.const $push[[ALT:[0-9]+]]=, -2147483648{{$}}
+; CHECK-NEXT: return $pop[[ALT]]{{$}}
 define i32 @i32_trunc_s_f32(float %x) {
   %a = fptosi float %x to i32
   ret i32 %a
 }
 
 ; CHECK-LABEL: i32_trunc_u_f32:
 ; CHECK-NEXT: .functype i32_trunc_u_f32 (f32) -> (i32){{$}}
 ; CHECK-NEXT: block
 ; CHECK-NEXT: f32.const $push[[LIMIT:[0-9]+]]=, 0x1p32{{$}}
 ; CHECK-NEXT: f32.lt $push[[LT:[0-9]+]]=, $0, $pop[[LIMIT]]{{$}}
 ; CHECK-NEXT: f32.const $push[[ZERO:[0-9]+]]=, 0x0p0{{$}}
 ; CHECK-NEXT: f32.ge $push[[GE:[0-9]+]]=, $0, $pop[[ZERO]]{{$}}
 ; CHECK-NEXT: i32.and $push[[AND:[0-9]+]]=, $pop[[LT]], $pop[[GE]]{{$}}
-; CHECK-NEXT: br_if 0, $pop[[AND]]{{$}}
-; CHECK-NEXT: i32.const $push[[ALT:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: return $pop[[ALT]]{{$}}
-; CHECK-NEXT: BB
-; CHECK-NEXT: end_block
+; CHECK-NEXT: i32.eqz $push[[EQZ:[0-9]+]]=, $pop[[AND]]
+; CHECK-NEXT: br_if 0, $pop[[EQZ]]{{$}}
 ; CHECK-NEXT: i32.trunc_f32_u $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
+; CHECK-NEXT: BB
+; CHECK-NEXT: end_block
+; CHECK-NEXT: i32.const $push[[ALT:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: return $pop[[ALT]]{{$}}
 define i32 @i32_trunc_u_f32(float %x) {
   %a = fptoui float %x to i32
   ret i32 %a
 }
 
 ; CHECK-LABEL: i32_trunc_s_f64:
 ; CHECK-NEXT: .functype i32_trunc_s_f64 (f64) -> (i32){{$}}
 ; CHECK-NEXT: block
 ; CHECK-NEXT: f64.abs $push[[ABS:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: f64.const $push[[LIMIT:[0-9]+]]=, 0x1p31{{$}}
 ; CHECK-NEXT: f64.lt $push[[LT:[0-9]+]]=, $pop[[ABS]], $pop[[LIMIT]]{{$}}
-; CHECK-NEXT: br_if 0, $pop[[LT]]{{$}}
-; CHECK-NEXT: i32.const $push[[ALT:[0-9]+]]=, -2147483648{{$}}
-; CHECK-NEXT: return $pop[[ALT]]{{$}}
-; CHECK-NEXT: BB
-; CHECK-NEXT: end_block
+; CHECK-NEXT: i32.eqz $push[[EQZ:[0-9]+]]=, $pop[[LT]]
+; CHECK-NEXT: br_if 0, $pop[[EQZ]]{{$}}
 ; CHECK-NEXT: i32.trunc_f64_s $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
+; CHECK-NEXT: BB
+; CHECK-NEXT: end_block
+; CHECK-NEXT: i32.const $push[[ALT:[0-9]+]]=, -2147483648{{$}}
+; CHECK-NEXT: return $pop[[ALT]]{{$}}
 define i32 @i32_trunc_s_f64(double %x) {
   %a = fptosi double %x to i32
   ret i32 %a
 }
 
 ; CHECK-LABEL: i32_trunc_u_f64:
 ; CHECK-NEXT: .functype i32_trunc_u_f64 (f64) -> (i32){{$}}
 ; CHECK-NEXT: block
 ; CHECK-NEXT: f64.const $push[[LIMIT:[0-9]+]]=, 0x1p32{{$}}
 ; CHECK-NEXT: f64.lt $push[[LT:[0-9]+]]=, $0, $pop[[LIMIT]]{{$}}
 ; CHECK-NEXT: f64.const $push[[ZERO:[0-9]+]]=, 0x0p0{{$}}
 ; CHECK-NEXT: f64.ge $push[[GE:[0-9]+]]=, $0, $pop[[ZERO]]{{$}}
 ; CHECK-NEXT: i32.and $push[[AND:[0-9]+]]=, $pop[[LT]], $pop[[GE]]{{$}}
-; CHECK-NEXT: br_if 0, $pop[[AND]]{{$}}
-; CHECK-NEXT: i32.const $push[[ALT:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: return $pop[[ALT]]{{$}}
-; CHECK-NEXT: BB
-; CHECK-NEXT: end_block
+; CHECK-NEXT: i32.eqz $push[[EQZ:[0-9]+]]=, $pop[[AND]]
+; CHECK-NEXT: br_if 0, $pop[[EQZ]]{{$}}
 ; CHECK-NEXT: i32.trunc_f64_u $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
+; CHECK-NEXT: BB
+; CHECK-NEXT: end_block
+; CHECK-NEXT: i32.const $push[[ALT:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: return $pop[[ALT]]{{$}}
 define i32 @i32_trunc_u_f64(double %x) {
   %a = fptoui double %x to i32
   ret i32 %a
 }
 
 ; CHECK-LABEL: i64_trunc_s_f32:
 ; CHECK-NEXT: .functype i64_trunc_s_f32 (f32) -> (i64){{$}}
 ; CHECK-NEXT: block
 ; CHECK-NEXT: f32.abs $push[[ABS:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: f32.const $push[[LIMIT:[0-9]+]]=, 0x1p63{{$}}
 ; CHECK-NEXT: f32.lt $push[[LT:[0-9]+]]=, $pop[[ABS]], $pop[[LIMIT]]{{$}}
-; CHECK-NEXT: br_if 0, $pop[[LT]]{{$}}
-; CHECK-NEXT: i64.const $push[[ALT:[0-9]+]]=, -9223372036854775808{{$}}
-; CHECK-NEXT: return $pop[[ALT]]{{$}}
-; CHECK-NEXT: BB
-; CHECK-NEXT: end_block
+; CHECK-NEXT: i32.eqz $push[[EQZ:[0-9]+]]=, $pop[[LT]]
+; CHECK-NEXT: br_if 0, $pop[[EQZ]]{{$}}
 ; CHECK-NEXT: i64.trunc_f32_s $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
+; CHECK-NEXT: BB
+; CHECK-NEXT: end_block
+; CHECK-NEXT: i64.const $push[[ALT:[0-9]+]]=, -9223372036854775808{{$}}
+; CHECK-NEXT: return $pop[[ALT]]{{$}}
 define i64 @i64_trunc_s_f32(float %x) {
   %a = fptosi float %x to i64
   ret i64 %a
 }
 
 ; CHECK-LABEL: i64_trunc_u_f32:
 ; CHECK-NEXT: .functype i64_trunc_u_f32 (f32) -> (i64){{$}}
 ; CHECK-NEXT: block
 ; CHECK-NEXT: f32.const $push[[LIMIT:[0-9]+]]=, 0x1p64{{$}}
 ; CHECK-NEXT: f32.lt $push[[LT:[0-9]+]]=, $0, $pop[[LIMIT]]{{$}}
 ; CHECK-NEXT: f32.const $push[[ZERO:[0-9]+]]=, 0x0p0{{$}}
 ; CHECK-NEXT: f32.ge $push[[GE:[0-9]+]]=, $0, $pop[[ZERO]]{{$}}
 ; CHECK-NEXT: i32.and $push[[AND:[0-9]+]]=, $pop[[LT]], $pop[[GE]]{{$}}
-; CHECK-NEXT: br_if 0, $pop[[AND]]{{$}}
-; CHECK-NEXT: i64.const $push[[ALT:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: return $pop[[ALT]]{{$}}
-; CHECK-NEXT: BB
-; CHECK-NEXT: end_block
+; CHECK-NEXT: i32.eqz $push[[EQZ:[0-9]+]]=, $pop[[AND]]
+; CHECK-NEXT: br_if 0, $pop[[EQZ]]{{$}}
 ; CHECK-NEXT: i64.trunc_f32_u $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
+; CHECK-NEXT: BB
+; CHECK-NEXT: end_block
+; CHECK-NEXT: i64.const $push[[ALT:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: return $pop[[ALT]]{{$}}
 define i64 @i64_trunc_u_f32(float %x) {
   %a = fptoui float %x to i64
   ret i64 %a
 }
 
 ; CHECK-LABEL: i64_trunc_s_f64:
 ; CHECK-NEXT: .functype i64_trunc_s_f64 (f64) -> (i64){{$}}
 ; CHECK-NEXT: block
 ; CHECK-NEXT: f64.abs $push[[ABS:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: f64.const $push[[LIMIT:[0-9]+]]=, 0x1p63{{$}}
 ; CHECK-NEXT: f64.lt $push[[LT:[0-9]+]]=, $pop[[ABS]], $pop[[LIMIT]]{{$}}
-; CHECK-NEXT: br_if 0, $pop[[LT]]{{$}}
-; CHECK-NEXT: i64.const $push[[ALT:[0-9]+]]=, -9223372036854775808{{$}}
-; CHECK-NEXT: return $pop[[ALT]]{{$}}
-; CHECK-NEXT: BB
-; CHECK-NEXT: end_block
+; CHECK-NEXT: i32.eqz $push[[EQZ:[0-9]+]]=, $pop[[LT]]
+; CHECK-NEXT: br_if 0, $pop[[EQZ]]{{$}}
 ; CHECK-NEXT: i64.trunc_f64_s $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
+; CHECK-NEXT: BB
+; CHECK-NEXT: end_block
+; CHECK-NEXT: i64.const $push[[ALT:[0-9]+]]=, -9223372036854775808{{$}}
+; CHECK-NEXT: return $pop[[ALT]]{{$}}
 define i64 @i64_trunc_s_f64(double %x) {
   %a = fptosi double %x to i64
   ret i64 %a
 }
 
 ; CHECK-LABEL: i64_trunc_u_f64:
 ; CHECK-NEXT: .functype i64_trunc_u_f64 (f64) -> (i64){{$}}
 ; CHECK-NEXT: block
 ; CHECK-NEXT: f64.const $push[[LIMIT:[0-9]+]]=, 0x1p64{{$}}
 ; CHECK-NEXT: f64.lt $push[[LT:[0-9]+]]=, $0, $pop[[LIMIT]]{{$}}
 ; CHECK-NEXT: f64.const $push[[ZERO:[0-9]+]]=, 0x0p0{{$}}
 ; CHECK-NEXT: f64.ge $push[[GE:[0-9]+]]=, $0, $pop[[ZERO]]{{$}}
 ; CHECK-NEXT: i32.and $push[[AND:[0-9]+]]=, $pop[[LT]], $pop[[GE]]{{$}}
-; CHECK-NEXT: br_if 0, $pop[[AND]]{{$}}
-; CHECK-NEXT: i64.const $push[[ALT:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: return $pop[[ALT]]{{$}}
-; CHECK-NEXT: BB
-; CHECK-NEXT: end_block
+; CHECK-NEXT: i32.eqz $push[[EQZ:[0-9]+]]=, $pop[[AND]]
+; CHECK-NEXT: br_if 0, $pop[[EQZ]]{{$}}
 ; CHECK-NEXT: i64.trunc_f64_u $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
+; CHECK-NEXT: BB
+; CHECK-NEXT: end_block
+; CHECK-NEXT: i64.const $push[[ALT:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: return $pop[[ALT]]{{$}}
 define i64 @i64_trunc_u_f64(double %x) {
   %a = fptoui double %x to i64
   ret i64 %a
 }

llvm/trunk/test/CodeGen/WebAssembly/implicit-def.ll

 ; RUN: llc -o - %s -asm-verbose=false -wasm-keep-registers -disable-wasm-fallthrough-return-opt -mattr=+simd128 | FileCheck %s
 
 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; Test that stackified IMPLICIT_DEF instructions are converted into
 ; CONST_XXX instructions to provide an explicit push.
 
 ; CHECK-LABEL: implicit_def_i32:
-; CHECK: .LBB{{[0-9]+}}_4:{{$}}
-; CHECK-NEXT: end_block{{$}}
-; CHECK-NEXT: i32.const $push[[R:[0-9]+]]=, 0{{$}}
+; CHECK:      i32.const $push{{[0-9]+}}=, 0{{$}}
+; CHECK:      i32.const $push{{[0-9]+}}=, 0{{$}}
+; CHECK:      i32.const $push[[R:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: return $pop[[R]]{{$}}
-; CHECK-NEXT: end_function{{$}}
 define i32 @implicit_def_i32() {
   br i1 undef, label %A, label %X
 
 A:                                                ; preds = %0
   %d = icmp slt i1 0, 0
   br i1 %d, label %C, label %B
 
 B:                                                ; preds = %A
   br label %C
 
 C:                                                ; preds = %B, %A
   %h = phi i32 [ undef, %A ], [ 0, %B ]
   br label %X
 
 X:                                                ; preds = %0, C
   %i = phi i32 [ 1, %0 ], [ %h, %C ]
   ret i32 %i
 }
 
 ; CHECK-LABEL: implicit_def_i64:
-; CHECK: .LBB{{[0-9]+}}_4:{{$}}
-; CHECK-NEXT: end_block{{$}}
-; CHECK-NEXT: i64.const $push[[R:[0-9]+]]=, 0{{$}}
+; CHECK:      i64.const $push[[R:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: return $pop[[R]]{{$}}
-; CHECK-NEXT: end_function{{$}}
 define i64 @implicit_def_i64() {
   br i1 undef, label %A, label %X
 
 A:                                                ; preds = %0
   %d = icmp slt i1 0, 0
   br i1 %d, label %C, label %B
 
 B:                                                ; preds = %A
   br label %C
 
 C:                                                ; preds = %B, %A
   %h = phi i64 [ undef, %A ], [ 0, %B ]
   br label %X
 
 X:                                                ; preds = %0, C
   %i = phi i64 [ 1, %0 ], [ %h, %C ]
   ret i64 %i
 }
 
 ; CHECK-LABEL: implicit_def_f32:
-; CHECK: .LBB{{[0-9]+}}_4:{{$}}
-; CHECK-NEXT: end_block{{$}}
-; CHECK-NEXT: f32.const $push[[R:[0-9]+]]=, 0x0p0{{$}}
+; CHECK:      f32.const $push[[R:[0-9]+]]=, 0x0p0{{$}}
 ; CHECK-NEXT: return $pop[[R]]{{$}}
-; CHECK-NEXT: end_function{{$}}
 define float @implicit_def_f32() {
   br i1 undef, label %A, label %X
 
 A:                                                ; preds = %0
   %d = icmp slt i1 0, 0
   br i1 %d, label %C, label %B
 
 B:                                                ; preds = %A
   br label %C
 
 C:                                                ; preds = %B, %A
   %h = phi float [ undef, %A ], [ 0.0, %B ]
   br label %X
 
 X:                                                ; preds = %0, C
   %i = phi float [ 1.0, %0 ], [ %h, %C ]
   ret float %i
 }
 
 ; CHECK-LABEL: implicit_def_f64:
-; CHECK: .LBB{{[0-9]+}}_4:{{$}}
-; CHECK-NEXT: end_block{{$}}
-; CHECK-NEXT: f64.const $push[[R:[0-9]+]]=, 0x0p0{{$}}
+; CHECK:      f64.const $push[[R:[0-9]+]]=, 0x0p0{{$}}
 ; CHECK-NEXT: return $pop[[R]]{{$}}
-; CHECK-NEXT: end_function{{$}}
 define double @implicit_def_f64() {
   br i1 undef, label %A, label %X
 
 A:                                                ; preds = %0
   %d = icmp slt i1 0, 0
   br i1 %d, label %C, label %B
 
 B:                                                ; preds = %A
   br label %C
 
 C:                                                ; preds = %B, %A
   %h = phi double [ undef, %A ], [ 0.0, %B ]
   br label %X
 
 X:                                                ; preds = %0, C
   %i = phi double [ 1.0, %0 ], [ %h, %C ]
   ret double %i
 }
 
 ; CHECK-LABEL: implicit_def_v4i32:
-; CHECK: .LBB{{[0-9]+}}_4:{{$}}
-; CHECK-NEXT: end_block{{$}}
-; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK:      i32.const $push{{[0-9]+}}=, 0{{$}}
+; CHECK:      i32.const $push{{[0-9]+}}=, 0{{$}}
+; CHECK:      i32.const $push[[L0:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: i32x4.splat $push[[R:[0-9]+]]=, $pop[[L0]]
 ; CHECK-NEXT: return $pop[[R]]{{$}}
-; CHECK-NEXT: end_function{{$}}
 define <4 x i32> @implicit_def_v4i32() {
   br i1 undef, label %A, label %X
 
 A:                                                ; preds = %0
   %d = icmp slt i1 0, 0
   br i1 %d, label %C, label %B
 
 B:                                                ; preds = %A

llvm/trunk/test/CodeGen/WebAssembly/lower-global-dtors.ll

 ; CHECK-NEXT: call            orig_dtor0{{$}}
 
 ; CHECK-LABEL: .Lregister_call_dtors.0:
 ; CHECK:      block
 ; CHECK-NEXT: i32.const       $push2=, .Lcall_dtors.0{{$}}
 ; CHECK-NEXT: i32.const       $push1=, 0
 ; CHECK-NEXT: i32.const       $push0=, __dso_handle
 ; CHECK-NEXT: i32.call        $push3=, __cxa_atexit, $pop2, $pop1, $pop0{{$}}
-; CHECK-NEXT: br_if           0, $pop3
-; CHECK-NEXT: return
-;      CHECK: end_block
+; CHECK-NEXT: i32.eqz         $push4=, $pop3
+; CHECK-NEXT: br_if           0, $pop4
 ; CHECK-NEXT: unreachable
+;      CHECK: end_block
 
 ; CHECK-LABEL: .Lcall_dtors.1:
 ; CHECK-NEXT: .functype .Lcall_dtors.1 (i32) -> (){{$}}
 ; CHECK-NEXT: call            orig_dtor1a{{$}}
 ; CHECK-NEXT: call            orig_dtor1b{{$}}
 
 ; CHECK-LABEL: .Lregister_call_dtors.1:
 ; CHECK:      block
 ; CHECK-NEXT: i32.const       $push2=, .Lcall_dtors.1{{$}}
 ; CHECK-NEXT: i32.const       $push1=, 0
 ; CHECK-NEXT: i32.const       $push0=, __dso_handle
 ; CHECK-NEXT: i32.call        $push3=, __cxa_atexit, $pop2, $pop1, $pop0{{$}}
-; CHECK-NEXT: br_if           0, $pop3
-; CHECK-NEXT: return
-;      CHECK: end_block
+; CHECK-NEXT: i32.eqz         $push4=, $pop3
+; CHECK-NEXT: br_if           0, $pop4
 ; CHECK-NEXT: unreachable
+;      CHECK: end_block
 
 ; CHECK-LABEL: .Lcall_dtors.1.associated1c0:
 ; CHECK-NEXT: .functype .Lcall_dtors.1.associated1c0 (i32) -> (){{$}}
 ; CHECK-NEXT: call            orig_dtor1c0{{$}}
 
 ; CHECK-LABEL: .Lregister_call_dtors.1.associated1c0:
 ; CHECK:      block
 ; CHECK-NEXT: i32.const       $push2=, .Lcall_dtors.1.associated1c0{{$}}
 ; CHECK-NEXT: i32.const       $push1=, 0
 ; CHECK-NEXT: i32.const       $push0=, __dso_handle
 ; CHECK-NEXT: i32.call        $push3=, __cxa_atexit, $pop2, $pop1, $pop0{{$}}
-; CHECK-NEXT: br_if           0, $pop3
-; CHECK-NEXT: return
-;      CHECK: end_block
+; CHECK-NEXT: i32.eqz         $push4=, $pop3
+; CHECK-NEXT: br_if           0, $pop4
 ; CHECK-NEXT: unreachable
 
 ; CHECK-LABEL: .Lcall_dtors.1.associated1c1:
 ; CHECK-NEXT: .functype .Lcall_dtors.1.associated1c1 (i32) -> (){{$}}
 ; CHECK-NEXT: call            orig_dtor1c1a{{$}}
 ; CHECK-NEXT: call            orig_dtor1c1b{{$}}
 
 ; CHECK-LABEL: .Lregister_call_dtors.1.associated1c1:
 ; CHECK:      block
 ; CHECK-NEXT: i32.const       $push2=, .Lcall_dtors.1.associated1c1{{$}}
 ; CHECK-NEXT: i32.const       $push1=, 0
 ; CHECK-NEXT: i32.const       $push0=, __dso_handle
 ; CHECK-NEXT: i32.call        $push3=, __cxa_atexit, $pop2, $pop1, $pop0{{$}}
-; CHECK-NEXT: br_if           0, $pop3
-; CHECK-NEXT: return
-;      CHECK: end_block
+; CHECK-NEXT: i32.eqz         $push4=, $pop3
+; CHECK-NEXT: br_if           0, $pop4
 ; CHECK-NEXT: unreachable
 
 ; CHECK-LABEL: .Lcall_dtors:
 ; CHECK-NEXT: .functype .Lcall_dtors (i32) -> (){{$}}
 ; CHECK-NEXT: call            orig_dtor65536{{$}}
 
 ; CHECK-LABEL: .Lregister_call_dtors:
 ; CHECK:      block
 ; CHECK-NEXT: i32.const       $push2=, .Lcall_dtors{{$}}
 ; CHECK-NEXT: i32.const       $push1=, 0
 ; CHECK-NEXT: i32.const       $push0=, __dso_handle
 ; CHECK-NEXT: i32.call        $push3=, __cxa_atexit, $pop2, $pop1, $pop0{{$}}
-; CHECK-NEXT: br_if           0, $pop3
-; CHECK-NEXT: return
-;      CHECK: end_block
+; CHECK-NEXT: i32.eqz         $push4=, $pop3
+; CHECK-NEXT: br_if           0, $pop4
 ; CHECK-NEXT: unreachable
 
 ; CHECK-LABEL: .section .init_array.0,"",@
 ;      CHECK: .int32  .Lregister_call_dtors.0{{$}}
 ; CHECK-LABEL: .section .init_array.1,"",@
 ;      CHECK: .int32  .Lregister_call_dtors.1{{$}}
 ; CHECK-LABEL: .section .init_array.200,"",@
 ;      CHECK: .int32  orig_ctor{{$}}

llvm/trunk/test/CodeGen/WebAssembly/phi.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -verify-machineinstrs | FileCheck %s
 
 ; Test that phis are lowered.
 
 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; Basic phi triangle.
 
 ; CHECK-LABEL: test0:
-; CHECK: return $0
-; CHECK: div_s $push[[NUM0:[0-9]+]]=, $0, $pop[[NUM1:[0-9]+]]{{$}}
-; CHECK: return $pop[[NUM0]]{{$}}
+; CHECK: div_s $[[NUM0:[0-9]+]]=, $0, $pop[[NUM1:[0-9]+]]{{$}}
+; CHECK: return $[[NUM0]]{{$}}
 define i32 @test0(i32 %p) {
 entry:
   %t = icmp slt i32 %p, 0
   br i1 %t, label %true, label %done
 true:
   %a = sdiv i32 %p, 3
   br label %done
 done:

llvm/trunk/test/MC/WebAssembly/global-ctor-dtor.ll

 ; CHECK-NEXT:         Index:           4
 ; CHECK-NEXT:         Offset:          0x00000045
 ; CHECK-NEXT:     Functions:       
 ; CHECK-NEXT:       - Index:           5
 ; CHECK-NEXT:         Locals:          
 ; CHECK-NEXT:         Body:            1080808080000B
 ; CHECK-NEXT:       - Index:           6
 ; CHECK-NEXT:         Locals:          
-; CHECK-NEXT:         Body:            024041818080800041004180808080001081808080000D000F0B00000B
+; CHECK-NEXT:         Body:            02404181808080004100418080808000108180808000450D0000000B0B
 ; CHECK-NEXT:       - Index:           7
 ; CHECK-NEXT:         Locals:          
 ; CHECK-NEXT:         Body:            1082808080000B
 ; CHECK-NEXT:       - Index:           8
 ; CHECK-NEXT:         Locals:          
-; CHECK-NEXT:         Body:            024041828080800041004180808080001081808080000D000F0B00000B
+; CHECK-NEXT:         Body:            02404182808080004100418080808000108180808000450D0000000B0B
 ; CHECK-NEXT:   - Type:            DATA
 ; CHECK-NEXT:     Segments:        
 ; CHECK-NEXT:       - SectionOffset:   6
 ; CHECK-NEXT:         InitFlags:       0
 ; CHECK-NEXT:         Offset:
 ; CHECK-NEXT:           Opcode:          I32_CONST
 ; CHECK-NEXT:           Value:           0
 ; CHECK-NEXT:         Content:         '01040000'