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[RISCV] Allow access to FP CSRs without F extension
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Authored by apazos on Mar 4 2019, 3:38 PM.

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Summary

Floating-point CSRs should be accessible even when F extension is not enabled.
But pseudo instructions that access floating point CSRs still require the F extension.
GNU tools already implement this behavior.
RISC-V spec is pending update to reflect this behavior and to extend it to pseudo instructions that access floating point CSRs.

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rL LLVM

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apazos created this revision.Mar 4 2019, 3:38 PM
asb requested changes to this revision.Mar 7 2019, 6:19 AM
asb added a reviewer: asb.

The behaviour I'm seeing with a recent-ish GCC toolchain is that the floating points CSR names are accepted regardless of -march, but the pseudoinstructions (e.g. frcsr) require the F extension to be enabled.

This revision now requires changes to proceed.Mar 7 2019, 6:19 AM
apazos added a comment.Mar 7 2019, 8:56 AM

OK, I can restrict the patch to access CSR names and value range without F extension, while we wait GCC and the RISC-V specs to be updated.

apazos updated this revision to Diff 189774.Mar 7 2019, 1:25 PM
apazos edited the summary of this revision. (Show Details)

Leaving pseudo instructions that access FP CSRs untouched for now.

asb accepted this revision.Mar 7 2019, 1:37 PM

LGTM, thanks!

This revision is now accepted and ready to land.Mar 7 2019, 1:37 PM
This revision was automatically updated to reflect the committed changes.
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