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Differential D58931

[SLP] Fix invalid triple in X86 tests
ClosedPublic

Authored by fhahn on Mar 4 2019, 3:22 PM.

Details

Reviewers
ABataev
RKSimon
spatel
Commits
rGadd2d2e30401: [SLP] Fix invalid triple in X86 tests
rL355420: [SLP] Fix invalid triple in X86 tests
Summary

x86-64 is an invalid architecture in triples. Changing it to the correct
triple (x86_64) changes some tests, because SLP is not deemed profitable
any more.

Diff Detail

Event Timeline

fhahn created this revision.Mar 4 2019, 3:22 PM
Herald added a project: Restricted Project. · View Herald TranscriptMar 4 2019, 3:22 PM
Harbormaster completed remote builds in B28774: Diff 189218.Mar 4 2019, 3:24 PM
fhahn added a child revision: D58933: [opt] Report if the provided architecture is invalid..Mar 4 2019, 3:41 PM
fhahn mentioned this in D58933: [opt] Report if the provided architecture is invalid..
RKSimon accepted this revision.Mar 5 2019, 2:35 AM

Nice catch! LGTM

This revision is now accepted and ready to land.Mar 5 2019, 2:35 AM
Closed by commit rL355420: [SLP] Fix invalid triple in X86 tests (authored by fhahn). · Explain WhyMar 5 2019, 9:58 AM
This revision was automatically updated to reflect the committed changes.
fhahn mentioned this in rL355455: [opt] Report if the provided architecture is invalid..Mar 5 2019, 3:09 PM
fhahn mentioned this in rG74fea3665ffb: [opt] Report if the provided architecture is invalid..

Revision Contents

PathSize
llvm/
test/
Transforms/
SLPVectorizer/
X86/
54 lines
13 lines

Diff 189218

llvm/test/Transforms/SLPVectorizer/X86/blending-shuffle.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -slp-vectorizer -S -o - -mtriple=x86-64-unknown-linux -mcpu=bdver2 -instcombine | FileCheck %s ; RUN: opt < %s -slp-vectorizer -S -o - -mtriple=x86_64-unknown-linux -mcpu=bdver2 -instcombine | FileCheck %s
define <2 x i8> @g(<2 x i8> %x, <2 x i8> %y) { define <2 x i8> @g(<2 x i8> %x, <2 x i8> %y) {
; CHECK-LABEL: @g( ; CHECK-LABEL: @g(
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x i8> [[X:%.*]], <2 x i8> [[Y:%.*]], <2 x i32> <i32 0, i32 3> ; CHECK-NEXT: [[X0:%.*]] = extractelement <2 x i8> [[X:%.*]], i32 0
; CHECK-NEXT: [[TMP2:%.*]] = mul <2 x i8> [[TMP1]], [[TMP1]] ; CHECK-NEXT: [[Y1:%.*]] = extractelement <2 x i8> [[Y:%.*]], i32 1
; CHECK-NEXT: ret <2 x i8> [[TMP2]] ; CHECK-NEXT: [[X0X0:%.*]] = mul i8 [[X0]], [[X0]]
; CHECK-NEXT: [[Y1Y1:%.*]] = mul i8 [[Y1]], [[Y1]]
; CHECK-NEXT: [[INS1:%.*]] = insertelement <2 x i8> undef, i8 [[X0X0]], i32 0
; CHECK-NEXT: [[INS2:%.*]] = insertelement <2 x i8> [[INS1]], i8 [[Y1Y1]], i32 1
; CHECK-NEXT: ret <2 x i8> [[INS2]]
; ;
%x0 = extractelement <2 x i8> %x, i32 0 %x0 = extractelement <2 x i8> %x, i32 0
%y1 = extractelement <2 x i8> %y, i32 1 %y1 = extractelement <2 x i8> %y, i32 1
%x0x0 = mul i8 %x0, %x0 %x0x0 = mul i8 %x0, %x0
%y1y1 = mul i8 %y1, %y1 %y1y1 = mul i8 %y1, %y1
%ins1 = insertelement <2 x i8> undef, i8 %x0x0, i32 0 %ins1 = insertelement <2 x i8> undef, i8 %x0x0, i32 0
%ins2 = insertelement <2 x i8> %ins1, i8 %y1y1, i32 1 %ins2 = insertelement <2 x i8> %ins1, i8 %y1y1, i32 1
ret <2 x i8> %ins2 ret <2 x i8> %ins2
▲ Show 20 Lines • Show All 63 Lines • ▼ Show 20 Lines;
%1 = add i8 %x0x0, %x3x3 %1 = add i8 %x0x0, %x3x3
%2 = add i8 %y1y1, %y2y2 %2 = add i8 %y1y1, %y2y2
%3 = add i8 %1, %2 %3 = add i8 %1, %2
ret i8 %3 ret i8 %3
} }
define i8 @j(<4 x i8> %x, <4 x i8> %y) { define i8 @j(<4 x i8> %x, <4 x i8> %y) {
; CHECK-LABEL: @j( ; CHECK-LABEL: @j(
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i8> [[X:%.*]], <4 x i8> [[Y:%.*]], <2 x i32> <i32 0, i32 5> ; CHECK-NEXT: [[X0:%.*]] = extractelement <4 x i8> [[X:%.*]], i32 0
; CHECK-NEXT: [[TMP2:%.*]] = mul <2 x i8> [[TMP1]], [[TMP1]] ; CHECK-NEXT: [[X3:%.*]] = extractelement <4 x i8> [[X]], i32 3
; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <4 x i8> [[X]], <4 x i8> [[Y]], <2 x i32> <i32 3, i32 6> ; CHECK-NEXT: [[Y1:%.*]] = extractelement <4 x i8> [[Y:%.*]], i32 1
; CHECK-NEXT: [[TMP4:%.*]] = mul <2 x i8> [[TMP3]], [[TMP3]] ; CHECK-NEXT: [[Y2:%.*]] = extractelement <4 x i8> [[Y]], i32 2
; CHECK-NEXT: [[TMP5:%.*]] = add <2 x i8> [[TMP2]], [[TMP4]] ; CHECK-NEXT: [[X0X0:%.*]] = mul i8 [[X0]], [[X0]]
; CHECK-NEXT: [[TMP6:%.*]] = extractelement <2 x i8> [[TMP5]], i32 0 ; CHECK-NEXT: [[X3X3:%.*]] = mul i8 [[X3]], [[X3]]
; CHECK-NEXT: [[TMP7:%.*]] = extractelement <2 x i8> [[TMP5]], i32 1 ; CHECK-NEXT: [[Y1Y1:%.*]] = mul i8 [[Y1]], [[Y1]]
; CHECK-NEXT: [[TMP8:%.*]] = sdiv i8 [[TMP6]], [[TMP7]] ; CHECK-NEXT: [[Y2Y2:%.*]] = mul i8 [[Y2]], [[Y2]]
; CHECK-NEXT: ret i8 [[TMP8]] ; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X0X0]], [[X3X3]]
; CHECK-NEXT: [[TMP2:%.*]] = add i8 [[Y1Y1]], [[Y2Y2]]
; CHECK-NEXT: [[TMP3:%.*]] = sdiv i8 [[TMP1]], [[TMP2]]
; CHECK-NEXT: ret i8 [[TMP3]]
; ;
%x0 = extractelement <4 x i8> %x, i32 0 %x0 = extractelement <4 x i8> %x, i32 0
%x3 = extractelement <4 x i8> %x, i32 3 %x3 = extractelement <4 x i8> %x, i32 3
%y1 = extractelement <4 x i8> %y, i32 1 %y1 = extractelement <4 x i8> %y, i32 1
%y2 = extractelement <4 x i8> %y, i32 2 %y2 = extractelement <4 x i8> %y, i32 2
%x0x0 = mul i8 %x0, %x0 %x0x0 = mul i8 %x0, %x0
%x3x3 = mul i8 %x3, %x3 %x3x3 = mul i8 %x3, %x3
%y1y1 = mul i8 %y1, %y1 %y1y1 = mul i8 %y1, %y1
%y2y2 = mul i8 %y2, %y2 %y2y2 = mul i8 %y2, %y2
%1 = add i8 %x0x0, %x3x3 %1 = add i8 %x0x0, %x3x3
%2 = add i8 %y1y1, %y2y2 %2 = add i8 %y1y1, %y2y2
%3 = sdiv i8 %1, %2 %3 = sdiv i8 %1, %2
ret i8 %3 ret i8 %3
} }
define i8 @k(<4 x i8> %x) { define i8 @k(<4 x i8> %x) {
; CHECK-LABEL: @k( ; CHECK-LABEL: @k(
; CHECK-NEXT: [[TMP1:%.*]] = mul <4 x i8> [[X:%.*]], [[X]] ; CHECK-NEXT: [[X0:%.*]] = extractelement <4 x i8> [[X:%.*]], i32 0
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x i8> [[TMP1]], <4 x i8> undef, <2 x i32> <i32 0, i32 1> ; CHECK-NEXT: [[X3:%.*]] = extractelement <4 x i8> [[X]], i32 3
; CHECK-NEXT: [[TMP3:%.*]] = mul <4 x i8> [[X]], [[X]] ; CHECK-NEXT: [[X1:%.*]] = extractelement <4 x i8> [[X]], i32 1
; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x i8> [[TMP3]], <4 x i8> undef, <2 x i32> <i32 3, i32 2> ; CHECK-NEXT: [[X2:%.*]] = extractelement <4 x i8> [[X]], i32 2
; CHECK-NEXT: [[TMP5:%.*]] = add <2 x i8> [[TMP2]], [[TMP4]] ; CHECK-NEXT: [[X0X0:%.*]] = mul i8 [[X0]], [[X0]]
; CHECK-NEXT: [[TMP6:%.*]] = extractelement <2 x i8> [[TMP5]], i32 0 ; CHECK-NEXT: [[X3X3:%.*]] = mul i8 [[X3]], [[X3]]
; CHECK-NEXT: [[TMP7:%.*]] = extractelement <2 x i8> [[TMP5]], i32 1 ; CHECK-NEXT: [[X1X1:%.*]] = mul i8 [[X1]], [[X1]]
; CHECK-NEXT: [[TMP8:%.*]] = sdiv i8 [[TMP6]], [[TMP7]] ; CHECK-NEXT: [[X2X2:%.*]] = mul i8 [[X2]], [[X2]]
; CHECK-NEXT: ret i8 [[TMP8]] ; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X0X0]], [[X3X3]]
; CHECK-NEXT: [[TMP2:%.*]] = add i8 [[X1X1]], [[X2X2]]
; CHECK-NEXT: [[TMP3:%.*]] = sdiv i8 [[TMP1]], [[TMP2]]
; CHECK-NEXT: ret i8 [[TMP3]]
; ;
%x0 = extractelement <4 x i8> %x, i32 0 %x0 = extractelement <4 x i8> %x, i32 0
%x3 = extractelement <4 x i8> %x, i32 3 %x3 = extractelement <4 x i8> %x, i32 3
%x1 = extractelement <4 x i8> %x, i32 1 %x1 = extractelement <4 x i8> %x, i32 1
%x2 = extractelement <4 x i8> %x, i32 2 %x2 = extractelement <4 x i8> %x, i32 2
%x0x0 = mul i8 %x0, %x0 %x0x0 = mul i8 %x0, %x0
%x3x3 = mul i8 %x3, %x3 %x3x3 = mul i8 %x3, %x3
%x1x1 = mul i8 %x1, %x1 %x1x1 = mul i8 %x1, %x1
Show All 39 Lines

llvm/test/Transforms/SLPVectorizer/X86/extract-shuffle.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -slp-vectorizer -S -o - -mtriple=x86-64-unknown-linux -mcpu=bdver2 -slp-schedule-budget=1 | FileCheck %s ; RUN: opt < %s -slp-vectorizer -S -o - -mtriple=x86_64-unknown-linux -mcpu=bdver2 -slp-schedule-budget=1 | FileCheck %s
define <2 x i8> @g(<2 x i8> %x, <2 x i8> %y) { define <2 x i8> @g(<2 x i8> %x, <2 x i8> %y) {
; CHECK-LABEL: @g( ; CHECK-LABEL: @g(
; CHECK-NEXT: [[X0:%.*]] = extractelement <2 x i8> [[X:%.*]], i32 0 ; CHECK-NEXT: [[X0:%.*]] = extractelement <2 x i8> [[X:%.*]], i32 0
; CHECK-NEXT: [[Y1:%.*]] = extractelement <2 x i8> [[Y:%.*]], i32 1 ; CHECK-NEXT: [[Y1:%.*]] = extractelement <2 x i8> [[Y:%.*]], i32 1
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i8> undef, i8 [[X0]], i32 0 ; CHECK-NEXT: [[X0X0:%.*]] = mul i8 [[X0]], [[X0]]
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i8> [[TMP1]], i8 [[Y1]], i32 1 ; CHECK-NEXT: [[Y1Y1:%.*]] = mul i8 [[Y1]], [[Y1]]
; CHECK-NEXT: [[TMP3:%.*]] = mul <2 x i8> [[TMP2]], [[TMP2]] ; CHECK-NEXT: [[INS1:%.*]] = insertelement <2 x i8> undef, i8 [[X0X0]], i32 0
; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x i8> [[TMP3]], i32 0 ; CHECK-NEXT: [[INS2:%.*]] = insertelement <2 x i8> [[INS1]], i8 [[Y1Y1]], i32 1
; CHECK-NEXT: [[INS1:%.*]] = insertelement <2 x i8> undef, i8 [[TMP4]], i32 0
; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x i8> [[TMP3]], i32 1
; CHECK-NEXT: [[INS2:%.*]] = insertelement <2 x i8> [[INS1]], i8 [[TMP5]], i32 1
; CHECK-NEXT: ret <2 x i8> [[INS2]] ; CHECK-NEXT: ret <2 x i8> [[INS2]]
; ;
%x0 = extractelement <2 x i8> %x, i32 0 %x0 = extractelement <2 x i8> %x, i32 0
%y1 = extractelement <2 x i8> %y, i32 1 %y1 = extractelement <2 x i8> %y, i32 1
%x0x0 = mul i8 %x0, %x0 %x0x0 = mul i8 %x0, %x0
%y1y1 = mul i8 %y1, %y1 %y1y1 = mul i8 %y1, %y1
%ins1 = insertelement <2 x i8> undef, i8 %x0x0, i32 0 %ins1 = insertelement <2 x i8> undef, i8 %x0x0, i32 0
%ins2 = insertelement <2 x i8> %ins1, i8 %y1y1, i32 1 %ins2 = insertelement <2 x i8> %ins1, i8 %y1y1, i32 1
ret <2 x i8> %ins2 ret <2 x i8> %ins2
} }