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[WebAssembly] Lower SIMD shifts since they are fixed in V8
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Authored by tlively on Feb 28 2019, 4:10 PM.

Reviewers

sbc100
aheejin

Commits

Any test changes?

Nope. I probably should have added a test when that exception was added and removed it now, but since it was never added there is nothing to remove.

This revision is now accepted and ready to land.Feb 28 2019, 4:31 PM

This revision was automatically updated to reflect the committed changes.

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llvm/

trunk/

lib/

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WebAssembly/

5 lines

	Show First 20 Lines • Show All 1,285 Lines • ▼ Show 20 Lines

	SDValue WebAssemblyTargetLowering::LowerShift(SDValue Op,			SDValue WebAssemblyTargetLowering::LowerShift(SDValue Op,
	SelectionDAG &DAG) const {			SelectionDAG &DAG) const {
	SDLoc DL(Op);			SDLoc DL(Op);

	// Only manually lower vector shifts			// Only manually lower vector shifts
	assert(Op.getSimpleValueType().isVector());			assert(Op.getSimpleValueType().isVector());

	// Expand all vector shifts until V8 fixes its implementation
	// TODO: remove this once V8 is fixed
	if (!Subtarget->hasUnimplementedSIMD128())
	return unrollVectorShift(Op, DAG);

	// Unroll non-splat vector shifts			// Unroll non-splat vector shifts
	BuildVectorSDNode *ShiftVec;			BuildVectorSDNode *ShiftVec;
	SDValue SplatVal;			SDValue SplatVal;
	if (!(ShiftVec = dyn_cast<BuildVectorSDNode>(Op.getOperand(1).getNode())) \|\|			if (!(ShiftVec = dyn_cast<BuildVectorSDNode>(Op.getOperand(1).getNode())) \|\|
	!(SplatVal = ShiftVec->getSplatValue()))			!(SplatVal = ShiftVec->getSplatValue()))
	return unrollVectorShift(Op, DAG);			return unrollVectorShift(Op, DAG);

	// All splats except i64x2 const splats are handled by patterns			// All splats except i64x2 const splats are handled by patterns
	Show All 27 Lines