Fixed typos in tests: s/CEHCK/CHECK/

[ilya-biryukov]

LGTM

llvm/test/Analysis/ScalarEvolution/pr18606-min-zeros.ll

 ; RUN: opt -S -indvars < %s | FileCheck %s
 
 ; CHECK: @test
 ; CHECK: %5 = add i32 %local_6_, %local_0_
-; CEHCK: %37 = mul i32 %36, %36
+; CHECK: %37 = mul i32 %36, %36
 
 define i32 @test(i32, i32) {
 bci_0:
   br label %bci_30
 
 bci_68:                                           ; preds = %bci_45
   %local_6_.lcssa = phi i32 [ %local_6_, %bci_45 ]
   %.lcssa1.lcssa = phi i32 [ %37, %bci_45 ]

llvm/test/Analysis/ScalarEvolution/pr18606.ll

 ; RUN: opt -S -indvars < %s | FileCheck %s
 
 ; CHECK: @main
 ; CHECK: %mul.lcssa5 = phi i32 [ %a.promoted4, %entry ], [ %mul.30, %for.body3 ]
-; CEHCK: %mul = mul nsw i32 %mul.lcssa5, %mul.lcssa5
+; CHECK: %mul = mul nsw i32 %mul.lcssa5, %mul.lcssa5
 ; CHECK: %mul.30 = mul nsw i32 %mul.29, %mul.29
 
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-unknown-linux-gnu"
 
 @a = local_unnamed_addr global i32 0, align 4
 @b = local_unnamed_addr global i32 0, align 4
 

llvm/test/CodeGen/AArch64/sponentry.ll

define dso_local void @bar() {
   %4 = bitcast i64* %3 to i8*
   %5 = call i32 @_setjmpex(i8* %4, i8* %1) #2
   ret void
 }
 
 ; CHECK: bar:
 ; CHECK: mov     x29, sp
 ; CHECK: add     x1, x29, #16
-; CEHCK: bl      _setjmpex
+; CHECK: bl      _setjmpex
 
 ; NOFP: str     x30, [sp, #-16]!
 ; NOFP: add     x1, sp, #16
 
 define dso_local void @foo([24 x i64]*) {
   %2 = alloca [24 x i64]*, align 8
   %3 = alloca i32, align 4
   %4 = alloca [100 x i32], align 4
   store [24 x i64]* %0, [24 x i64]** %2, align 8
   %5 = call i8* @llvm.sponentry()
   %6 = load [24 x i64]*, [24 x i64]** %2, align 8
   %7 = getelementptr inbounds [24 x i64], [24 x i64]* %6, i32 0, i32 0
   %8 = bitcast i64* %7 to i8*
   %9 = call i32 @_setjmpex(i8* %8, i8* %5)
   store i32 %9, i32* %3, align 4
   ret void
 }
 
 ; CHECK: foo:
 ; CHECK: sub     sp, sp, #448
 ; CHECK: add     x29, sp, #432
 ; CHECK: add     x1, x29, #16
-; CEHCK: bl      _setjmpex
+; CHECK: bl      _setjmpex
 
 ; NOFP: sub     sp, sp, #432
 ; NOFP: add     x1, sp, #432
 
 define dso_local void @var_args(i8*, ...) {
   %2 = alloca i8*, align 8
   %3 = alloca i8*, align 8
   store i8* %0, i8** %2, align 8
define dso_local void @var_args(i8*, ...) {
   %14 = call i32 @_setjmpex(i8* %13, i8* %10) #3
   ret void
 }
 
 ; CHECK: var_args:
 ; CHECK: sub     sp, sp, #96
 ; CHECK: add     x29, sp, #16
 ; CHECK: add     x1, x29, #80
-; CEHCK: bl      _setjmpex
+; CHECK: bl      _setjmpex
 
 ; NOFP: sub     sp, sp, #96
 ; NOFP: add     x1, sp, #96
 
 define dso_local void @manyargs(i64 %x1, i64 %x2, i64 %x3, i64 %x4, i64 %x5, i64 %x6, i64 %x7, i64 %x8, i64 %x9, i64 %x10) {
   %1 = call i8* @llvm.sponentry()
   %2 = load [24 x i64]*, [24 x i64]** @env2, align 8
   %3 = getelementptr inbounds [24 x i64], [24 x i64]* %2, i32 0, i32 0

llvm/test/CodeGen/ARM/macho-embedded-float.ll

 ; RUN: llc -mtriple=thumbv7em-none-macho %s -o - -mcpu=cortex-m4 | FileCheck --check-prefix=CHECK-HARD %s
 ; RUN: llc -mtriple=thumbv7m-none-macho %s -o - -mcpu=cortex-m4 | FileCheck --check-prefix=CHECK-SOFT %s
 ; RUN: llc -mtriple=thumbv7em-linux-gnueabi %s -o - -mcpu=cortex-m4 | FileCheck --check-prefix=CHECK-SOFT %s
 
 define float @test_default_cc(float %a, float %b) {
 ; CHECK-HARD-LABEL: test_default_cc:
 ; CHECK-HARD-NOT: vmov
 ; CHECK-HARD: vadd.f32 s0, s0, s1
 ; CHECK-HARD-NOT: vmov
 
 ; CHECK-SOFT-LABEL: test_default_cc:
 ; CHECK-SOFT-DAG: vmov [[A:s[0-9]+]], r0
 ; CHECK-SOFT-DAG: vmov [[B:s[0-9]+]], r1
 ; CHECK-SOFT: vadd.f32 [[RES:s[0-9]+]], [[A]], [[B]]
-; CEHCK-SOFT: vmov r0, [[RES]]
+; CHECK-SOFT: vmov r0, [[RES]]
 
   %res = fadd float %a, %b
   ret float %res
 }
 
 
 define arm_aapcs_vfpcc float @test_libcall(float %in) {
 ; CHECK-HARD-LABEL: test_libcall:

llvm/test/CodeGen/ARM/pr32578.ll

 ; RUN: llc -o - %s | FileCheck %s
 target triple = "armv7"
 
 ; CHECK-LABEL: func:
 ; CHECK: push {r11, lr}
 ; CHECK: vpush {d8}
-; CEHCK: b .LBB0_2
+; CHECK: b .LBB0_2
 define arm_aapcscc double @func() {
   br label %tailrecurse
 
 tailrecurse:
   %v0 = load i16, i16* undef, align 8
   %cond36.i = icmp eq i16 %v0, 3
   br i1 %cond36.i, label %sw.bb.i, label %sw.epilog.i
 

llvm/test/CodeGen/X86/taildup-crash.ll

 ; RUN: llc -o - %s | FileCheck %s
 target triple = "x86_64--"
 
 ; Make sure we do not crash in tail duplication when finding no successor of a
 ; block.
 ; CHECK-LABEL: func:
 ; CHECK: testb
-; CEHCK: je
+; CHECK: je
 ; CHECK: retq
 ; CHECK: jmp
 define hidden void @func() {
 entry:
   br i1 undef, label %for.cond.cleanup, label %while.cond.preheader
 
 while.cond.preheader:
   br label %while.cond
 
 for.cond.cleanup:
   ret void
 
 while.cond:
   %cmp.i202 = icmp eq i8* undef, undef
   br i1 %cmp.i202, label %while.cond.preheader, label %while.cond
 }

llvm/test/MC/ARM/bkpt.s

@ CHECK: bkpt #42
 
   .arm
 
   .global arm_default_bkpt
   .type arm_default_bkpt, %function
 arm_default_bkpt:
   bkpt
 
-@ CEHCK-LABEL: arm_default_bkpt
+@ CHECK-LABEL: arm_default_bkpt
 @ CHECK: bkpt #0
 

llvm/test/MC/Disassembler/Mips/mips64/valid-mips64-el.txt

 0x03 0x00 0x82 0x88 # CHECK: lwl $2, 3($4)
 0x10 0x00 0xa3 0x98 # CHECK: lwr $3, 16($5)
 0x00 0x00 0xc7 0x70 # CHECK: madd $6, $7
 0x01 0x00 0xc7 0x70 # CHECK: maddu $6, $7
 0x01 0x78 0x08 0x40 # CHECK: mfc0 $8, $15, 1
 0x00 0x38 0x06 0x44 # CHECK: mfc1 $6, $f7
 0x10 0x28 0x00 0x00 # CHECK: mfhi $5
 0x12 0x28 0x00 0x00 # CHECK: mflo $5
-0x25 0x78 0xe0 0x03 # CEHCK: move $15, $ra
-0x2d 0x78 0xe0 0x03 # CEHCK: move $15, $ra
+0x25 0x78 0xe0 0x03 # CHECK: move $15, $ra
+0x2d 0x78 0xe0 0x03 # CHECK: move $15, $ra
 0x86 0x41 0x20 0x46 # CHECK: mov.d $f6, $f8
 0x86 0x39 0x00 0x46 # CHECK: mov.s $f6, $f7
 0x04 0x00 0xc7 0x70 # CHECK: msub $6, $7
 0x05 0x00 0xc7 0x70 # CHECK: msubu $6, $7
 0x01 0x78 0x89 0x40 # CHECK: mtc0 $9, $15, 1
 0x00 0x38 0x86 0x44 # CHECK: mtc1 $6, $f7
 0x11 0x00 0xe0 0x00 # CHECK: mthi $7
 0x13 0x00 0xe0 0x00 # CHECK: mtlo $7

llvm/test/MC/Disassembler/Mips/mips64r3/valid-mips64r3-el.txt

 0x00 0x00 0xc7 0x70 # CHECK: madd $6, $7
 0x60 0x98 0xf9 0x4f # CHECK: madd.s $f1, $f31, $f19, $f25
 0x01 0x00 0xc7 0x70 # CHECK: maddu $6, $7
 0x01 0x78 0x08 0x40 # CHECK: mfc0 $8, $15, 1
 0x00 0x38 0x06 0x44 # CHECK: mfc1 $6, $f7
 0x10 0x28 0x00 0x00 # CHECK: mfhi $5
 0x00 0xc0 0x7e 0x44 # CHECK: mfhc1 $fp, $f24
 0x12 0x28 0x00 0x00 # CHECK: mflo $5
-0x25 0x78 0xe0 0x03 # CEHCK: move $15, $ra
-0x2d 0x78 0xe0 0x03 # CEHCK: move $15, $ra
+0x25 0x78 0xe0 0x03 # CHECK: move $15, $ra
+0x2d 0x78 0xe0 0x03 # CHECK: move $15, $ra
 0x86 0x41 0x20 0x46 # CHECK: mov.d $f6, $f8
 0x86 0x39 0x00 0x46 # CHECK: mov.s $f6, $f7
 0x04 0x00 0xc7 0x70 # CHECK: msub $6, $7
 0x28 0x53 0x70 0x4e # CHECK: msub.s $f12, $f19, $f10, $f16
 0x05 0x00 0xc7 0x70 # CHECK: msubu $6, $7
 0x01 0x78 0x89 0x40 # CHECK: mtc0 $9, $15, 1
 0x00 0x38 0x86 0x44 # CHECK: mtc1 $6, $f7
 0x11 0x00 0xe0 0x00 # CHECK: mthi $7

llvm/test/MC/Disassembler/Mips/mips64r5/valid-mips64r5-el.txt

 0x00 0x00 0xc7 0x70 # CHECK: madd $6, $7
 0x60 0x98 0xf9 0x4f # CHECK: madd.s $f1, $f31, $f19, $f25
 0x01 0x00 0xc7 0x70 # CHECK: maddu $6, $7
 0x01 0x78 0x08 0x40 # CHECK: mfc0 $8, $15, 1
 0x00 0x38 0x06 0x44 # CHECK: mfc1 $6, $f7
 0x10 0x28 0x00 0x00 # CHECK: mfhi $5
 0x00 0xc0 0x7e 0x44 # CHECK: mfhc1 $fp, $f24
 0x12 0x28 0x00 0x00 # CHECK: mflo $5
-0x25 0x78 0xe0 0x03 # CEHCK: move $15, $ra
-0x2d 0x78 0xe0 0x03 # CEHCK: move $15, $ra
+0x25 0x78 0xe0 0x03 # CHECK: move $15, $ra
+0x2d 0x78 0xe0 0x03 # CHECK: move $15, $ra
 0x86 0x41 0x20 0x46 # CHECK: mov.d $f6, $f8
 0x86 0x39 0x00 0x46 # CHECK: mov.s $f6, $f7
 0x04 0x00 0xc7 0x70 # CHECK: msub $6, $7
 0x28 0x53 0x70 0x4e # CHECK: msub.s $f12, $f19, $f10, $f16
 0x05 0x00 0xc7 0x70 # CHECK: msubu $6, $7
 0x01 0x78 0x89 0x40 # CHECK: mtc0 $9, $15, 1
 0x00 0x38 0x86 0x44 # CHECK: mtc1 $6, $f7
 0x11 0x00 0xe0 0x00 # CHECK: mthi $7