[mips] Put some MIPS-specific sections to separate segments

[atanasyan]

Summary

Three MIPS-specific sections .reginfo, .MIPS.options, and .MIPS.abiflags are used by loader to read their contents and setup environment for running a program. Loader looks up these data in the corresponding segments: PT_MIPS_REGINFO, PT_MIPS_OPTIONS, and PT_MIPS_ABIFLAGS respectively.

This patch put these sections to separate segments like we do already for ARM SHT_ARM_EXIDX section.

[grimar]

lld/ELF/Writer.cpp

2070–2074

Hdrs was Phdrs originally and it seems how it is named in the code usually.
I would keep it.

lld/test/ELF/basic-mips.s

328

Seems PT_MIPS_OPTIONS is untested?

lld/test/ELF/eh-frame-hdr-abs-fde.s

1 ↗

(On Diff #187338)

I was wondering why this test case changed until saw it requires mips.
Should it just use x86 it seems?

[atanasyan]

Thanks for review.

lld/ELF/Writer.cpp

2070–2074

Agreed.

lld/test/ELF/basic-mips.s

328

Good point. I will add a test case.

lld/test/ELF/eh-frame-hdr-abs-fde.s

1 ↗

(On Diff #187338)

Do you like to convert this test for using x86 as a target architecture? If so, what is the reason?

[grimar]

lld/test/ELF/eh-frame-hdr-abs-fde.s

1 ↗

(On Diff #187338)

Seems the functionality tested by this test is not MIPS specific, but generic and so is can be useful for all targets.
x86 is probably tested on more bots and used as a generic target in LLD (where all not target specific
features are usually tested).

[atanasyan]

• Fixed function arguments' names
• Added test for the PT_MIPS_OPTIONS segment creation

[grimar]

LGTM

lld/ELF/Writer.cpp

private:
   void maybeAddThunks();
   void sortInputSections();
   void finalizeSections();
   void checkExecuteOnly();
   void setReservedSymbolSections();
 
   std::vector<PhdrEntry *> createPhdrs();
   void removeEmptyPTLoad();
-  void addPtArmExid(std::vector<PhdrEntry *> &Phdrs);
+  void addPhdrForSection(std::vector<PhdrEntry *> &Phdrs, unsigned ShType,
+                         unsigned PType, unsigned PFlags);
   void assignFileOffsets();
   void assignFileOffsetsBinary();
   void setPhdrs();
   void checkSections();
   void fixSectionAlignments();
   void openFile();
   void writeTrapInstr();
   void writeHeader();
for (size_t I = 0, E = OutputSections.size(); I != E; ++I) {
     Sec->ShName = In.ShStrTab->addString(Sec->Name);
   }
 
   // Binary and relocatable output does not have PHDRS.
   // The headers have to be created before finalize as that can influence the
   // image base and the dynamic section on mips includes the image base.
   if (!Config->Relocatable && !Config->OFormatBinary) {
     Phdrs = Script->hasPhdrsCommands() ? Script->createPhdrs() : createPhdrs();
-    addPtArmExid(Phdrs);
+    if (Config->EMachine == EM_ARM) {
+      // PT_ARM_EXIDX is the ARM EHABI equivalent of PT_GNU_EH_FRAME
+      addPhdrForSection(Phdrs, SHT_ARM_EXIDX, PT_ARM_EXIDX, PF_R);
+    }
+    if (Config->EMachine == EM_MIPS) {
+      // Add separate segments for MIPS-specific sections.
+      addPhdrForSection(Phdrs, SHT_MIPS_REGINFO, PT_MIPS_REGINFO, PF_R);
+      addPhdrForSection(Phdrs, SHT_MIPS_OPTIONS, PT_MIPS_OPTIONS, PF_R);
+      addPhdrForSection(Phdrs, SHT_MIPS_ABIFLAGS, PT_MIPS_ABIFLAGS, PF_R);
+    }
     Out::ProgramHeaders->Size = sizeof(Elf_Phdr) * Phdrs.size();
 
     // Find the TLS segment. This happens before the section layout loop so that
     // Android relocation packing can look up TLS symbol addresses.
     for (PhdrEntry *P : Phdrs)
       if (P->p_type == PT_TLS)
         Out::TlsPhdr = P;
   }
for (OutputSection *Sec : OutputSections) {
     } else {
       Note = nullptr;
     }
   }
   return Ret;
 }
 
 template <class ELFT>
-void Writer<ELFT>::addPtArmExid(std::vector<PhdrEntry *> &Phdrs) {
-  if (Config->EMachine != EM_ARM)
-    return;
-  auto I = llvm::find_if(OutputSections, [](OutputSection *Cmd) {
-    return Cmd->Type == SHT_ARM_EXIDX;
-  });
+void Writer<ELFT>::addPhdrForSection(std::vector<PhdrEntry *> &Phdrs,
+                                     unsigned ShType, unsigned PType,
+                                     unsigned PFlags) {
+  auto I = llvm::find_if(
+      OutputSections, [=](OutputSection *Cmd) { return Cmd->Type == ShType; });
   if (I == OutputSections.end())
     return;
 
-  // PT_ARM_EXIDX is the ARM EHABI equivalent of PT_GNU_EH_FRAME
-  PhdrEntry *ARMExidx = make<PhdrEntry>(PT_ARM_EXIDX, PF_R);
-  ARMExidx->add(*I);
-  Phdrs.push_back(ARMExidx);
+  PhdrEntry *Entry = make<PhdrEntry>(PType, PFlags);
+  Entry->add(*I);
+  Phdrs.push_back(Entry);
 }
 
 // The first section of each PT_LOAD, the first section in PT_GNU_RELRO and the
 // first section after PT_GNU_RELRO have to be page aligned so that the dynamic
 // linker can set the permissions.
 template <class ELFT> void Writer<ELFT>::fixSectionAlignments() {
   auto PageAlign = [](OutputSection *Cmd) {
     if (Cmd && !Cmd->AddrExpr)

lld/test/ELF/basic-mips.s

 # CHECK-NEXT:   SectionHeaderOffset: 0x200A0
 # CHECK-NEXT:   Flags [
 # CHECK-NEXT:     EF_MIPS_ABI_O32
 # CHECK-NEXT:     EF_MIPS_ARCH_32
 # CHECK-NEXT:     EF_MIPS_CPIC
 # CHECK-NEXT:   ]
 # CHECK-NEXT:   HeaderSize: 52
 # CHECK-NEXT:   ProgramHeaderEntrySize: 32
-# CHECK-NEXT:   ProgramHeaderCount: 5
+# CHECK-NEXT:   ProgramHeaderCount: 7
 # CHECK-NEXT:   SectionHeaderEntrySize: 40
 # CHECK-NEXT:   SectionHeaderCount: 11
 # CHECK-NEXT:   StringTableSectionIndex: 9
 # CHECK-NEXT: }
 # CHECK-NEXT: Sections [
 # CHECK-NEXT:   Section {
 # CHECK-NEXT:     Index: 0
 # CHECK-NEXT:     Name:  (0)

 # CHECK-NEXT:   }
 # CHECK-NEXT:   Section {
 # CHECK-NEXT:     Index: 1
 # CHECK-NEXT:     Name: .MIPS.abiflags
 # CHECK-NEXT:     Type: SHT_MIPS_ABIFLAGS (0x7000002A)
 # CHECK-NEXT:     Flags [ (0x2)
 # CHECK-NEXT:       SHF_ALLOC (0x2)
 # CHECK-NEXT:     ]
-# CHECK-NEXT:     Address: 0x100D8
-# CHECK-NEXT:     Offset: 0xD8
+# CHECK-NEXT:     Address: 0x10118
+# CHECK-NEXT:     Offset: 0x118
 # CHECK-NEXT:     Size: 24
 # CHECK-NEXT:     Link: 0
 # CHECK-NEXT:     Info: 0
 # CHECK-NEXT:     AddressAlignment: 8
 # CHECK-NEXT:     EntrySize: 24
 # CHECK-NEXT:   }
 # CHECK-NEXT:   Section {
 # CHECK-NEXT:     Index: 2
 # CHECK-NEXT:     Name: .reginfo
 # CHECK-NEXT:     Type: SHT_MIPS_REGINFO (0x70000006)
 # CHECK-NEXT:     Flags [ (0x2)
 # CHECK-NEXT:       SHF_ALLOC (0x2)
 # CHECK-NEXT:     ]
-# CHECK-NEXT:     Address: 0x100F0
-# CHECK-NEXT:     Offset: 0xF0
+# CHECK-NEXT:     Address: 0x10130
+# CHECK-NEXT:     Offset: 0x130
 # CHECK-NEXT:     Size: 24
 # CHECK-NEXT:     Link: 0
 # CHECK-NEXT:     Info: 0
 # CHECK-NEXT:     AddressAlignment: 4
 # CHECK-NEXT:     EntrySize: 24
 # CHECK-NEXT:   }
 # CHECK-NEXT:   Section {
 # CHECK-NEXT:     Index: 3

 # CHECK-NEXT:   }
 # CHECK-NEXT: ]
 # CHECK-NEXT: ProgramHeaders [
 # CHECK-NEXT:   ProgramHeader {
 # CHECK-NEXT:     Type: PT_PHDR (0x6)
 # CHECK-NEXT:     Offset: 0x34
 # CHECK-NEXT:     VirtualAddress: 0x10034
 # CHECK-NEXT:     PhysicalAddress: 0x10034
-# CHECK-NEXT:     FileSize: 160
-# CHECK-NEXT:     MemSize: 160
+# CHECK-NEXT:     FileSize: 224
+# CHECK-NEXT:     MemSize: 224
 # CHECK-NEXT:     Flags [ (0x4)
 # CHECK-NEXT:       PF_R (0x4)
 # CHECK-NEXT:     ]
 # CHECK-NEXT:     Alignment: 4
 # CHECK-NEXT:   }
 # CHECK-NEXT:   ProgramHeader {
 # CHECK-NEXT:     Type: PT_LOAD (0x1)
 # CHECK-NEXT:     Offset: 0x0
 # CHECK-NEXT:     VirtualAddress: 0x10000
 # CHECK-NEXT:     PhysicalAddress: 0x10000
-# CHECK-NEXT:     FileSize: 264
-# CHECK-NEXT:     MemSize: 264
+# CHECK-NEXT:     FileSize: 328
+# CHECK-NEXT:     MemSize: 328
 # CHECK-NEXT:     Flags [ (0x4)
 # CHECK-NEXT:       PF_R (0x4)
 # CHECK-NEXT:     ]
 # CHECK-NEXT:     Alignment: 65536
 # CHECK-NEXT:   }
 # CHECK-NEXT:   ProgramHeader {
 # CHECK-NEXT:     Type: PT_LOAD (0x1)
 # CHECK-NEXT:     Offset: 0x10000

 # CHECK-NEXT:     FileSize: 0
 # CHECK-NEXT:     MemSize: 0
 # CHECK-NEXT:     Flags [
 # CHECK-NEXT:       PF_R
 # CHECK-NEXT:       PF_W
 # CHECK-NEXT:     ]
 # CHECK-NEXT:     Alignment: 0
 # CHECK-NEXT:   }
+# CHECK-NEXT:   ProgramHeader {
+# CHECK-NEXT:     Type: PT_MIPS_REGINFO
+# CHECK-NEXT:     Offset: 0x130
+# CHECK-NEXT:     VirtualAddress: 0x10130
+# CHECK-NEXT:     PhysicalAddress: 0x10130
+# CHECK-NEXT:     FileSize: 24
+# CHECK-NEXT:     MemSize: 24
+# CHECK-NEXT:     Flags [ (0x4)
+# CHECK-NEXT:       PF_R (0x4)
+# CHECK-NEXT:     ]
+# CHECK-NEXT:     Alignment: 4
+# CHECK-NEXT:   }
+# CHECK-NEXT:   ProgramHeader {
+# CHECK-NEXT:     Type: PT_MIPS_ABIFLAGS
+# CHECK-NEXT:     Offset: 0x118
+# CHECK-NEXT:     VirtualAddress: 0x10118
+# CHECK-NEXT:     PhysicalAddress: 0x10118
+# CHECK-NEXT:     FileSize: 24
+# CHECK-NEXT:     MemSize: 24
+# CHECK-NEXT:     Flags [ (0x4)
+# CHECK-NEXT:       PF_R (0x4)
+# CHECK-NEXT:     ]
+# CHECK-NEXT:     Alignment: 8
+# CHECK-NEXT:   }
 # CHECK-NEXT: ]

lld/test/ELF/mips-got-string.s

 # REQUIRES: mips
 # Check R_MIPS_GOT16 relocation against merge section.
 
 # RUN: llvm-mc -filetype=obj -triple=mips-unknown-linux -o %t.o %s
 # RUN: ld.lld -shared -o %t.so %t.o
 # RUN: llvm-readobj -t -mips-plt-got %t.so | FileCheck %s
 
 # CHECK:      Symbol {
 # CHECK:        Name: $.str
-# CHECK-NEXT:   Value: 0x1B1
+# CHECK-NEXT:   Value: 0x1F1
 # CHECK:      }
 
 # CHECK:      Local entries [
 # CHECK-NEXT:   Entry {
 # CHECK-NEXT:     Address:
 # CHECK-NEXT:     Access: -32744
 # CHECK-NEXT:     Initial: 0x0
 # CHECK:        }

lld/test/ELF/mips-options.s

 # REQUIRES: mips
 # Check MIPS .MIPS.options section generation.
 
 # RUN: llvm-mc -filetype=obj -triple=mips64-unknown-linux %s -o %t1.o
 # RUN: llvm-mc -filetype=obj -triple=mips64-unknown-linux \
 # RUN:         %S/Inputs/mips-dynamic.s -o %t2.o
 # RUN: echo "SECTIONS { \
 # RUN:          . = 0x100000000; \
 # RUN:          .got  : { *(.got) } }" > %t.rel.script
 # RUN: ld.lld %t1.o %t2.o --gc-sections --script %t.rel.script -shared -o %t.so
-# RUN: llvm-readobj -symbols -mips-options %t.so | FileCheck %s
+# RUN: llvm-readobj -program-headers -symbols -mips-options %t.so | FileCheck %s
 
   .text
   .globl  __start
 __start:
     lui  $gp, %hi(%neg(%gp_rel(g1)))
 
 # CHECK:      Name: _gp
 # CHECK-NEXT: Value: 0x[[GP:[0-9A-F]+]]
 
+# CHECK:      ProgramHeader {
+# CHECK:        Type: PT_MIPS_OPTIONS
+# CHECK-NEXT:   Offset:
+# CHECK-NEXT:   VirtualAddress:
+# CHECK-NEXT:   PhysicalAddress:
+# CHECK-NEXT:   FileSize:
+# CHECK-NEXT:   MemSize:
+# CHECK-NEXT:   Flags [
+# CHECK-NEXT:     PF_R
+# CHECK-NEXT:   ]
+# CHECK-NEXT:   Alignment: 8
+# CHECK-NEXT: }
+
 # CHECK:      MIPS Options {
 # CHECK-NEXT:   ODK_REGINFO {
 # CHECK-NEXT:     GP: 0x[[GP]]
 # CHECK-NEXT:     General Mask: 0x10000001
 # CHECK-NEXT:     Co-Proc Mask0: 0x0
 # CHECK-NEXT:     Co-Proc Mask1: 0x0
 # CHECK-NEXT:     Co-Proc Mask2: 0x0
 # CHECK-NEXT:     Co-Proc Mask3: 0x0
 # CHECK-NEXT:   }
 # CHECK-NEXT: }