As pointed out in D57833, we can add a few extra Thumb1 opcodes
to the peephole optimisers ability to remove CMP instructions.
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LGTM
lib/Target/ARM/ARMBaseInstrInfo.cpp | ||
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2830 | This change is necessary to prevent illegal reordering involving ADC/SBC, I guess? And this is covered by the test test_adc_mov in peephole-mi.mir? Maybe worth mentioning in the commit message. |
This change is necessary to prevent illegal reordering involving ADC/SBC, I guess? And this is covered by the test test_adc_mov in peephole-mi.mir? Maybe worth mentioning in the commit message.