[LLD] [COFF] Create range extension thunks for ARM64

[mstorsjo]

Summary

On ARM64, this is normally necessary only after a module exceeds 128 MB in size (while the limit for thumb is 16 MB). For conditional branches, the range limit is only 1 MB though (the same as for thumb), and for the tbz instruction, the range is only 32 KB, which allows for a test smaller than the full 128 MB.

This fixes PR40467.

[mstorsjo]

Fixed a typo in the range checks for adding thunks for conditional branches. For the tbz instruction with the relocation IMAGE_REL_ARM64_BRANCH14, the range actually only is +/- 32 KB, making the testcase produce slightly smaller intermediates.

[ruiu]

COFF/Writer.cpp

374–380 ↗

(On Diff #184706)

This is the only place you are using RangeExtensionThunk{ARM,ARM64} as RangeExtensionThunk, but you can easily avoid it. So, RangeExtensionThunk class doesn't seem necessary. Can you remove that class and make RangeExtensionThunk{ARM,ARM64} directly inherit Chunk, so that you have shallower class hierarchy?

[mstorsjo]

Removed unnecessary intermediate class, removed a test for branches out of range which no longer is an error.

[TomTan]

COFF/Chunks.cpp

690 ↗

(On Diff #184787)

nit: specify the range is ±4GB?

[ruiu]

LGTM

[mstorsjo]

@ruiu - What do you think about this and D57574 wrt backporting to 8.0? They should be pretty safe, but on the other hand I don't think they're something that many random users will run into either.

[ruiu]

In D57575#1381528, @mstorsjo wrote:

@ruiu - What do you think about this and D57574 wrt backporting to 8.0? They should be pretty safe, but on the other hand I don't think they're something that many random users will run into either.

I wouldn't personally request cherrypicking that change at this point because it's not a regression from 7.0 and doesn't seem like a big issue. But if you feel otherwise, feel free to submit a cherrypick request.

[dmajor]

In D57575#1381581, @ruiu wrote:

In D57575#1381528, @mstorsjo wrote:

@ruiu - What do you think about this and D57574 wrt backporting to 8.0? They should be pretty safe, but on the other hand I don't think they're something that many random users will run into either.

I wouldn't personally request cherrypicking that change at this point because it's not a regression from 7.0 and doesn't seem like a big issue. But if you feel otherwise, feel free to submit a cherrypick request.

I'd like to have these fixes in the clang 8 used by Mozilla automation. It would make things mildly easier if they were merged to the release branch, but if needed we can carry the patches locally.

[ruiu]

I'd like to have these fixes in the clang 8 used by Mozilla automation. It would make things mildly easier if they were merged to the release branch, but if needed we can carry the patches locally.

I'm fine if you file a cherrypick request.

lld/trunk/COFF/Chunks.h

public:
   explicit ImportThunkChunkARM64(Defined *S) : ImpSymbol(S) {}
   size_t getSize() const override { return sizeof(ImportThunkARM64); }
   void writeTo(uint8_t *Buf) const override;
 
 private:
   Defined *ImpSymbol;
 };
 
-class RangeExtensionThunk : public Chunk {
+class RangeExtensionThunkARM : public Chunk {
 public:
-  explicit RangeExtensionThunk(Defined *T) : Target(T) {}
+  explicit RangeExtensionThunkARM(Defined *T) : Target(T) {}
+  size_t getSize() const override;
+  void writeTo(uint8_t *Buf) const override;
+
+  Defined *Target;
+};
+
+class RangeExtensionThunkARM64 : public Chunk {
+public:
+  explicit RangeExtensionThunkARM64(Defined *T) : Target(T) {}
   size_t getSize() const override;
   void writeTo(uint8_t *Buf) const override;
 
   Defined *Target;
 };
 
 // Windows-specific.
 // See comments for DefinedLocalImport class.

lld/trunk/COFF/Chunks.cpp

 
 // A Thumb2, PIC, non-interworking range extension thunk.
 const uint8_t ArmThunk[] = {
     0x40, 0xf2, 0x00, 0x0c, // P:  movw ip,:lower16:S - (P + (L1-P) + 4)
     0xc0, 0xf2, 0x00, 0x0c, //     movt ip,:upper16:S - (P + (L1-P) + 4)
     0xe7, 0x44,             // L1: add  pc, ip
 };
 
-size_t RangeExtensionThunk::getSize() const {
+size_t RangeExtensionThunkARM::getSize() const {
   assert(Config->Machine == ARMNT);
   return sizeof(ArmThunk);
 }
 
-void RangeExtensionThunk::writeTo(uint8_t *Buf) const {
+void RangeExtensionThunkARM::writeTo(uint8_t *Buf) const {
   assert(Config->Machine == ARMNT);
   uint64_t Offset = Target->getRVA() - RVA - 12;
   memcpy(Buf + OutputSectionOff, ArmThunk, sizeof(ArmThunk));
   applyMOV32T(Buf + OutputSectionOff, uint32_t(Offset));
 }
 
+// A position independent ARM64 adrp+add thunk, with a maximum range of
+// +/- 4 GB, which is enough for any PE-COFF.
+const uint8_t Arm64Thunk[] = {
+    0x10, 0x00, 0x00, 0x90, // adrp x16, Dest
+    0x10, 0x02, 0x00, 0x91, // add  x16, x16, :lo12:Dest
+    0x00, 0x02, 0x1f, 0xd6, // br   x16
+};
+
+size_t RangeExtensionThunkARM64::getSize() const {
+  assert(Config->Machine == ARM64);
+  return sizeof(Arm64Thunk);
+}
+
+void RangeExtensionThunkARM64::writeTo(uint8_t *Buf) const {
+  assert(Config->Machine == ARM64);
+  memcpy(Buf + OutputSectionOff, Arm64Thunk, sizeof(Arm64Thunk));
+  applyArm64Addr(Buf + OutputSectionOff + 0, Target->getRVA(), RVA, 12);
+  applyArm64Imm(Buf + OutputSectionOff + 4, Target->getRVA() & 0xfff, 0);
+}
+
 void LocalImportChunk::getBaserels(std::vector<Baserel> *Res) {
   Res->emplace_back(getRVA());
 }
 
 size_t LocalImportChunk::getSize() const { return Config->Wordsize; }
 
 void LocalImportChunk::writeTo(uint8_t *Buf) const {
   if (Config->is64()) {

lld/trunk/COFF/Writer.cpp

 }
 
 } // namespace coff
 } // namespace lld
 
 // Check whether the target address S is in range from a relocation
 // of type RelType at address P.
 static bool isInRange(uint16_t RelType, uint64_t S, uint64_t P, int Margin) {
-  assert(Config->Machine == ARMNT);
+  if (Config->Machine == ARMNT) {
     int64_t Diff = AbsoluteDifference(S, P + 4) + Margin;
     switch (RelType) {
     case IMAGE_REL_ARM_BRANCH20T:
       return isInt<21>(Diff);
     case IMAGE_REL_ARM_BRANCH24T:
     case IMAGE_REL_ARM_BLX23T:
       return isInt<25>(Diff);
     default:
       return true;
     }
+  } else if (Config->Machine == ARM64) {
+    int64_t Diff = AbsoluteDifference(S, P) + Margin;
+    switch (RelType) {
+    case IMAGE_REL_ARM64_BRANCH26:
+      return isInt<28>(Diff);
+    case IMAGE_REL_ARM64_BRANCH19:
+      return isInt<21>(Diff);
+    case IMAGE_REL_ARM64_BRANCH14:
+      return isInt<16>(Diff);
+    default:
+      return true;
+    }
+  } else {
+    llvm_unreachable("Unexpected architecture");
+  }
 }
 
 // Return the last thunk for the given target if it is in range,
 // or create a new one.
 static std::pair<Defined *, bool>
 getThunk(DenseMap<uint64_t, Defined *> &LastThunks, Defined *Target, uint64_t P,
          uint16_t Type, int Margin) {
   Defined *&LastThunk = LastThunks[Target->getRVA()];
   if (LastThunk && isInRange(Type, LastThunk->getRVA(), P, Margin))
     return {LastThunk, false};
-  RangeExtensionThunk *C = make<RangeExtensionThunk>(Target);
+  Chunk *C;
+  switch (Config->Machine) {
+  case ARMNT:
+    C = make<RangeExtensionThunkARM>(Target);
+    break;
+  case ARM64:
+    C = make<RangeExtensionThunkARM64>(Target);
+    break;
+  default:
+    llvm_unreachable("Unexpected architecture");
+  }
   Defined *D = make<DefinedSynthetic>("", C);
   LastThunk = D;
   return {D, true};
 }
 
 // This checks all relocations, and for any relocation which isn't in range
 // it adds a thunk after the section chunk that contains the relocation.
 // If the latest thunk for the specific target is in range, that is used
for (Chunk *C : Chunks) {
     }
   }
   return true;
 }
 
 // Assign addresses and add thunks if necessary.
 void Writer::finalizeAddresses() {
   assignAddresses();
-  if (Config->Machine != ARMNT)
+  if (Config->Machine != ARMNT && Config->Machine != ARM64)
     return;
 
   size_t OrigNumChunks = 0;
   for (OutputSection *Sec : OutputSections) {
     Sec->OrigChunks = Sec->Chunks;
     OrigNumChunks += Sec->Chunks.size();
   }
 

lld/trunk/test/COFF/arm64-branch-range.test

-// REQUIRES: aarch64
-
-// RUN: echo -e '.globl _start\n _start:\n bl too_far26\n' > %t.main26.s
-// RUN: echo -e '.globl _start\n _start:\n b.ne too_far19\n' > %t.main19.s
-// RUN: echo -e '.globl _start\n _start:\n tbz x0, #0, too_far14\n' > %t.main14.s
-
-// RUN: llvm-mc -filetype=obj -triple=aarch64-windows %t.main26.s -o %t.main26.obj
-// RUN: llvm-mc -filetype=obj -triple=aarch64-windows %t.main19.s -o %t.main19.obj
-// RUN: llvm-mc -filetype=obj -triple=aarch64-windows %t.main14.s -o %t.main14.obj
-// RUN: llvm-mc -filetype=obj -triple=aarch64-windows %S/Inputs/far-arm64-abs.s -o %t.far.obj
-
-// RUN: not lld-link -base:0x10000 -entry:_start -subsystem:console %t.main26.obj %t.far.obj -out:%t.exe 2>&1 | FileCheck %s
-// RUN: not lld-link -base:0x10000 -entry:_start -subsystem:console %t.main19.obj %t.far.obj -out:%t.exe 2>&1 | FileCheck %s
-// RUN: not lld-link -base:0x10000 -entry:_start -subsystem:console %t.main14.obj %t.far.obj -out:%t.exe 2>&1 | FileCheck %s
-
-// CHECK: relocation out of range

lld/trunk/test/COFF/arm64-thunks.s

+// REQUIRES: aarch64
+// RUN: llvm-mc -filetype=obj -triple=aarch64-windows %s -o %t.obj
+// RUN: lld-link -entry:main -subsystem:console %t.obj -out:%t.exe -verbose 2>&1 | FileCheck -check-prefix=VERBOSE %s
+// RUN: llvm-objdump -d %t.exe | FileCheck -check-prefix=DISASM %s
+
+// VERBOSE: Added 1 thunks with margin {{.*}} in 1 passes
+
+    .globl main
+    .globl func1
+    .text
+main:
+    tbz w0, #0, func1
+    ret
+    .section .text$a, "xr"
+    .space 0x8000
+    .section .text$b, "xr"
+func1:
+    ret
+
+// DISASM: 0000000140001000 .text:
+// DISASM: 140001000:      40 00 00 36     tbz     w0, #0, #8 <.text+0x8>
+// DISASM: 140001004:      c0 03 5f d6     ret
+// DISASM: 140001008:      50 00 00 90     adrp    x16, #32768
+// DISASM: 14000100c:      10 52 00 91     add     x16, x16, #20
+// DISASM: 140001010:      00 02 1f d6     br      x16
+
+// DISASM: 140009014:      c0 03 5f d6     ret