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Differential D57291

[COFF] Add new relocation types.
ClosedPublic

Authored by mstorsjo on Jan 26 2019, 12:44 PM.

Details

Reviewers
pcc
rnk
compnerd
ruiu
TomTan
Commits
rGe5eb6fb95087: [COFF] Add new relocation types.
rL352324: [COFF] Add new relocation types.

Diff Detail

Event Timeline

mstorsjo created this revision.Jan 26 2019, 12:44 PM
mstorsjo added a reviewer: TomTan.
pcc accepted this revision.Jan 26 2019, 1:36 PM

LGTM

include/llvm/BinaryFormat/COFF.h
373

You might want to add IMAGE_REL_ARM_REL32 here, which is also new to the 11/04/2018 revision of the spec.

This revision is now accepted and ready to land.Jan 26 2019, 1:36 PM
mstorsjo marked an inline comment as done.Jan 26 2019, 1:42 PM
mstorsjo added inline comments.
include/llvm/BinaryFormat/COFF.h
373

Oh, I didn't notice that one as it was in the middle of the range.

mstorsjo updated this revision to Diff 183730.Jan 26 2019, 1:58 PM

Added IMAGE_REL_ARM_REL32.

pcc accepted this revision.Jan 26 2019, 3:17 PM

LGTM

Closed by commit rL352324: [COFF] Add new relocation types. (authored by mstorsjo). · Explain WhyJan 27 2019, 11:53 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
include/
llvm/
BinaryFormat/
4 lines
lib/
Object/
2 lines
ObjectYAML/
2 lines

Diff 183724

include/llvm/BinaryFormat/COFF.h

Show First 20 Lines • Show All 364 Lines • ▼ Show 20 Linesenum RelocationTypesARM : unsigned {
IMAGE_REL_ARM_ABSOLUTE = 0x0000, IMAGE_REL_ARM_ABSOLUTE = 0x0000,
IMAGE_REL_ARM_ADDR32 = 0x0001, IMAGE_REL_ARM_ADDR32 = 0x0001,
IMAGE_REL_ARM_ADDR32NB = 0x0002, IMAGE_REL_ARM_ADDR32NB = 0x0002,
IMAGE_REL_ARM_BRANCH24 = 0x0003, IMAGE_REL_ARM_BRANCH24 = 0x0003,
IMAGE_REL_ARM_BRANCH11 = 0x0004, IMAGE_REL_ARM_BRANCH11 = 0x0004,
IMAGE_REL_ARM_TOKEN = 0x0005, IMAGE_REL_ARM_TOKEN = 0x0005,
IMAGE_REL_ARM_BLX24 = 0x0008, IMAGE_REL_ARM_BLX24 = 0x0008,
IMAGE_REL_ARM_BLX11 = 0x0009, IMAGE_REL_ARM_BLX11 = 0x0009,
IMAGE_REL_ARM_SECTION = 0x000E, IMAGE_REL_ARM_SECTION = 0x000E,
pccUnsubmitted
Not Done
ReplyInline Actions

You might want to add IMAGE_REL_ARM_REL32 here, which is also new to the 11/04/2018 revision of the spec.

pcc: You might want to add `IMAGE_REL_ARM_REL32` here, which is also new to the 11/04/2018 revision…
mstorsjoAuthorUnsubmitted
Done
ReplyInline Actions

Oh, I didn't notice that one as it was in the middle of the range.

mstorsjo: Oh, I didn't notice that one as it was in the middle of the range.
IMAGE_REL_ARM_SECREL = 0x000F, IMAGE_REL_ARM_SECREL = 0x000F,
IMAGE_REL_ARM_MOV32A = 0x0010, IMAGE_REL_ARM_MOV32A = 0x0010,
IMAGE_REL_ARM_MOV32T = 0x0011, IMAGE_REL_ARM_MOV32T = 0x0011,
IMAGE_REL_ARM_BRANCH20T = 0x0012, IMAGE_REL_ARM_BRANCH20T = 0x0012,
IMAGE_REL_ARM_BRANCH24T = 0x0014, IMAGE_REL_ARM_BRANCH24T = 0x0014,
IMAGE_REL_ARM_BLX23T = 0x0015 IMAGE_REL_ARM_BLX23T = 0x0015,
IMAGE_REL_ARM_PAIR = 0x0016,
}; };
enum RelocationTypesARM64 : unsigned { enum RelocationTypesARM64 : unsigned {
IMAGE_REL_ARM64_ABSOLUTE = 0x0000, IMAGE_REL_ARM64_ABSOLUTE = 0x0000,
IMAGE_REL_ARM64_ADDR32 = 0x0001, IMAGE_REL_ARM64_ADDR32 = 0x0001,
IMAGE_REL_ARM64_ADDR32NB = 0x0002, IMAGE_REL_ARM64_ADDR32NB = 0x0002,
IMAGE_REL_ARM64_BRANCH26 = 0x0003, IMAGE_REL_ARM64_BRANCH26 = 0x0003,
IMAGE_REL_ARM64_PAGEBASE_REL21 = 0x0004, IMAGE_REL_ARM64_PAGEBASE_REL21 = 0x0004,
IMAGE_REL_ARM64_REL21 = 0x0005, IMAGE_REL_ARM64_REL21 = 0x0005,
IMAGE_REL_ARM64_PAGEOFFSET_12A = 0x0006, IMAGE_REL_ARM64_PAGEOFFSET_12A = 0x0006,
IMAGE_REL_ARM64_PAGEOFFSET_12L = 0x0007, IMAGE_REL_ARM64_PAGEOFFSET_12L = 0x0007,
IMAGE_REL_ARM64_SECREL = 0x0008, IMAGE_REL_ARM64_SECREL = 0x0008,
IMAGE_REL_ARM64_SECREL_LOW12A = 0x0009, IMAGE_REL_ARM64_SECREL_LOW12A = 0x0009,
IMAGE_REL_ARM64_SECREL_HIGH12A = 0x000A, IMAGE_REL_ARM64_SECREL_HIGH12A = 0x000A,
IMAGE_REL_ARM64_SECREL_LOW12L = 0x000B, IMAGE_REL_ARM64_SECREL_LOW12L = 0x000B,
IMAGE_REL_ARM64_TOKEN = 0x000C, IMAGE_REL_ARM64_TOKEN = 0x000C,
IMAGE_REL_ARM64_SECTION = 0x000D, IMAGE_REL_ARM64_SECTION = 0x000D,
IMAGE_REL_ARM64_ADDR64 = 0x000E, IMAGE_REL_ARM64_ADDR64 = 0x000E,
IMAGE_REL_ARM64_BRANCH19 = 0x000F, IMAGE_REL_ARM64_BRANCH19 = 0x000F,
IMAGE_REL_ARM64_BRANCH14 = 0x0010, IMAGE_REL_ARM64_BRANCH14 = 0x0010,
IMAGE_REL_ARM64_REL32 = 0x0011,
}; };
enum COMDATType : unsigned { enum COMDATType : unsigned {
IMAGE_COMDAT_SELECT_NODUPLICATES = 1, IMAGE_COMDAT_SELECT_NODUPLICATES = 1,
IMAGE_COMDAT_SELECT_ANY, IMAGE_COMDAT_SELECT_ANY,
IMAGE_COMDAT_SELECT_SAME_SIZE, IMAGE_COMDAT_SELECT_SAME_SIZE,
IMAGE_COMDAT_SELECT_EXACT_MATCH, IMAGE_COMDAT_SELECT_EXACT_MATCH,
IMAGE_COMDAT_SELECT_ASSOCIATIVE, IMAGE_COMDAT_SELECT_ASSOCIATIVE,
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lib/Object/COFFObjectFile.cpp

Show First 20 Lines • Show All 991 Lines • ▼ Show 20 Lines
LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM_BLX11); LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM_BLX11);
LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM_SECTION); LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM_SECTION);
LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM_SECREL); LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM_SECREL);
LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM_MOV32A); LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM_MOV32A);
LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM_MOV32T); LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM_MOV32T);
LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM_BRANCH20T); LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM_BRANCH20T);
LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM_BRANCH24T); LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM_BRANCH24T);
LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM_BLX23T); LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM_BLX23T);
LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM_PAIR);
default: default:
return "Unknown"; return "Unknown";
} }
break; break;
case COFF::IMAGE_FILE_MACHINE_ARM64: case COFF::IMAGE_FILE_MACHINE_ARM64:
switch (Type) { switch (Type) {
LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM64_ABSOLUTE); LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM64_ABSOLUTE);
LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM64_ADDR32); LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM64_ADDR32);
LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM64_ADDR32NB); LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM64_ADDR32NB);
LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM64_BRANCH26); LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM64_BRANCH26);
LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM64_PAGEBASE_REL21); LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM64_PAGEBASE_REL21);
LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM64_REL21); LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM64_REL21);
LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM64_PAGEOFFSET_12A); LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM64_PAGEOFFSET_12A);
LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM64_PAGEOFFSET_12L); LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM64_PAGEOFFSET_12L);
LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM64_SECREL); LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM64_SECREL);
LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM64_SECREL_LOW12A); LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM64_SECREL_LOW12A);
LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM64_SECREL_HIGH12A); LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM64_SECREL_HIGH12A);
LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM64_SECREL_LOW12L); LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM64_SECREL_LOW12L);
LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM64_TOKEN); LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM64_TOKEN);
LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM64_SECTION); LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM64_SECTION);
LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM64_ADDR64); LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM64_ADDR64);
LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM64_BRANCH19); LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM64_BRANCH19);
LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM64_BRANCH14); LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM64_BRANCH14);
LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_ARM64_REL32);
default: default:
return "Unknown"; return "Unknown";
} }
break; break;
case COFF::IMAGE_FILE_MACHINE_I386: case COFF::IMAGE_FILE_MACHINE_I386:
switch (Type) { switch (Type) {
LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_I386_ABSOLUTE); LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_I386_ABSOLUTE);
LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_I386_DIR16); LLVM_COFF_SWITCH_RELOC_TYPE_NAME(IMAGE_REL_I386_DIR16);
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lib/ObjectYAML/COFFYAML.cpp

Show First 20 Lines • Show All 188 Lines • ▼ Show 20 Linesvoid ScalarEnumerationTraits<COFF::RelocationTypesARM>::enumeration(
ECase(IMAGE_REL_ARM_BLX11); ECase(IMAGE_REL_ARM_BLX11);
ECase(IMAGE_REL_ARM_SECTION); ECase(IMAGE_REL_ARM_SECTION);
ECase(IMAGE_REL_ARM_SECREL); ECase(IMAGE_REL_ARM_SECREL);
ECase(IMAGE_REL_ARM_MOV32A); ECase(IMAGE_REL_ARM_MOV32A);
ECase(IMAGE_REL_ARM_MOV32T); ECase(IMAGE_REL_ARM_MOV32T);
ECase(IMAGE_REL_ARM_BRANCH20T); ECase(IMAGE_REL_ARM_BRANCH20T);
ECase(IMAGE_REL_ARM_BRANCH24T); ECase(IMAGE_REL_ARM_BRANCH24T);
ECase(IMAGE_REL_ARM_BLX23T); ECase(IMAGE_REL_ARM_BLX23T);
ECase(IMAGE_REL_ARM_PAIR);
} }
void ScalarEnumerationTraits<COFF::RelocationTypesARM64>::enumeration( void ScalarEnumerationTraits<COFF::RelocationTypesARM64>::enumeration(
IO &IO, COFF::RelocationTypesARM64 &Value) { IO &IO, COFF::RelocationTypesARM64 &Value) {
ECase(IMAGE_REL_ARM64_ABSOLUTE); ECase(IMAGE_REL_ARM64_ABSOLUTE);
ECase(IMAGE_REL_ARM64_ADDR32); ECase(IMAGE_REL_ARM64_ADDR32);
ECase(IMAGE_REL_ARM64_ADDR32NB); ECase(IMAGE_REL_ARM64_ADDR32NB);
ECase(IMAGE_REL_ARM64_BRANCH26); ECase(IMAGE_REL_ARM64_BRANCH26);
ECase(IMAGE_REL_ARM64_PAGEBASE_REL21); ECase(IMAGE_REL_ARM64_PAGEBASE_REL21);
ECase(IMAGE_REL_ARM64_REL21); ECase(IMAGE_REL_ARM64_REL21);
ECase(IMAGE_REL_ARM64_PAGEOFFSET_12A); ECase(IMAGE_REL_ARM64_PAGEOFFSET_12A);
ECase(IMAGE_REL_ARM64_PAGEOFFSET_12L); ECase(IMAGE_REL_ARM64_PAGEOFFSET_12L);
ECase(IMAGE_REL_ARM64_SECREL); ECase(IMAGE_REL_ARM64_SECREL);
ECase(IMAGE_REL_ARM64_SECREL_LOW12A); ECase(IMAGE_REL_ARM64_SECREL_LOW12A);
ECase(IMAGE_REL_ARM64_SECREL_HIGH12A); ECase(IMAGE_REL_ARM64_SECREL_HIGH12A);
ECase(IMAGE_REL_ARM64_SECREL_LOW12L); ECase(IMAGE_REL_ARM64_SECREL_LOW12L);
ECase(IMAGE_REL_ARM64_TOKEN); ECase(IMAGE_REL_ARM64_TOKEN);
ECase(IMAGE_REL_ARM64_SECTION); ECase(IMAGE_REL_ARM64_SECTION);
ECase(IMAGE_REL_ARM64_ADDR64); ECase(IMAGE_REL_ARM64_ADDR64);
ECase(IMAGE_REL_ARM64_BRANCH19); ECase(IMAGE_REL_ARM64_BRANCH19);
ECase(IMAGE_REL_ARM64_BRANCH14); ECase(IMAGE_REL_ARM64_BRANCH14);
ECase(IMAGE_REL_ARM64_REL32);
} }
void ScalarEnumerationTraits<COFF::WindowsSubsystem>::enumeration( void ScalarEnumerationTraits<COFF::WindowsSubsystem>::enumeration(
IO &IO, COFF::WindowsSubsystem &Value) { IO &IO, COFF::WindowsSubsystem &Value) {
ECase(IMAGE_SUBSYSTEM_UNKNOWN); ECase(IMAGE_SUBSYSTEM_UNKNOWN);
ECase(IMAGE_SUBSYSTEM_NATIVE); ECase(IMAGE_SUBSYSTEM_NATIVE);
ECase(IMAGE_SUBSYSTEM_WINDOWS_GUI); ECase(IMAGE_SUBSYSTEM_WINDOWS_GUI);
ECase(IMAGE_SUBSYSTEM_WINDOWS_CUI); ECase(IMAGE_SUBSYSTEM_WINDOWS_CUI);
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