[AMDGPU] Add some missing always-uniform values.

[sheredom]

Summary

This commit adds some missing intrinsics into the isAlwaysUniform list for the AMDGPU backend.

[arsenm]

Needs tests

[sheredom]

@arsenm agreed - not quite sure how to do tests for this? I started to look at how we test alias analysis, and they have a cl::opt to force print the debug info for that pass, and that is how our amdgpu-alias-analysis.ll tests the aliasing rules. How exactly to test that divergence analysis did something here?

[arsenm]

In D56845#1361431, @sheredom wrote:

@arsenm agreed - not quite sure how to do tests for this? I started to look at how we test alias analysis, and they have a cl::opt to force print the debug info for that pass, and that is how our amdgpu-alias-analysis.ll tests the aliasing rules. How exactly to test that divergence analysis did something here?

Add more cases to test/Analysis/DivergenceAnalysis/AMDGPU/always_uniform.ll?

[sheredom]

Also tag s.getpc as scalar, and add tests in the Analysis folder like suggested.

[arsenm]

lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp

584–585 ↗

(On Diff #182296)

I think the presence of these two is questionable. getpc in particular should already behave correctly since it has no source operands. If s_buffer_load has divergent arguments, the program is broken anyway

test/Analysis/DivergenceAnalysis/AMDGPU/always_uniform.ll

3–4 ↗

(On Diff #182296)

This should probably be renamed, it's really testing readfirstlane, not work item.id.x

[sheredom]

Review comments.

[arsenm]

LGTM with name fix

test/Analysis/DivergenceAnalysis/AMDGPU/always_uniform.ll

3–4 ↗

(On Diff #182296)

You changed this but didn't change the name?

[sheredom]

Fix review comments.

llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp

 
 bool GCNTTIImpl::isAlwaysUniform(const Value *V) const {
   if (const IntrinsicInst *Intrinsic = dyn_cast<IntrinsicInst>(V)) {
     switch (Intrinsic->getIntrinsicID()) {
     default:
       return false;
     case Intrinsic::amdgcn_readfirstlane:
     case Intrinsic::amdgcn_readlane:
+    case Intrinsic::amdgcn_icmp:
+    case Intrinsic::amdgcn_fcmp:
       return true;
     }
   }
   return false;
 }
 
 unsigned GCNTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index,
                                        Type *SubTp) {

llvm/trunk/test/Analysis/DivergenceAnalysis/AMDGPU/always_uniform.ll

 ; RUN: opt  -mtriple amdgcn-unknown-amdhsa -analyze -divergence -use-gpu-divergence-analysis %s | FileCheck %s
 
-define amdgpu_kernel void @workitem_id_x() #1 {
+; CHECK: for function 'readfirstlane':
+define amdgpu_kernel void @readfirstlane() {
   %id.x = call i32 @llvm.amdgcn.workitem.id.x()
 ; CHECK: DIVERGENT:  %id.x = call i32 @llvm.amdgcn.workitem.id.x()
   %first.lane = call i32 @llvm.amdgcn.readfirstlane(i32 %id.x)
 ; CHECK-NOT: DIVERGENT:  %first.lane = call i32 @llvm.amdgcn.readfirstlane(i32 %id.x)
   ret void
 }
 
+; CHECK: for function 'icmp':
+define amdgpu_kernel void @icmp(i32 inreg %x) {
+; CHECK-NOT: DIVERGENT:  %icmp = call i64 @llvm.amdgcn.icmp.i32
+  %icmp = call i64 @llvm.amdgcn.icmp.i32(i32 %x, i32 0, i32 33)
+  ret void
+}
+
+; CHECK: for function 'fcmp':
+define amdgpu_kernel void @fcmp(float inreg %x, float inreg %y) {
+; CHECK-NOT: DIVERGENT:  %fcmp = call i64 @llvm.amdgcn.fcmp.i32
+  %fcmp = call i64 @llvm.amdgcn.fcmp.i32(float %x, float %y, i32 33)
+  ret void
+}
+
 declare i32 @llvm.amdgcn.workitem.id.x() #0
 declare i32 @llvm.amdgcn.readfirstlane(i32) #0
+declare i64 @llvm.amdgcn.icmp.i32(i32, i32, i32) #1
+declare i64 @llvm.amdgcn.fcmp.i32(float, float, i32) #1
 
 attributes #0 = { nounwind readnone }
+attributes #1 = { nounwind readnone convergent }