[PowerPC] Fix the bug of ISD::ADDE to set its second return type to glue

[ZhangKang]

Summary

This patch is to fix the bug imported by rL341634: https://reviews.llvm.org/rL341634 .
In above submit , the the return type of ISD::ADDE is 14224: SDVTList VTs = DAG.getVTList(MVT::i64, MVT::i64),
but in fact, the second return type of ISD::ADDE should be MVT::Glue not MVT::i64.

[hfinkel]

LGTM

[hfinkel]

In D55977#1339255, @hfinkel wrote:

LGTM

Also, if there's a way to have a non-asserts-required test case, that would be useful. How did you notice the problem?

[ZhangKang]

In D55977#1339258, @hfinkel wrote:

In D55977#1339255, @hfinkel wrote:

LGTM

Also, if there's a way to have a non-asserts-required test case, that would be useful. How did you notice the problem?

@hfinkel , I notice the bug of second return type for the ISD::ADDE when I am working on another issue about ISD::ADDE, whose code has not been submitted.
I think it's hard to find another no-asserts case, because there are few conditions the bug will be triggered.

llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp

static SDValue combineADDToADDZE(SDNode *N, SelectionDAG &DAG,
 
   // If there is a pattern, canonicalize a zext operand to the RHS.
   if (LHSHasPattern && !RHSHasPattern)
     std::swap(LHS, RHS);
   else if (!LHSHasPattern && !RHSHasPattern)
     return SDValue();
 
   SDLoc DL(N);
-  SDVTList VTs = DAG.getVTList(MVT::i64, MVT::i64);
+  SDVTList VTs = DAG.getVTList(MVT::i64, MVT::Glue);
   SDValue Cmp = RHS.getOperand(0);
   SDValue Z = Cmp.getOperand(0);
   auto *Constant = dyn_cast<ConstantSDNode>(Cmp.getOperand(1));
 
   assert(Constant && "Constant Should not be a null pointer.");
   int64_t NegConstant = 0 - Constant->getSExtValue();
 
   switch(cast<CondCodeSDNode>(Cmp.getOperand(2))->get()) {

llvm/trunk/test/CodeGen/PowerPC/adde_return_type.ll

+; REQUIRES: asserts
+; RUN: llc -mtriple=powerpc64le-unknown-unknown -debug-only=legalize-types \
+; RUN:   < %s -o /dev/null 2>&1 | FileCheck %s
+
+define i64 @testAddeReturnType(i64 %X, i64 %Z) {
+; CHECK: Legally typed node: {{.*}}: i64,glue = adde {{.*}} 
+  %cmp = icmp ne i64 %Z, 0
+  %conv1 = zext i1 %cmp to i64
+  %add = add nsw i64 %conv1, %X
+  ret i64 %add
+}