[AMDGPU] Extend constant folding for logical operations

[grahamsellers]

Summary

This patch extends existing constant folding in logical operations to handle S_XNOR, S_NAND, S_NOR, S_ANDN2, S_ORN2, V_LSHL_ADD_U32 and V_AND_OR_B32. Also added a couple of tests for existing folds.

[arsenm]

test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir

209–211

Somehow this MIR looks ancient. The virtual registers should have the class annotations and then you can drop the register section. You can use -run-pass=none to convert this (and after delete the frame info etc.)

[grahamsellers]

Ran constant-fold-imm-immreg.mir through llc -run-pass none and fixed up the result as requested. This adds register info to the virtual registers and allows deletion of the register sections of the resulting file.

[arsenm]

LGTM with another minor round of test reduction

test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir

135–137

You can strip out all of these default false/0 fields too

[nhaehnle]

It looks like this was never committed. What's the next step here?

[grahamsellers]

In D55474#1388582, @nhaehnle wrote:

It looks like this was never committed. What's the next step here?

I didn't get this in before the break. When I returned, I integrated to ToT and re-ran tests, and got a bunch of failures. I'm pretty sure it's nothing to do with this change, but didn't want to commit as-is. I haven't had a chance to dig deeper. If there is a problem with this change, I'll want to re-review it.

[arsenm]

a19a56f6a1ff1f022f7af64bc1281fe018e84494

lib/Target/AMDGPU/SIFoldOperands.cpp

   case AMDGPU::S_OR_B32:
     Result = LHS | RHS;
     return true;
   case AMDGPU::V_XOR_B32_e64:
   case AMDGPU::V_XOR_B32_e32:
   case AMDGPU::S_XOR_B32:
     Result = LHS ^ RHS;
     return true;
+  case AMDGPU::S_XNOR_B32:
+    Result = ~(LHS ^ RHS);
+    return true;
+  case AMDGPU::S_NAND_B32:
+    Result = ~(LHS & RHS);
+    return true;
+  case AMDGPU::S_NOR_B32:
+    Result = ~(LHS | RHS);
+    return true;
+  case AMDGPU::S_ANDN2_B32:
+    Result = LHS & ~RHS;
+    return true;
+  case AMDGPU::S_ORN2_B32:
+    Result = LHS | ~RHS;
+    return true;
   case AMDGPU::V_LSHL_B32_e64:
   case AMDGPU::V_LSHL_B32_e32:
   case AMDGPU::S_LSHL_B32:
     // The instruction ignores the high bits for out of bounds shifts.
     Result = LHS << (RHS & 31);
     return true;
   case AMDGPU::V_LSHLREV_B32_e64:
   case AMDGPU::V_LSHLREV_B32_e32:

 
   int Src0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0);
   MachineOperand *Src0 = getImmOrMaterializedImm(MRI, MI->getOperand(Src0Idx));
   MachineOperand *Src1 = getImmOrMaterializedImm(MRI, MI->getOperand(Src1Idx));
 
   if (!Src0->isImm() && !Src1->isImm())
     return false;
 
-  if (MI->getOpcode() == AMDGPU::V_LSHL_OR_B32) {
+  if (MI->getOpcode() == AMDGPU::V_LSHL_OR_B32 ||
+      MI->getOpcode() == AMDGPU::V_LSHL_ADD_U32 ||
+      MI->getOpcode() == AMDGPU::V_AND_OR_B32) {
     if (Src0->isImm() && Src0->getImm() == 0) {
       // v_lshl_or_b32 0, X, Y -> copy Y
       // v_lshl_or_b32 0, X, K -> v_mov_b32 K
+      // v_lshl_add_b32 0, X, Y -> copy Y
+      // v_lshl_add_b32 0, X, K -> v_mov_b32 K
+      // v_and_or_b32 0, X, Y -> copy Y
+      // v_and_or_b32 0, X, K -> v_mov_b32 K
       bool UseCopy = TII->getNamedOperand(*MI, AMDGPU::OpName::src2)->isReg();
       MI->RemoveOperand(Src1Idx);
       MI->RemoveOperand(Src0Idx);
 
       MI->setDesc(TII->get(UseCopy ? AMDGPU::COPY : AMDGPU::V_MOV_B32_e32));
       return true;
     }
   }

test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir

 # RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx900 -verify-machineinstrs -run-pass si-fold-operands,dead-mi-elimination -o - %s | FileCheck -check-prefix=GCN %s
 ...
 
 # GCN-LABEL: name: s_fold_and_imm_regimm_32{{$}}
 # GCN: %10:vgpr_32 = V_MOV_B32_e32 1543, implicit $exec
 # GCN: BUFFER_STORE_DWORD_OFFSET killed %10,
 name:            s_fold_and_imm_regimm_32
 alignment:       0
 exposesReturnsTwice: false
 legalized:       false
 regBankSelected: false
 selected:        false
 tracksRegLiveness: true
-registers:
-  - { id: 0, class: sgpr_64 }
-  - { id: 1, class: sreg_64_xexec }
-  - { id: 2, class: sreg_32_xm0 }
-  - { id: 3, class: sreg_32_xm0 }
-  - { id: 4, class: sreg_32_xm0 }
-  - { id: 5, class: sreg_32_xm0 }
-  - { id: 6, class: sreg_128 }
-  - { id: 7, class: sreg_32_xm0 }
-  - { id: 8, class: sreg_32_xm0 }
-  - { id: 9, class: sreg_32_xm0 }
-  - { id: 10, class: vgpr_32 }
-liveins:
-  - { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
-frameInfo:
-  isFrameAddressTaken: false
-  isReturnAddressTaken: false
-  hasStackMap:     false
-  hasPatchPoint:   false
-  stackSize:       0
-  offsetAdjustment: 0
-  maxAlignment:    0
-  adjustsStack:    false
-  hasCalls:        false
-  maxCallFrameSize: 0
-  hasOpaqueSPAdjustment: false
-  hasVAStart:      false
-  hasMustTailInVarArgFunc: false
+liveins:         
+  - { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
 body:             |
   bb.0:
     liveins: $sgpr0_sgpr1
   
-    %0 = COPY $sgpr0_sgpr1
-    %1 = S_LOAD_DWORDX2_IMM %0, 36, 0
-    %2 = COPY %1.sub1
-    %3 = COPY %1.sub0
-    %4 = S_MOV_B32 61440
-    %5 = S_MOV_B32 -1
-    %6 = REG_SEQUENCE killed %2, 1, killed %3, 2, killed %4, 3, killed %5, 4
-    %7 = S_MOV_B32 1234567
-    %8 = S_MOV_B32 9999
-    %9 = S_AND_B32 killed %7, killed %8, implicit-def dead $scc
-    %10 = COPY %9
+    %0:sgpr_64 = COPY $sgpr0_sgpr1
+    %1:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0
+    %2:sreg_32_xm0 = COPY %1.sub1
+    %3:sreg_32_xm0 = COPY %1.sub0
+    %4:sreg_32_xm0 = S_MOV_B32 61440
+    %5:sreg_32_xm0 = S_MOV_B32 -1
+    %6:sreg_128 = REG_SEQUENCE killed %2, %subreg.sub0, killed %3, %subreg.sub1, killed %4, %subreg.sub2, killed %5, %subreg.sub3
+    %7:sreg_32_xm0 = S_MOV_B32 1234567
+    %8:sreg_32_xm0 = S_MOV_B32 9999
+    %9:sreg_32_xm0 = S_AND_B32 killed %7, killed %8, implicit-def dead $scc
+    %10:vgpr_32 = COPY %9
     BUFFER_STORE_DWORD_OFFSET killed %10, killed %6, 0, 0, 0, 0, 0, implicit $exec
     S_ENDPGM
 
 ...
 ---
 
 # GCN-LABEL: name: v_fold_and_imm_regimm_32{{$}}
 
-# GCN: %9:vgpr_32 = V_MOV_B32_e32 646, implicit $exec
-# GCN: FLAT_STORE_DWORD %19, %9,
+# GCN: %14:vgpr_32 = V_MOV_B32_e32 646, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %14,
 
-# GCN: %10:vgpr_32 = V_MOV_B32_e32 646, implicit $exec
-# GCN: FLAT_STORE_DWORD %19, %10
+# GCN: %15:vgpr_32 = V_MOV_B32_e32 646, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %15
 
-# GCN: %11:vgpr_32 = V_MOV_B32_e32 646, implicit $exec
-# GCN: FLAT_STORE_DWORD %19, %11,
+# GCN: %16:vgpr_32 = V_MOV_B32_e32 646, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %16,
 
-# GCN: %12:vgpr_32 = V_MOV_B32_e32 1234567, implicit $exec
-# GCN: FLAT_STORE_DWORD %19, %12,
+# GCN: %17:vgpr_32 = V_MOV_B32_e32 1234567, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %17,
 
-# GCN: %13:vgpr_32 = V_MOV_B32_e32 63, implicit $exec
-# GCN: FLAT_STORE_DWORD %19, %13,
+# GCN: %3:vgpr_32 = V_MOV_B32_e32 63, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %3,
 
 name:            v_fold_and_imm_regimm_32
 alignment:       0
 exposesReturnsTwice: false
 legalized:       false
 regBankSelected: false
 selected:        false
 tracksRegLiveness: true
-registers:
-  - { id: 0, class: sgpr_64 }
-  - { id: 1, class: sreg_32_xm0 }
-  - { id: 2, class: sgpr_32 }
-  - { id: 3, class: vgpr_32 }
-  - { id: 4, class: sreg_64_xexec }
-  - { id: 20, class: sreg_32_xm0 }
-  - { id: 24, class: vgpr_32 }
-  - { id: 25, class: vreg_64 }
-  - { id: 26, class: sreg_32_xm0 }
-  - { id: 27, class: vgpr_32 }
-  - { id: 28, class: vgpr_32 }
-  - { id: 29, class: vgpr_32 }
-  - { id: 30, class: vgpr_32 }
-  - { id: 31, class: vgpr_32 }
-  - { id: 32, class: vreg_64 }
-  - { id: 33, class: vreg_64 }
-  - { id: 34, class: vgpr_32 }
-  - { id: 35, class: vgpr_32 }
-  - { id: 36, class: vgpr_32 }
-  - { id: 37, class: vreg_64 }
-  - { id: 44, class: vgpr_32 }
+liveins:         
+  - { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
+  - { reg: '$vgpr0', virtual-reg: '%3' }
+body:             |
+  bb.0:
+    liveins: $sgpr0_sgpr1, $vgpr0
+  
+    %3:vgpr_32 = COPY $vgpr0
+    %0:sgpr_64 = COPY $sgpr0_sgpr1
+    %4:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0
+    %13:vgpr_32 = V_ASHRREV_I32_e64 31, %3, implicit $exec
+    %14:vreg_64 = REG_SEQUENCE %3, %subreg.sub0, %13, %subreg.sub1
+    %15:vreg_64 = V_LSHLREV_B64 2, killed %14, implicit $exec
+    %5:sreg_32_xm0 = COPY %4.sub1
+    %20:vgpr_32 = V_ADD_I32_e32 %4.sub0, %15.sub0, implicit-def $vcc, implicit $exec
+    %18:vgpr_32 = COPY killed %5
+    %17:vgpr_32 = V_ADDC_U32_e32 %15.sub1, %18, implicit-def $vcc, implicit $vcc, implicit $exec
+    %19:vreg_64 = REG_SEQUENCE %20, %subreg.sub0, killed %17, %subreg.sub1
+    %6:vgpr_32 = V_MOV_B32_e32 982, implicit $exec
+    %8:sreg_32_xm0 = S_MOV_B32 1234567
+    %16:vgpr_32 = V_MOV_B32_e32 63, implicit $exec
+    %9:vgpr_32 = V_AND_B32_e64 %8, %6, implicit $exec
+    FLAT_STORE_DWORD %19, %9, 0, 0, 0, implicit $exec, implicit $flat_scr
+    %10:vgpr_32 = V_AND_B32_e64 %6, %8, implicit $exec
+    FLAT_STORE_DWORD %19, %10, 0, 0, 0, implicit $exec, implicit $flat_scr
+    %11:vgpr_32 = V_AND_B32_e32 %8, %6, implicit $exec
+    FLAT_STORE_DWORD %19, %11, 0, 0, 0, implicit $exec, implicit $flat_scr
+    %12:vgpr_32 = V_AND_B32_e64 %8, %8, implicit $exec
+    FLAT_STORE_DWORD %19, %12, 0, 0, 0, implicit $exec, implicit $flat_scr
+    %13:vgpr_32 = V_AND_B32_e64 %16, %16, implicit $exec
+    FLAT_STORE_DWORD %19, %13, 0, 0, 0, implicit $exec, implicit $flat_scr
+    S_ENDPGM
+
+...
+---
+# GCN-LABEL: name: s_fold_andn2_imm_regimm_32{{$}}
+# GCN: %10:vgpr_32 = V_MOV_B32_e32 1233024, implicit $exec
+# GCN: BUFFER_STORE_DWORD_OFFSET killed %10,
+name:            s_fold_andn2_imm_regimm_32
+alignment:       0
+exposesReturnsTwice: false
+legalized:       false
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+liveins:         
+  - { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
+body:             |
+  bb.0:
+    liveins: $sgpr0_sgpr1
+  
+    %0:sgpr_64 = COPY $sgpr0_sgpr1
+    %1:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0
+    %2:sreg_32_xm0 = COPY %1.sub1
+    %3:sreg_32_xm0 = COPY %1.sub0
+    %4:sreg_32_xm0 = S_MOV_B32 61440
+    %5:sreg_32_xm0 = S_MOV_B32 -1
+    %6:sreg_128 = REG_SEQUENCE killed %2, %subreg.sub0, killed %3, %subreg.sub1, killed %4, %subreg.sub2, killed %5, %subreg.sub3
+    %7:sreg_32_xm0 = S_MOV_B32 1234567
+    %8:sreg_32_xm0 = S_MOV_B32 9999
+    %9:sreg_32_xm0 = S_ANDN2_B32 killed %7, killed %8, implicit-def dead $scc
+    %10:vgpr_32 = COPY %9
+    BUFFER_STORE_DWORD_OFFSET killed %10, killed %6, 0, 0, 0, 0, 0, implicit $exec
+    S_ENDPGM
+
+...
+---
+
+# GCN-LABEL: name: s_fold_or_imm_regimm_32{{$}}
+# GCN: %10:vgpr_32 = V_MOV_B32_e32 1243023, implicit $exec
+# GCN: BUFFER_STORE_DWORD_OFFSET killed %10,
+name:            s_fold_or_imm_regimm_32
+alignment:       0
+exposesReturnsTwice: false
+legalized:       false
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+liveins:         
+  - { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
+body:             |
+  bb.0:
+    liveins: $sgpr0_sgpr1
+  
+    %0:sgpr_64 = COPY $sgpr0_sgpr1
+    %1:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0
+    %2:sreg_32_xm0 = COPY %1.sub1
+    %3:sreg_32_xm0 = COPY %1.sub0
+    %4:sreg_32_xm0 = S_MOV_B32 61440
+    %5:sreg_32_xm0 = S_MOV_B32 -1
+    %6:sreg_128 = REG_SEQUENCE killed %2, %subreg.sub0, killed %3, %subreg.sub1, killed %4, %subreg.sub2, killed %5, %subreg.sub3
+    %7:sreg_32_xm0 = S_MOV_B32 1234567
+    %8:sreg_32_xm0 = S_MOV_B32 9999
+    %9:sreg_32_xm0 = S_OR_B32 killed %7, killed %8, implicit-def dead $scc
+    %10:vgpr_32 = COPY %9
+    BUFFER_STORE_DWORD_OFFSET killed %10, killed %6, 0, 0, 0, 0, 0, implicit $exec
+    S_ENDPGM
+
+...
+---
+
+# GCN-LABEL: name: v_fold_or_imm_regimm_32{{$}}
+
+# GCN: %14:vgpr_32 = V_MOV_B32_e32 1234903, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %14,
+
+# GCN: %15:vgpr_32 = V_MOV_B32_e32 1234903, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %15
+
+# GCN: %16:vgpr_32 = V_MOV_B32_e32 1234903, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %16,
 
-liveins:
+# GCN: %17:vgpr_32 = V_MOV_B32_e32 1234567, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %17,
+
+# GCN: %3:vgpr_32 = V_MOV_B32_e32 63, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %3,
+
+name:            v_fold_or_imm_regimm_32
+alignment:       0
+exposesReturnsTwice: false
+legalized:       false
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+liveins:         
   - { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
   - { reg: '$vgpr0', virtual-reg: '%3' }
-frameInfo:
-  isFrameAddressTaken: false
-  isReturnAddressTaken: false
-  hasStackMap:     false
-  hasPatchPoint:   false
-  stackSize:       0
-  offsetAdjustment: 0
-  maxAlignment:    0
-  adjustsStack:    false
-  hasCalls:        false
-  maxCallFrameSize: 0
-  hasOpaqueSPAdjustment: false
-  hasVAStart:      false
-  hasMustTailInVarArgFunc: false
 body:             |
   bb.0:
     liveins: $sgpr0_sgpr1, $vgpr0
   
-    %3 = COPY $vgpr0
-    %0 = COPY $sgpr0_sgpr1
-    %4 = S_LOAD_DWORDX2_IMM %0, 36, 0
-    %31 = V_ASHRREV_I32_e64 31, %3, implicit $exec
-    %32 = REG_SEQUENCE %3, 1, %31, 2
-    %33 = V_LSHLREV_B64 2, killed %32, implicit $exec
-    %20 = COPY %4.sub1
-    %44 = V_ADD_I32_e32 %4.sub0, %33.sub0, implicit-def $vcc, implicit $exec
-    %36 = COPY killed %20
-    %35 = V_ADDC_U32_e32 %33.sub1, %36, implicit-def $vcc, implicit $vcc, implicit $exec
-    %37 = REG_SEQUENCE %44, 1, killed %35, 2
-    %24 = V_MOV_B32_e32 982, implicit $exec
-    %26 = S_MOV_B32 1234567
-    %34 = V_MOV_B32_e32 63, implicit $exec
-
-    %27 = V_AND_B32_e64 %26, %24, implicit $exec
-    FLAT_STORE_DWORD %37, %27, 0, 0, 0, implicit $exec, implicit $flat_scr
-
-    %28 = V_AND_B32_e64 %24, %26, implicit $exec
-    FLAT_STORE_DWORD %37, %28, 0, 0, 0, implicit $exec, implicit $flat_scr
+    %3:vgpr_32 = COPY $vgpr0
+    %0:sgpr_64 = COPY $sgpr0_sgpr1
+    %4:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0
+    %13:vgpr_32 = V_ASHRREV_I32_e64 31, %3, implicit $exec
+    %14:vreg_64 = REG_SEQUENCE %3, %subreg.sub0, %13, %subreg.sub1
+    %15:vreg_64 = V_LSHLREV_B64 2, killed %14, implicit $exec
+    %5:sreg_32_xm0 = COPY %4.sub1
+    %20:vgpr_32 = V_ADD_I32_e32 %4.sub0, %15.sub0, implicit-def $vcc, implicit $exec
+    %18:vgpr_32 = COPY killed %5
+    %17:vgpr_32 = V_ADDC_U32_e32 %15.sub1, %18, implicit-def $vcc, implicit $vcc, implicit $exec
+    %19:vreg_64 = REG_SEQUENCE %20, %subreg.sub0, killed %17, %subreg.sub1
+    %6:vgpr_32 = V_MOV_B32_e32 982, implicit $exec
+    %8:sreg_32_xm0 = S_MOV_B32 1234567
+    %16:vgpr_32 = V_MOV_B32_e32 63, implicit $exec
+    %9:vgpr_32 = V_OR_B32_e64 %8, %6, implicit $exec
+    FLAT_STORE_DWORD %19, %9, 0, 0, 0, implicit $exec, implicit $flat_scr
+    %10:vgpr_32 = V_OR_B32_e64 %6, %8, implicit $exec
+    FLAT_STORE_DWORD %19, %10, 0, 0, 0, implicit $exec, implicit $flat_scr
+    %11:vgpr_32 = V_OR_B32_e32 %8, %6, implicit $exec
+    FLAT_STORE_DWORD %19, %11, 0, 0, 0, implicit $exec, implicit $flat_scr
+    %12:vgpr_32 = V_OR_B32_e64 %8, %8, implicit $exec
+    FLAT_STORE_DWORD %19, %12, 0, 0, 0, implicit $exec, implicit $flat_scr
+    %13:vgpr_32 = V_OR_B32_e64 %16, %16, implicit $exec
+    FLAT_STORE_DWORD %19, %13, 0, 0, 0, implicit $exec, implicit $flat_scr
+    S_ENDPGM
+
+...
+---
+
+# GCN-LABEL: name: s_fold_orn2_imm_regimm_32{{$}}
+# GCN: %10:vgpr_32 = V_MOV_B32_e32 -8457, implicit $exec
+# GCN: BUFFER_STORE_DWORD_OFFSET killed %10,
+name:            s_fold_orn2_imm_regimm_32
+alignment:       0
+exposesReturnsTwice: false
+legalized:       false
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+liveins:         
+  - { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
+body:             |
+  bb.0:
+    liveins: $sgpr0_sgpr1
+  
+    %0:sgpr_64 = COPY $sgpr0_sgpr1
+    %1:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0
+    %2:sreg_32_xm0 = COPY %1.sub1
+    %3:sreg_32_xm0 = COPY %1.sub0
+    %4:sreg_32_xm0 = S_MOV_B32 61440
+    %5:sreg_32_xm0 = S_MOV_B32 -1
+    %6:sreg_128 = REG_SEQUENCE killed %2, %subreg.sub0, killed %3, %subreg.sub1, killed %4, %subreg.sub2, killed %5, %subreg.sub3
+    %7:sreg_32_xm0 = S_MOV_B32 1234567
+    %8:sreg_32_xm0 = S_MOV_B32 9999
+    %9:sreg_32_xm0 = S_ORN2_B32 killed %7, killed %8, implicit-def dead $scc
+    %10:vgpr_32 = COPY %9
+    BUFFER_STORE_DWORD_OFFSET killed %10, killed %6, 0, 0, 0, 0, 0, implicit $exec
+    S_ENDPGM
+
+...
+---
+
+# GCN-LABEL: name: s_fold_nand_imm_regimm_32{{$}}
+# GCN: %10:vgpr_32 = V_MOV_B32_e32 -1544, implicit $exec
+# GCN: BUFFER_STORE_DWORD_OFFSET killed %10,
+name:            s_fold_nand_imm_regimm_32
+alignment:       0
+exposesReturnsTwice: false
+legalized:       false
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+liveins:         
+  - { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
+body:             |
+  bb.0:
+    liveins: $sgpr0_sgpr1
+  
+    %0:sgpr_64 = COPY $sgpr0_sgpr1
+    %1:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0
+    %2:sreg_32_xm0 = COPY %1.sub1
+    %3:sreg_32_xm0 = COPY %1.sub0
+    %4:sreg_32_xm0 = S_MOV_B32 61440
+    %5:sreg_32_xm0 = S_MOV_B32 -1
+    %6:sreg_128 = REG_SEQUENCE killed %2, %subreg.sub0, killed %3, %subreg.sub1, killed %4, %subreg.sub2, killed %5, %subreg.sub3
+    %7:sreg_32_xm0 = S_MOV_B32 1234567
+    %8:sreg_32_xm0 = S_MOV_B32 9999
+    %9:sreg_32_xm0 = S_NAND_B32 killed %7, killed %8, implicit-def dead $scc
+    %10:vgpr_32 = COPY %9
+    BUFFER_STORE_DWORD_OFFSET killed %10, killed %6, 0, 0, 0, 0, 0, implicit $exec
+    S_ENDPGM
+
+...
+---
+
+# GCN-LABEL: name: s_fold_nor_imm_regimm_32{{$}}
+# GCN: %10:vgpr_32 = V_MOV_B32_e32 -1243024, implicit $exec
+# GCN: BUFFER_STORE_DWORD_OFFSET killed %10,
+name:            s_fold_nor_imm_regimm_32
+alignment:       0
+exposesReturnsTwice: false
+legalized:       false
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+liveins:         
+  - { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
+body:             |
+  bb.0:
+    liveins: $sgpr0_sgpr1
   
-    %29 = V_AND_B32_e32 %26, %24, implicit $exec
-    FLAT_STORE_DWORD %37, %29, 0, 0, 0, implicit $exec, implicit $flat_scr
+    %0:sgpr_64 = COPY $sgpr0_sgpr1
+    %1:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0
+    %2:sreg_32_xm0 = COPY %1.sub1
+    %3:sreg_32_xm0 = COPY %1.sub0
+    %4:sreg_32_xm0 = S_MOV_B32 61440
+    %5:sreg_32_xm0 = S_MOV_B32 -1
+    %6:sreg_128 = REG_SEQUENCE killed %2, %subreg.sub0, killed %3, %subreg.sub1, killed %4, %subreg.sub2, killed %5, %subreg.sub3
+    %7:sreg_32_xm0 = S_MOV_B32 1234567
+    %8:sreg_32_xm0 = S_MOV_B32 9999
+    %9:sreg_32_xm0 = S_NOR_B32 killed %7, killed %8, implicit-def dead $scc
+    %10:vgpr_32 = COPY %9
+    BUFFER_STORE_DWORD_OFFSET killed %10, killed %6, 0, 0, 0, 0, 0, implicit $exec
+    S_ENDPGM
 
-    %30 = V_AND_B32_e64 %26, %26, implicit $exec
-    FLAT_STORE_DWORD %37, %30, 0, 0, 0, implicit $exec, implicit $flat_scr
+...
+---
 
-    %31 = V_AND_B32_e64 %34, %34, implicit $exec
-    FLAT_STORE_DWORD %37, %31, 0, 0, 0, implicit $exec, implicit $flat_scr
+# GCN-LABEL: name: s_fold_xnor_imm_regimm_32{{$}}
+# GCN: %10:vgpr_32 = V_MOV_B32_e32 -1241481, implicit $exec
+# GCN: BUFFER_STORE_DWORD_OFFSET killed %10,
+name:            s_fold_xnor_imm_regimm_32
+alignment:       0
+exposesReturnsTwice: false
+legalized:       false
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+liveins:         
+  - { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
+body:             |
+  bb.0:
+    liveins: $sgpr0_sgpr1
   
+    %0:sgpr_64 = COPY $sgpr0_sgpr1
+    %1:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0
+    %2:sreg_32_xm0 = COPY %1.sub1
+    %3:sreg_32_xm0 = COPY %1.sub0
+    %4:sreg_32_xm0 = S_MOV_B32 61440
+    %5:sreg_32_xm0 = S_MOV_B32 -1
+    %6:sreg_128 = REG_SEQUENCE killed %2, %subreg.sub0, killed %3, %subreg.sub1, killed %4, %subreg.sub2, killed %5, %subreg.sub3
+    %7:sreg_32_xm0 = S_MOV_B32 1234567
+    %8:sreg_32_xm0 = S_MOV_B32 9999
+    %9:sreg_32_xm0 = S_XNOR_B32 killed %7, killed %8, implicit-def dead $scc
+    %10:vgpr_32 = COPY %9
+    BUFFER_STORE_DWORD_OFFSET killed %10, killed %6, 0, 0, 0, 0, 0, implicit $exec
     S_ENDPGM
 
 ...
 ---
 
 # GCN-LABEL: name: s_fold_shl_imm_regimm_32{{$}}
-# GC1: %13 = V_MOV_B32_e32 4096, implicit $exec
-# GCN: BUFFER_STORE_DWORD_OFFSET killed %13,
+# GC1: %9 = V_MOV_B32_e32 4096, implicit $exec
+# GCN: BUFFER_STORE_DWORD_OFFSET killed %9,
 
 name:            s_fold_shl_imm_regimm_32
 alignment:       0
 exposesReturnsTwice: false
 legalized:       false
 regBankSelected: false
 selected:        false
 tracksRegLiveness: true
-registers:
-  - { id: 0, class: sgpr_64 }
-  - { id: 1, class: sreg_32_xm0 }
-  - { id: 2, class: sgpr_32 }
-  - { id: 3, class: vgpr_32 }
-  - { id: 4, class: sreg_64_xexec }
-  - { id: 5, class: sreg_32_xm0_xexec }
-  - { id: 6, class: sreg_32_xm0 }
-  - { id: 7, class: sreg_32_xm0 }
-  - { id: 8, class: sreg_32_xm0 }
-  - { id: 9, class: sreg_32_xm0 }
-  - { id: 10, class: sreg_128 }
-  - { id: 11, class: sreg_32_xm0 }
-  - { id: 12, class: sreg_32_xm0 }
-  - { id: 13, class: vgpr_32 }
-liveins:
-  - { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
-frameInfo:
-  isFrameAddressTaken: false
-  isReturnAddressTaken: false
-  hasStackMap:     false
-  hasPatchPoint:   false
-  stackSize:       0
-  offsetAdjustment: 0
-  maxAlignment:    0
-  adjustsStack:    false
-  hasCalls:        false
-  maxCallFrameSize: 0
-  hasOpaqueSPAdjustment: false
-  hasVAStart:      false
-  hasMustTailInVarArgFunc: false
+liveins:         
+  - { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
 body:             |
   bb.0:
     liveins: $sgpr0_sgpr1
   
-    %0 = COPY $sgpr0_sgpr1
-    %4 = S_LOAD_DWORDX2_IMM %0, 36, 0
-    %5 = S_MOV_B32 1
-    %6 = COPY %4.sub1
-    %7 = COPY %4.sub0
-    %8 = S_MOV_B32 61440
-    %9 = S_MOV_B32 -1
-    %10 = REG_SEQUENCE killed %7, 1, killed %6, 2, killed %9, 3, killed %8, 4
-    %12 = S_LSHL_B32 killed %5, 12, implicit-def dead $scc
-    %13 = COPY %12
+    %0:sgpr_64 = COPY $sgpr0_sgpr1
+    %4:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0
+    %5:sreg_32_xm0_xexec = S_MOV_B32 1
+    %6:sreg_32_xm0 = COPY %4.sub1
+    %7:sreg_32_xm0 = COPY %4.sub0
+    %8:sreg_32_xm0 = S_MOV_B32 61440
+    %9:sreg_32_xm0 = S_MOV_B32 -1
+    %10:sreg_128 = REG_SEQUENCE killed %7, %subreg.sub0, killed %6, %subreg.sub1, killed %9, %subreg.sub2, killed %8, %subreg.sub3
+    %12:sreg_32_xm0 = S_LSHL_B32 killed %5, 12, implicit-def dead $scc
+    %13:vgpr_32 = COPY %12
     BUFFER_STORE_DWORD_OFFSET killed %13, killed %10, 0, 0, 0, 0, 0, implicit $exec
     S_ENDPGM
 
 ...
 ---
 # GCN-LABEL: name: v_fold_shl_imm_regimm_32{{$}}
 
-# GCN: %11:vgpr_32 = V_MOV_B32_e32 40955904, implicit $exec
-# GCN: FLAT_STORE_DWORD %20, %11,
+# GCN: %16:vgpr_32 = V_MOV_B32_e32 40955904, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %16,
 
-# GCN: %12:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
-# GCN: FLAT_STORE_DWORD %20, %12,
+# GCN: %17:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %17,
 
-# GCN: %13:vgpr_32 = V_MOV_B32_e32 4096, implicit $exec
-# GCN: FLAT_STORE_DWORD %20, %13,
+# GCN: %18:vgpr_32 = V_MOV_B32_e32 4096, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %18,
 
-# GCN: %14:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
-# GCN: FLAT_STORE_DWORD %20, %14,
+# GCN: %19:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %19,
 
-# GCN: %15:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
-# GCN: FLAT_STORE_DWORD %20, %15,
+# GCN: %3:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %3,
 
-# GCN: %22:vgpr_32 = V_MOV_B32_e32 4096, implicit $exec
-# GCN: FLAT_STORE_DWORD %20, %22,
+# GCN: %20:vgpr_32 = V_MOV_B32_e32 4096, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %20,
 
-# GCN: %23:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
-# GCN: FLAT_STORE_DWORD %20, %23,
+# GCN: %21:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %21,
 
-# GCN: %25:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
-# GCN: FLAT_STORE_DWORD %20, %25,
+# GCN: %22:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %22,
 
-# GCN: %26:vgpr_32 = V_MOV_B32_e32 7927808, implicit $exec
-# GCN: FLAT_STORE_DWORD %20, %26,
+# GCN: %23:vgpr_32 = V_MOV_B32_e32 7927808, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %23,
 
-# GCN: %28:vgpr_32 = V_MOV_B32_e32 -8, implicit $exec
-# GCN: FLAT_STORE_DWORD %20, %28,
+# GCN: %24:vgpr_32 = V_MOV_B32_e32 -8, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %24,
 
 name:            v_fold_shl_imm_regimm_32
 alignment:       0
 exposesReturnsTwice: false
 legalized:       false
 regBankSelected: false
 selected:        false
 tracksRegLiveness: true
-registers:
-  - { id: 0, class: sgpr_64 }
-  - { id: 1, class: sreg_32_xm0 }
-  - { id: 2, class: vgpr_32 }
-  - { id: 3, class: sreg_64_xexec }
-  - { id: 4, class: sreg_64_xexec }
-  - { id: 5, class: sreg_32_xm0 }
-  - { id: 6, class: vgpr_32 }
-  - { id: 7, class: sreg_32_xm0 }
-  - { id: 8, class: sreg_64 }
-  - { id: 9, class: sreg_32_xm0 }
-  - { id: 10, class: vgpr_32 }
-  - { id: 11, class: vgpr_32 }
-  - { id: 12, class: vgpr_32 }
-  - { id: 13, class: vgpr_32 }
-  - { id: 14, class: vgpr_32 }
-  - { id: 15, class: vgpr_32 }
-  - { id: 16, class: vreg_64 }
-  - { id: 17, class: vreg_64 }
-  - { id: 18, class: vgpr_32 }
-  - { id: 19, class: vgpr_32 }
-  - { id: 20, class: vreg_64 }
-  - { id: 21, class: vgpr_32 }
-  - { id: 22, class: vgpr_32 }
-  - { id: 23, class: vgpr_32 }
-  - { id: 24, class: vgpr_32 }
-  - { id: 25, class: vgpr_32 }
-  - { id: 26, class: vgpr_32 }
-  - { id: 27, class: sreg_32_xm0 }
-  - { id: 28, class: vgpr_32 }
-liveins:
+liveins:         
   - { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
   - { reg: '$vgpr0', virtual-reg: '%2' }
-frameInfo:
-  isFrameAddressTaken: false
-  isReturnAddressTaken: false
-  hasStackMap:     false
-  hasPatchPoint:   false
-  stackSize:       0
-  offsetAdjustment: 0
-  maxAlignment:    0
-  adjustsStack:    false
-  hasCalls:        false
-  maxCallFrameSize: 0
-  hasOpaqueSPAdjustment: false
-  hasVAStart:      false
-  hasMustTailInVarArgFunc: false
 body:             |
   bb.0:
     liveins: $sgpr0_sgpr1, $vgpr0
   
-    %2 = COPY $vgpr0
-    %0 = COPY $sgpr0_sgpr1
-    %3 = S_LOAD_DWORDX2_IMM %0, 36, 0 :: (non-temporal dereferenceable invariant load 8 from `i64 addrspace(4)* undef`)
-    %15 = V_ASHRREV_I32_e64 31, %2, implicit $exec
-    %16 = REG_SEQUENCE %2, 1, %15, 2
-    %17 = V_LSHLREV_B64 2, killed %16, implicit $exec
-    %9 = COPY %3.sub1
-    %21 = V_ADD_I32_e32 %3.sub0, %17.sub0, implicit-def $vcc, implicit $exec
-    %19 = COPY killed %9
-    %18 = V_ADDC_U32_e32 %17.sub1, %19, implicit-def $vcc, implicit $vcc, implicit $exec
-    %20 = REG_SEQUENCE %21, 1, killed %18, 2
-    %10 = V_MOV_B32_e32 9999, implicit $exec
-    %24 = V_MOV_B32_e32 3871, implicit $exec
-    %6 = V_MOV_B32_e32 1, implicit $exec
-    %7 = S_MOV_B32 1
-    %27 = S_MOV_B32 -4
-
-    %11 = V_LSHLREV_B32_e64 12, %10, implicit $exec
+    %2:vgpr_32 = COPY $vgpr0
+    %0:sgpr_64 = COPY $sgpr0_sgpr1
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0 :: (non-temporal dereferenceable invariant load 8 from `i64 addrspace(4)* undef`, addrspace 4)
+    %15:vgpr_32 = V_ASHRREV_I32_e64 31, %2, implicit $exec
+    %16:vreg_64 = REG_SEQUENCE %2, %subreg.sub0, %15, %subreg.sub1
+    %17:vreg_64 = V_LSHLREV_B64 2, killed %16, implicit $exec
+    %9:sreg_32_xm0 = COPY %3.sub1
+    %21:vgpr_32 = V_ADD_I32_e32 %3.sub0, %17.sub0, implicit-def $vcc, implicit $exec
+    %19:vgpr_32 = COPY killed %9
+    %18:vgpr_32 = V_ADDC_U32_e32 %17.sub1, %19, implicit-def $vcc, implicit $vcc, implicit $exec
+    %20:vreg_64 = REG_SEQUENCE %21, %subreg.sub0, killed %18, %subreg.sub1
+    %10:vgpr_32 = V_MOV_B32_e32 9999, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 3871, implicit $exec
+    %6:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    %7:sreg_32_xm0 = S_MOV_B32 1
+    %27:sreg_32_xm0 = S_MOV_B32 -4
+    %11:vgpr_32 = V_LSHLREV_B32_e64 12, %10, implicit $exec
     FLAT_STORE_DWORD %20, %11, 0, 0, 0, implicit $exec, implicit $flat_scr
-
-    %12 = V_LSHLREV_B32_e64 %7, 12, implicit $exec
+    %12:vgpr_32 = V_LSHLREV_B32_e64 %7, 12, implicit $exec
     FLAT_STORE_DWORD %20, %12, 0, 0, 0, implicit $exec, implicit $flat_scr
-
-    %13 = V_LSHL_B32_e64 %7, 12, implicit $exec
+    %13:vgpr_32 = V_LSHL_B32_e64 %7, 12, implicit $exec
     FLAT_STORE_DWORD %20, %13, 0, 0, 0, implicit $exec, implicit $flat_scr
-
-    %14 = V_LSHL_B32_e64 12, %7, implicit $exec
+    %14:vgpr_32 = V_LSHL_B32_e64 12, %7, implicit $exec
     FLAT_STORE_DWORD %20, %14, 0, 0, 0, implicit $exec, implicit $flat_scr
-
-    %15 = V_LSHL_B32_e64 12, %24, implicit $exec
+    %15:vgpr_32 = V_LSHL_B32_e64 12, %24, implicit $exec
     FLAT_STORE_DWORD %20, %15, 0, 0, 0, implicit $exec, implicit $flat_scr
-
-    %22 = V_LSHL_B32_e64 %6, 12, implicit $exec
+    %22:vgpr_32 = V_LSHL_B32_e64 %6, 12, implicit $exec
     FLAT_STORE_DWORD %20, %22, 0, 0, 0, implicit $exec, implicit $flat_scr
-
-    %23 = V_LSHL_B32_e64 %6, 32, implicit $exec
+    %23:vgpr_32 = V_LSHL_B32_e64 %6, 32, implicit $exec
     FLAT_STORE_DWORD %20, %23, 0, 0, 0, implicit $exec, implicit $flat_scr
-
-    %25 = V_LSHL_B32_e32 %6, %6, implicit $exec
+    %25:vgpr_32 = V_LSHL_B32_e32 %6, %6, implicit $exec
     FLAT_STORE_DWORD %20, %25, 0, 0, 0, implicit $exec, implicit $flat_scr
-
-    %26 = V_LSHLREV_B32_e32 11, %24, implicit $exec
+    %26:vgpr_32 = V_LSHLREV_B32_e32 11, %24, implicit $exec
     FLAT_STORE_DWORD %20, %26, 0, 0, 0, implicit $exec, implicit $flat_scr
-
-    %28 = V_LSHL_B32_e32 %27, %6, implicit $exec
+    %28:vgpr_32 = V_LSHL_B32_e32 %27, %6, implicit $exec
     FLAT_STORE_DWORD %20, %28, 0, 0, 0, implicit $exec, implicit $flat_scr
-
     S_ENDPGM
 
 ...
 ---
 
 # GCN-LABEL: name: s_fold_ashr_imm_regimm_32{{$}}
-# GCN: %11:vgpr_32 = V_MOV_B32_e32 243, implicit $exec
-# GCN: BUFFER_STORE_DWORD_OFFSET killed %11, killed %8,
+# GCN: %9:vgpr_32 = V_MOV_B32_e32 243, implicit $exec
+# GCN: BUFFER_STORE_DWORD_OFFSET killed %9, killed %7,
 name:            s_fold_ashr_imm_regimm_32
 alignment:       0
 exposesReturnsTwice: false
 legalized:       false
 regBankSelected: false
 selected:        false
 tracksRegLiveness: true
-registers:
-  - { id: 0, class: sgpr_64 }
-  - { id: 1, class: sreg_32_xm0 }
-  - { id: 4, class: sreg_64_xexec }
-  - { id: 5, class: sreg_32_xm0_xexec }
-  - { id: 6, class: sreg_32_xm0 }
-  - { id: 7, class: sreg_32_xm0 }
-  - { id: 8, class: sreg_32_xm0 }
-  - { id: 9, class: sreg_32_xm0 }
-  - { id: 10, class: sreg_128 }
-  - { id: 11, class: sreg_32_xm0 }
-  - { id: 12, class: sreg_32_xm0 }
-  - { id: 13, class: vgpr_32 }
-liveins:
-  - { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
-frameInfo:
-  isFrameAddressTaken: false
-  isReturnAddressTaken: false
-  hasStackMap:     false
-  hasPatchPoint:   false
-  stackSize:       0
-  offsetAdjustment: 0
-  maxAlignment:    0
-  adjustsStack:    false
-  hasCalls:        false
-  maxCallFrameSize: 0
-  hasOpaqueSPAdjustment: false
-  hasVAStart:      false
-  hasMustTailInVarArgFunc: false
+liveins:         
+  - { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
 body:             |
   bb.0:
     liveins: $sgpr0_sgpr1
   
-    %0 = COPY $sgpr0_sgpr1
-    %4 = S_LOAD_DWORDX2_IMM %0, 36, 0
-    %5 = S_MOV_B32 999123
-    %6 = COPY %4.sub1
-    %7 = COPY %4.sub0
-    %8 = S_MOV_B32 61440
-    %9 = S_MOV_B32 -1
-    %10 = REG_SEQUENCE killed %7, 1, killed %6, 2, killed %9, 3, killed %8, 4
-    %12 = S_ASHR_I32 killed %5, 12, implicit-def dead $scc
-    %13 = COPY %12
-    BUFFER_STORE_DWORD_OFFSET killed %13, killed %10, 0, 0, 0, 0, 0, implicit $exec
+    %0:sgpr_64 = COPY $sgpr0_sgpr1
+    %2:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0
+    %3:sreg_32_xm0_xexec = S_MOV_B32 999123
+    %4:sreg_32_xm0 = COPY %2.sub1
+    %5:sreg_32_xm0 = COPY %2.sub0
+    %6:sreg_32_xm0 = S_MOV_B32 61440
+    %7:sreg_32_xm0 = S_MOV_B32 -1
+    %8:sreg_128 = REG_SEQUENCE killed %5, %subreg.sub0, killed %4, %subreg.sub1, killed %7, %subreg.sub2, killed %6, %subreg.sub3
+    %10:sreg_32_xm0 = S_ASHR_I32 killed %3, 12, implicit-def dead $scc
+    %11:vgpr_32 = COPY %10
+    BUFFER_STORE_DWORD_OFFSET killed %11, killed %8, 0, 0, 0, 0, 0, implicit $exec
     S_ENDPGM
 
 ...
 
 # GCN-LABEL: name: v_fold_ashr_imm_regimm_32{{$}}
-# GCN: %11:vgpr_32 = V_MOV_B32_e32 3903258, implicit $exec
-# GCN: FLAT_STORE_DWORD %20, %11,
+# GCN: %21:vgpr_32 = V_MOV_B32_e32 3903258, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %21,
 
-# GCN: %12:vgpr_32 = V_MOV_B32_e32 62452139, implicit $exec
-# GCN: FLAT_STORE_DWORD %20, %12,
+# GCN: %22:vgpr_32 = V_MOV_B32_e32 62452139, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %22,
 
-# GCN: %13:vgpr_32 = V_MOV_B32_e32 1678031, implicit $exec
-# GCN: FLAT_STORE_DWORD %20, %13,
+# GCN: %23:vgpr_32 = V_MOV_B32_e32 1678031, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %23,
 
-# GCN: %14:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
-# GCN: FLAT_STORE_DWORD %20, %14,
+# GCN: %24:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %24,
 
-# GCN: %15:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
-# GCN: FLAT_STORE_DWORD %20, %15,
+# GCN: %3:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %3,
 
-# GCN: %22:vgpr_32 = V_MOV_B32_e32 62500, implicit $exec
-# GCN: FLAT_STORE_DWORD %20, %22,
+# GCN: %25:vgpr_32 = V_MOV_B32_e32 62500, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %25,
 
-# GCN: %23:vgpr_32 = V_MOV_B32_e32 500000, implicit $exec
-# GCN: FLAT_STORE_DWORD %20, %23,
+# GCN: %26:vgpr_32 = V_MOV_B32_e32 500000, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %26,
 
-# GCN: %25:vgpr_32 = V_MOV_B32_e32 1920, implicit $exec
-# GCN: FLAT_STORE_DWORD %20, %25,
+# GCN: %27:vgpr_32 = V_MOV_B32_e32 1920, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %27,
 
-# GCN: %26:vgpr_32 = V_MOV_B32_e32 487907, implicit $exec
-# GCN: FLAT_STORE_DWORD %20, %26,
+# GCN: %28:vgpr_32 = V_MOV_B32_e32 487907, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %28,
 
-# GCN: %28:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
-# GCN: FLAT_STORE_DWORD %20, %28,
+# GCN: %29:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %29,
 
 name:            v_fold_ashr_imm_regimm_32
 alignment:       0
 exposesReturnsTwice: false
 legalized:       false
 regBankSelected: false
 selected:        false
 tracksRegLiveness: true
-registers:
-  - { id: 0, class: sgpr_64 }
-  - { id: 1, class: sreg_32_xm0 }
-  - { id: 2, class: vgpr_32 }
-  - { id: 3, class: sreg_64_xexec }
-  - { id: 4, class: sreg_64_xexec }
-  - { id: 5, class: sreg_32_xm0 }
-  - { id: 6, class: vgpr_32 }
-  - { id: 7, class: sreg_32_xm0 }
-  - { id: 8, class: sreg_32_xm0 }
-  - { id: 9, class: sreg_32_xm0 }
-  - { id: 10, class: vgpr_32 }
-  - { id: 11, class: vgpr_32 }
-  - { id: 12, class: vgpr_32 }
-  - { id: 13, class: vgpr_32 }
-  - { id: 14, class: vgpr_32 }
-  - { id: 15, class: vgpr_32 }
-  - { id: 16, class: vreg_64 }
-  - { id: 17, class: vreg_64 }
-  - { id: 18, class: vgpr_32 }
-  - { id: 19, class: vgpr_32 }
-  - { id: 20, class: vreg_64 }
-  - { id: 21, class: vgpr_32 }
-  - { id: 22, class: vgpr_32 }
-  - { id: 23, class: vgpr_32 }
-  - { id: 24, class: vgpr_32 }
-  - { id: 25, class: vgpr_32 }
-  - { id: 26, class: vgpr_32 }
-  - { id: 27, class: sreg_32_xm0 }
-  - { id: 28, class: vgpr_32 }
-  - { id: 32, class: sreg_32_xm0 }
-  - { id: 33, class: sreg_32_xm0 }
-  - { id: 34, class: vgpr_32 }
-  - { id: 35, class: vgpr_32 }
-liveins:
+liveins:         
   - { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
   - { reg: '$vgpr0', virtual-reg: '%2' }
-frameInfo:
-  isFrameAddressTaken: false
-  isReturnAddressTaken: false
-  hasStackMap:     false
-  hasPatchPoint:   false
-  stackSize:       0
-  offsetAdjustment: 0
-  maxAlignment:    0
-  adjustsStack:    false
-  hasCalls:        false
-  maxCallFrameSize: 0
-  hasOpaqueSPAdjustment: false
-  hasVAStart:      false
-  hasMustTailInVarArgFunc: false
 body:             |
   bb.0:
     liveins: $sgpr0_sgpr1, $vgpr0
   
-    %2 = COPY $vgpr0
-    %0 = COPY $sgpr0_sgpr1
-    %3 = S_LOAD_DWORDX2_IMM %0, 36, 0
-    %15 = V_ASHRREV_I32_e64 31, %2, implicit $exec
-    %16 = REG_SEQUENCE %2, 1, %15, 2
-    %17 = V_LSHLREV_B64 2, killed %16, implicit $exec
-    %9 = COPY %3.sub1
-    %21 = V_ADD_I32_e32 %3.sub0, %17.sub0, implicit-def $vcc, implicit $exec
-    %19 = COPY killed %9
-    %18 = V_ADDC_U32_e32 %17.sub1, %19, implicit-def $vcc, implicit $vcc, implicit $exec
-    %20 = REG_SEQUENCE %21, 1, killed %18, 2
-    %10 = V_MOV_B32_e32 999234234, implicit $exec
-    %24 = V_MOV_B32_e32 3871, implicit $exec
-    %6 = V_MOV_B32_e32 1000000, implicit $exec
-    %7 = S_MOV_B32 13424252
-    %8 = S_MOV_B32 4
-    %27 = S_MOV_B32 -4
-    %32 = S_MOV_B32 1
-    %33 = S_MOV_B32 3841
-    %34 = V_MOV_B32_e32 3841, implicit $exec
-    %35 = V_MOV_B32_e32 2, implicit $exec
-
-    %11 = V_ASHRREV_I32_e64 8, %10, implicit $exec
+    %2:vgpr_32 = COPY $vgpr0
+    %0:sgpr_64 = COPY $sgpr0_sgpr1
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0
+    %15:vgpr_32 = V_ASHRREV_I32_e64 31, %2, implicit $exec
+    %16:vreg_64 = REG_SEQUENCE %2, %subreg.sub0, %15, %subreg.sub1
+    %17:vreg_64 = V_LSHLREV_B64 2, killed %16, implicit $exec
+    %9:sreg_32_xm0 = COPY %3.sub1
+    %21:vgpr_32 = V_ADD_I32_e32 %3.sub0, %17.sub0, implicit-def $vcc, implicit $exec
+    %19:vgpr_32 = COPY killed %9
+    %18:vgpr_32 = V_ADDC_U32_e32 %17.sub1, %19, implicit-def $vcc, implicit $vcc, implicit $exec
+    %20:vreg_64 = REG_SEQUENCE %21, %subreg.sub0, killed %18, %subreg.sub1
+    %10:vgpr_32 = V_MOV_B32_e32 999234234, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 3871, implicit $exec
+    %6:vgpr_32 = V_MOV_B32_e32 1000000, implicit $exec
+    %7:sreg_32_xm0 = S_MOV_B32 13424252
+    %8:sreg_32_xm0 = S_MOV_B32 4
+    %27:sreg_32_xm0 = S_MOV_B32 -4
+    %29:sreg_32_xm0 = S_MOV_B32 1
+    %30:sreg_32_xm0 = S_MOV_B32 3841
+    %31:vgpr_32 = V_MOV_B32_e32 3841, implicit $exec
+    %32:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %11:vgpr_32 = V_ASHRREV_I32_e64 8, %10, implicit $exec
     FLAT_STORE_DWORD %20, %11, 0, 0, 0, implicit $exec, implicit $flat_scr
-
-    %12 = V_ASHRREV_I32_e64 %8, %10, implicit $exec
+    %12:vgpr_32 = V_ASHRREV_I32_e64 %8, %10, implicit $exec
     FLAT_STORE_DWORD %20, %12, 0, 0, 0, implicit $exec, implicit $flat_scr
-
-    %13 = V_ASHR_I32_e64 %7, 3, implicit $exec
+    %13:vgpr_32 = V_ASHR_I32_e64 %7, 3, implicit $exec
     FLAT_STORE_DWORD %20, %13, 0, 0, 0, implicit $exec, implicit $flat_scr
-
-    %14 = V_ASHR_I32_e64 7, %32, implicit $exec
+    %14:vgpr_32 = V_ASHR_I32_e64 7, %29, implicit $exec
     FLAT_STORE_DWORD %20, %14, 0, 0, 0, implicit $exec, implicit $flat_scr
-
-    %15 = V_ASHR_I32_e64 %27, %24, implicit $exec
+    %15:vgpr_32 = V_ASHR_I32_e64 %27, %24, implicit $exec
     FLAT_STORE_DWORD %20, %15, 0, 0, 0, implicit $exec, implicit $flat_scr
-
-    %22 = V_ASHR_I32_e64 %6, 4, implicit $exec
+    %22:vgpr_32 = V_ASHR_I32_e64 %6, 4, implicit $exec
     FLAT_STORE_DWORD %20, %22, 0, 0, 0, implicit $exec, implicit $flat_scr
-
-    %23 = V_ASHR_I32_e64 %6, %33, implicit $exec
+    %23:vgpr_32 = V_ASHR_I32_e64 %6, %30, implicit $exec
     FLAT_STORE_DWORD %20, %23, 0, 0, 0, implicit $exec, implicit $flat_scr
-
-    %25 = V_ASHR_I32_e32 %34, %34, implicit $exec
+    %25:vgpr_32 = V_ASHR_I32_e32 %31, %31, implicit $exec
     FLAT_STORE_DWORD %20, %25, 0, 0, 0, implicit $exec, implicit $flat_scr
-
-    %26 = V_ASHRREV_I32_e32 11, %10, implicit $exec
+    %26:vgpr_32 = V_ASHRREV_I32_e32 11, %10, implicit $exec
     FLAT_STORE_DWORD %20, %26, 0, 0, 0, implicit $exec, implicit $flat_scr
-
-    %28 = V_ASHR_I32_e32 %27, %35, implicit $exec
+    %28:vgpr_32 = V_ASHR_I32_e32 %27, %32, implicit $exec
     FLAT_STORE_DWORD %20, %28, 0, 0, 0, implicit $exec, implicit $flat_scr
-
     S_ENDPGM
 
 ...
 ---
 
 # GCN-LABEL: name: s_fold_lshr_imm_regimm_32{{$}}
-# GCN: %11:vgpr_32 = V_MOV_B32_e32 1048332, implicit $exec
-# GCN: BUFFER_STORE_DWORD_OFFSET killed %11, killed %8,
+# GCN: %9:vgpr_32 = V_MOV_B32_e32 1048332, implicit $exec
+# GCN: BUFFER_STORE_DWORD_OFFSET killed %9, killed %7,
 name:            s_fold_lshr_imm_regimm_32
 alignment:       0
 exposesReturnsTwice: false
 legalized:       false
 regBankSelected: false
 selected:        false
 tracksRegLiveness: true
-registers:
-  - { id: 0, class: sgpr_64 }
-  - { id: 1, class: sreg_32_xm0 }
-  - { id: 4, class: sreg_64_xexec }
-  - { id: 5, class: sreg_32_xm0_xexec }
-  - { id: 6, class: sreg_32_xm0 }
-  - { id: 7, class: sreg_32_xm0 }
-  - { id: 8, class: sreg_32_xm0 }
-  - { id: 9, class: sreg_32_xm0 }
-  - { id: 10, class: sreg_128 }
-  - { id: 11, class: sreg_32_xm0 }
-  - { id: 12, class: sreg_32_xm0 }
-  - { id: 13, class: vgpr_32 }
-liveins:
-  - { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
-frameInfo:
-  isFrameAddressTaken: false
-  isReturnAddressTaken: false
-  hasStackMap:     false
-  hasPatchPoint:   false
-  stackSize:       0
-  offsetAdjustment: 0
-  maxAlignment:    0
-  adjustsStack:    false
-  hasCalls:        false
-  maxCallFrameSize: 0
-  hasOpaqueSPAdjustment: false
-  hasVAStart:      false
-  hasMustTailInVarArgFunc: false
+liveins:         
+  - { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
 body:             |
   bb.0:
     liveins: $sgpr0_sgpr1
   
-    %0 = COPY $sgpr0_sgpr1
-    %4 = S_LOAD_DWORDX2_IMM %0, 36, 0
-    %5 = S_MOV_B32 -999123
-    %6 = COPY %4.sub1
-    %7 = COPY %4.sub0
-    %8 = S_MOV_B32 61440
-    %9 = S_MOV_B32 -1
-    %10 = REG_SEQUENCE killed %7, 1, killed %6, 2, killed %9, 3, killed %8, 4
-    %12 = S_LSHR_B32 killed %5, 12, implicit-def dead $scc
-    %13 = COPY %12
-    BUFFER_STORE_DWORD_OFFSET killed %13, killed %10, 0, 0, 0, 0, 0, implicit $exec
+    %0:sgpr_64 = COPY $sgpr0_sgpr1
+    %2:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0
+    %3:sreg_32_xm0_xexec = S_MOV_B32 -999123
+    %4:sreg_32_xm0 = COPY %2.sub1
+    %5:sreg_32_xm0 = COPY %2.sub0
+    %6:sreg_32_xm0 = S_MOV_B32 61440
+    %7:sreg_32_xm0 = S_MOV_B32 -1
+    %8:sreg_128 = REG_SEQUENCE killed %5, %subreg.sub0, killed %4, %subreg.sub1, killed %7, %subreg.sub2, killed %6, %subreg.sub3
+    %10:sreg_32_xm0 = S_LSHR_B32 killed %3, 12, implicit-def dead $scc
+    %11:vgpr_32 = COPY %10
+    BUFFER_STORE_DWORD_OFFSET killed %11, killed %8, 0, 0, 0, 0, 0, implicit $exec
     S_ENDPGM
 
 ...
 ---
 
 # GCN-LABEL: name: v_fold_lshr_imm_regimm_32{{$}}
-# GCN: %11:vgpr_32 = V_MOV_B32_e32 3903258, implicit $exec
-# GCN: FLAT_STORE_DWORD %20, %11,
+# GCN: %21:vgpr_32 = V_MOV_B32_e32 3903258, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %21,
 
-# GCN: %12:vgpr_32 = V_MOV_B32_e32 62452139, implicit $exec
-# GCN: FLAT_STORE_DWORD %20, %12,
+# GCN: %22:vgpr_32 = V_MOV_B32_e32 62452139, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %22,
 
-# GCN: %13:vgpr_32 = V_MOV_B32_e32 1678031, implicit $exec
-# GCN: FLAT_STORE_DWORD %20, %13,
+# GCN: %23:vgpr_32 = V_MOV_B32_e32 1678031, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %23,
 
-# GCN: %14:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
-# GCN: FLAT_STORE_DWORD %20, %14,
+# GCN: %24:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %24,
 
-# GCN: %15:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
-# GCN: FLAT_STORE_DWORD %20, %15,
+# GCN: %3:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %3,
 
-# GCN: %22:vgpr_32 = V_MOV_B32_e32 62500, implicit $exec
-# GCN: FLAT_STORE_DWORD %20, %22,
+# GCN: %25:vgpr_32 = V_MOV_B32_e32 62500, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %25,
 
-# GCN: %23:vgpr_32 = V_MOV_B32_e32 500000, implicit $exec
-# GCN: FLAT_STORE_DWORD %20, %23,
+# GCN: %26:vgpr_32 = V_MOV_B32_e32 500000, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %26,
 
-# GCN: %25:vgpr_32 = V_MOV_B32_e32 1920, implicit $exec
-# GCN: FLAT_STORE_DWORD %20, %25,
+# GCN: %27:vgpr_32 = V_MOV_B32_e32 1920, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %27,
 
-# GCN: %26:vgpr_32 = V_MOV_B32_e32 487907, implicit $exec
-# GCN: FLAT_STORE_DWORD %20, %26,
+# GCN: %28:vgpr_32 = V_MOV_B32_e32 487907, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %28,
 
-# GCN: %28:vgpr_32 = V_MOV_B32_e32 1073741823, implicit $exec
-# GCN: FLAT_STORE_DWORD %20, %28,
+# GCN: %29:vgpr_32 = V_MOV_B32_e32 1073741823, implicit $exec
+# GCN: FLAT_STORE_DWORD %10, %29,
 
 name:            v_fold_lshr_imm_regimm_32
 alignment:       0
 exposesReturnsTwice: false
 legalized:       false
 regBankSelected: false
 selected:        false
 tracksRegLiveness: true
-registers:
-  - { id: 0, class: sgpr_64 }
-  - { id: 1, class: sreg_32_xm0 }
-  - { id: 2, class: vgpr_32 }
-  - { id: 3, class: sreg_64_xexec }
-  - { id: 4, class: sreg_64_xexec }
-  - { id: 5, class: sreg_32_xm0 }
-  - { id: 6, class: vgpr_32 }
-  - { id: 7, class: sreg_32_xm0 }
-  - { id: 8, class: sreg_32_xm0 }
-  - { id: 9, class: sreg_32_xm0 }
-  - { id: 10, class: vgpr_32 }
-  - { id: 11, class: vgpr_32 }
-  - { id: 12, class: vgpr_32 }
-  - { id: 13, class: vgpr_32 }
-  - { id: 14, class: vgpr_32 }
-  - { id: 15, class: vgpr_32 }
-  - { id: 16, class: vreg_64 }
-  - { id: 17, class: vreg_64 }
-  - { id: 18, class: vgpr_32 }
-  - { id: 19, class: vgpr_32 }
-  - { id: 20, class: vreg_64 }
-  - { id: 21, class: vgpr_32 }
-  - { id: 22, class: vgpr_32 }
-  - { id: 23, class: vgpr_32 }
-  - { id: 24, class: vgpr_32 }
-  - { id: 25, class: vgpr_32 }
-  - { id: 26, class: vgpr_32 }
-  - { id: 27, class: sreg_32_xm0 }
-  - { id: 28, class: vgpr_32 }
-  - { id: 32, class: sreg_32_xm0 }
-  - { id: 33, class: sreg_32_xm0 }
-  - { id: 34, class: vgpr_32 }
-  - { id: 35, class: vgpr_32 }
-liveins:
+liveins:         
   - { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
   - { reg: '$vgpr0', virtual-reg: '%2' }
-frameInfo:
-  isFrameAddressTaken: false
-  isReturnAddressTaken: false
-  hasStackMap:     false
-  hasPatchPoint:   false
-  stackSize:       0
-  offsetAdjustment: 0
-  maxAlignment:    0
-  adjustsStack:    false
-  hasCalls:        false
-  maxCallFrameSize: 0
-  hasOpaqueSPAdjustment: false
-  hasVAStart:      false
-  hasMustTailInVarArgFunc: false
 body:             |
   bb.0:
     liveins: $sgpr0_sgpr1, $vgpr0
   
-    %2 = COPY $vgpr0
-    %0 = COPY $sgpr0_sgpr1
-    %3 = S_LOAD_DWORDX2_IMM %0, 36, 0
-    %15 = V_ASHRREV_I32_e64 31, %2, implicit $exec
-    %16 = REG_SEQUENCE %2, 1, %15, 2
-    %17 = V_LSHLREV_B64 2, killed %16, implicit $exec
-    %9 = COPY %3.sub1
-    %21 = V_ADD_I32_e32 %3.sub0, %17.sub0, implicit-def $vcc, implicit $exec
-    %19 = COPY killed %9
-    %18 = V_ADDC_U32_e32 %17.sub1, %19, implicit-def $vcc, implicit $vcc, implicit $exec
-    %20 = REG_SEQUENCE %21, 1, killed %18, 2
-    %10 = V_MOV_B32_e32 999234234, implicit $exec
-    %24 = V_MOV_B32_e32 3871, implicit $exec
-    %6 = V_MOV_B32_e32 1000000, implicit $exec
-    %7 = S_MOV_B32 13424252
-    %8 = S_MOV_B32 4
-    %27 = S_MOV_B32 -4
-    %32 = S_MOV_B32 1
-    %33 = S_MOV_B32 3841
-    %34 = V_MOV_B32_e32 3841, implicit $exec
-    %35 = V_MOV_B32_e32 2, implicit $exec
-
-    %11 = V_LSHRREV_B32_e64 8, %10, implicit $exec
+    %2:vgpr_32 = COPY $vgpr0
+    %0:sgpr_64 = COPY $sgpr0_sgpr1
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0
+    %15:vgpr_32 = V_ASHRREV_I32_e64 31, %2, implicit $exec
+    %16:vreg_64 = REG_SEQUENCE %2, %subreg.sub0, %15, %subreg.sub1
+    %17:vreg_64 = V_LSHLREV_B64 2, killed %16, implicit $exec
+    %9:sreg_32_xm0 = COPY %3.sub1
+    %21:vgpr_32 = V_ADD_I32_e32 %3.sub0, %17.sub0, implicit-def $vcc, implicit $exec
+    %19:vgpr_32 = COPY killed %9
+    %18:vgpr_32 = V_ADDC_U32_e32 %17.sub1, %19, implicit-def $vcc, implicit $vcc, implicit $exec
+    %20:vreg_64 = REG_SEQUENCE %21, %subreg.sub0, killed %18, %subreg.sub1
+    %10:vgpr_32 = V_MOV_B32_e32 999234234, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 3871, implicit $exec
+    %6:vgpr_32 = V_MOV_B32_e32 1000000, implicit $exec
+    %7:sreg_32_xm0 = S_MOV_B32 13424252
+    %8:sreg_32_xm0 = S_MOV_B32 4
+    %27:sreg_32_xm0 = S_MOV_B32 -4
+    %29:sreg_32_xm0 = S_MOV_B32 1
+    %30:sreg_32_xm0 = S_MOV_B32 3841
+    %31:vgpr_32 = V_MOV_B32_e32 3841, implicit $exec
+    %32:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %11:vgpr_32 = V_LSHRREV_B32_e64 8, %10, implicit $exec
     FLAT_STORE_DWORD %20, %11, 0, 0, 0, implicit $exec, implicit $flat_scr
-
-    %12 = V_LSHRREV_B32_e64 %8, %10, implicit $exec
+    %12:vgpr_32 = V_LSHRREV_B32_e64 %8, %10, implicit $exec
     FLAT_STORE_DWORD %20, %12, 0, 0, 0, implicit $exec, implicit $flat_scr
-
-    %13 = V_LSHR_B32_e64 %7, 3, implicit $exec
+    %13:vgpr_32 = V_LSHR_B32_e64 %7, 3, implicit $exec
     FLAT_STORE_DWORD %20, %13, 0, 0, 0, implicit $exec, implicit $flat_scr
-
-    %14 = V_LSHR_B32_e64 7, %32, implicit $exec
+    %14:vgpr_32 = V_LSHR_B32_e64 7, %29, implicit $exec
     FLAT_STORE_DWORD %20, %14, 0, 0, 0, implicit $exec, implicit $flat_scr
-
-    %15 = V_LSHR_B32_e64 %27, %24, implicit $exec
+    %15:vgpr_32 = V_LSHR_B32_e64 %27, %24, implicit $exec
     FLAT_STORE_DWORD %20, %15, 0, 0, 0, implicit $exec, implicit $flat_scr
-
-    %22 = V_LSHR_B32_e64 %6, 4, implicit $exec
+    %22:vgpr_32 = V_LSHR_B32_e64 %6, 4, implicit $exec
     FLAT_STORE_DWORD %20, %22, 0, 0, 0, implicit $exec, implicit $flat_scr
-
-    %23 = V_LSHR_B32_e64 %6, %33, implicit $exec
+    %23:vgpr_32 = V_LSHR_B32_e64 %6, %30, implicit $exec
     FLAT_STORE_DWORD %20, %23, 0, 0, 0, implicit $exec, implicit $flat_scr
-
-    %25 = V_LSHR_B32_e32 %34, %34, implicit $exec
+    %25:vgpr_32 = V_LSHR_B32_e32 %31, %31, implicit $exec
     FLAT_STORE_DWORD %20, %25, 0, 0, 0, implicit $exec, implicit $flat_scr
-
-    %26 = V_LSHRREV_B32_e32 11, %10, implicit $exec
+    %26:vgpr_32 = V_LSHRREV_B32_e32 11, %10, implicit $exec
     FLAT_STORE_DWORD %20, %26, 0, 0, 0, implicit $exec, implicit $flat_scr
-
-    %28 = V_LSHR_B32_e32 %27, %35, implicit $exec
+    %28:vgpr_32 = V_LSHR_B32_e32 %27, %32, implicit $exec
     FLAT_STORE_DWORD %20, %28, 0, 0, 0, implicit $exec, implicit $flat_scr
-
     S_ENDPGM
 
 ...
 ---
 # There is only an undef use operand for %1, so there is no
 # corresponding defining instruction
 
 # GCN-LABEL: name: undefined_vreg_operand{{$}}
 # GCN: bb.0
-# GCN-NEXT: FLAT_STORE_DWORD undef %3:vreg_64, undef %1:vgpr_32,
+# GCN-NEXT: FLAT_STORE_DWORD undef %3:vreg_64, undef %2:vgpr_32,
 # GCN-NEXT: S_ENDPGM
-name: undefined_vreg_operand
+name:            undefined_vreg_operand
+alignment:       0
+exposesReturnsTwice: false
+legalized:       false
+regBankSelected: false
+selected:        false
 tracksRegLiveness: true
-registers:
-  - { id: 0, class: vgpr_32, preferred-register: '' }
-  - { id: 1, class: vgpr_32, preferred-register: '' }
-  - { id: 2, class: vgpr_32, preferred-register: '' }
-  - { id: 3, class: vreg_64, preferred-register: '' }
 body:             |
   bb.0:
-    %0 = V_MOV_B32_e32 0, implicit $exec
-    %2 = V_XOR_B32_e64 killed %0, undef %1, implicit $exec
-    FLAT_STORE_DWORD undef %3, %2, 0, 0, 0, implicit $exec, implicit $flat_scr
+    %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %2:vgpr_32 = V_XOR_B32_e64 killed %0, undef %1:vgpr_32, implicit $exec
+    FLAT_STORE_DWORD undef %3:vreg_64, %2, 0, 0, 0, implicit $exec, implicit $flat_scr
     S_ENDPGM
 
 ...
 ---
 # Make sure there is no crash if one of the operands is a physical register
 # GCN-LABEL: name: constant_fold_physreg_op{{$}}
 # GCN: %3:sreg_64 = S_AND_B64 $exec, 0, implicit-def dead $scc
 
 name: constant_fold_physreg_op
 tracksRegLiveness: true
 body:             |
   bb.0:
-    successors: %bb.1, %bb.3
+    successors: %bb.1(0x40000000), %bb.2(0x40000000)
     liveins: $vgpr0, $sgpr4_sgpr5
   
-    %19:sreg_64 = IMPLICIT_DEF
-    %0:sreg_64 = SI_IF killed %19, %bb.3, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
+    %0:sreg_64 = IMPLICIT_DEF
+    %1:sreg_64 = SI_IF killed %0, %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
     S_BRANCH %bb.1
   
   bb.1:
-    %6:sreg_64 = S_MOV_B64 0
-    %7:sreg_64 = S_AND_B64 $exec, killed %6, implicit-def dead $scc
-    $vcc = COPY %7
+    successors: %bb.2(0x80000000)
   
-  bb.3:
+    %2:sreg_64 = S_MOV_B64 0
+    %3:sreg_64 = S_AND_B64 $exec, killed %2, implicit-def dead $scc
+    $vcc = COPY %3
+  
+  bb.2:
     liveins: $vcc
-    SI_END_CF %0, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
+  
+    SI_END_CF %1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
     S_ENDPGM implicit $vcc
 
 ...
 ---
 # GCN-LABEL: name: constant_fold_lshl_or_reg0_immreg_reg{{$}}
 # GCN: %2:vgpr_32 = COPY $vgpr0, implicit $exec
 # GCN-NEXT: S_ENDPGM implicit %2
 
-name: constant_fold_lshl_or_reg0_immreg_reg
+name:            constant_fold_lshl_or_reg0_immreg_reg
 alignment:       0
 exposesReturnsTwice: false
 legalized:       false
 regBankSelected: false
 selected:        false
 tracksRegLiveness: true
 
 body:             |
   bb.0:
     liveins: $vgpr0
   
     %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
     %1:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
-  %2:vgpr_32 = V_LSHL_OR_B32 %0,%1, $vgpr0, implicit $exec
+    %2:vgpr_32 = V_LSHL_OR_B32 %0, %1, $vgpr0, implicit $exec
     S_ENDPGM implicit %2
 
 ...
 
 ---
 
 # GCN-LABEL: name: constant_fold_lshl_or_reg0_immreg_imm{{$}}
 # GCN: %2:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
 # GCN-NEXT: S_ENDPGM implicit %2
 
-name: constant_fold_lshl_or_reg0_immreg_imm
+name:            constant_fold_lshl_or_reg0_immreg_imm
 alignment:       0
 exposesReturnsTwice: false
 legalized:       false
 regBankSelected: false
 selected:        false
 tracksRegLiveness: true
 
 body:             |
   bb.0:
 
     %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
     %1:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
     %2:vgpr_32 = V_LSHL_OR_B32 %0, %1, 10, implicit $exec
     S_ENDPGM implicit %2
 
 ...
 
 ---
 
 # GCN-LABEL: name: constant_fold_lshl_or_reg0_immreg_immreg{{$}}
 # GCN: %3:vgpr_32 = V_MOV_B32_e32 12345, implicit $exec, implicit $exec
 # GCN-NEXT: S_ENDPGM implicit %3
 
-name: constant_fold_lshl_or_reg0_immreg_immreg
+name:            constant_fold_lshl_or_reg0_immreg_immreg
 alignment:       0
 exposesReturnsTwice: false
 legalized:       false
 regBankSelected: false
 selected:        false
 tracksRegLiveness: true
 
 body:             |
   bb.0:
 
     %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
     %1:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
     %2:vgpr_32 = V_MOV_B32_e32 12345, implicit $exec
     %3:vgpr_32 = V_LSHL_OR_B32 %0, %1, %2, implicit $exec
     S_ENDPGM implicit %3
 
 ...
+
+---
+# GCN-LABEL: name: constant_fold_lshl_add_reg0_immreg_reg{{$}}
+# GCN: %2:vgpr_32 = COPY $vgpr0, implicit $exec
+# GCN-NEXT: S_ENDPGM implicit %2
+
+name:            constant_fold_lshl_add_reg0_immreg_reg
+alignment:       0
+exposesReturnsTwice: false
+legalized:       false
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+
+body:             |
+  bb.0:
+    liveins: $vgpr0
+  
+    %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %1:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %2:vgpr_32 = V_LSHL_ADD_U32 %0, %1, $vgpr0, implicit $exec
+    S_ENDPGM implicit %2
+
+...
+
+---
+
+# GCN-LABEL: name: constant_fold_lshl_add_reg0_immreg_imm{{$}}
+# GCN: %2:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+# GCN-NEXT: S_ENDPGM implicit %2
+
+name:            constant_fold_lshl_add_reg0_immreg_imm
+alignment:       0
+exposesReturnsTwice: false
+legalized:       false
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+
+body:             |
+  bb.0:
+
+    %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %1:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %2:vgpr_32 = V_LSHL_ADD_U32 %0, %1, 10, implicit $exec
+    S_ENDPGM implicit %2
+
+...
+
+---
+
+# GCN-LABEL: name: constant_fold_lshl_add_reg0_immreg_immreg{{$}}
+# GCN: %3:vgpr_32 = V_MOV_B32_e32 12345, implicit $exec, implicit $exec
+# GCN-NEXT: S_ENDPGM implicit %3
+
+name:            constant_fold_lshl_add_reg0_immreg_immreg
+alignment:       0
+exposesReturnsTwice: false
+legalized:       false
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+
+body:             |
+  bb.0:
+
+    %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %1:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %2:vgpr_32 = V_MOV_B32_e32 12345, implicit $exec
+    %3:vgpr_32 = V_LSHL_ADD_U32 %0, %1, %2, implicit $exec
+    S_ENDPGM implicit %3
+
+...
+
+---
+# GCN-LABEL: name: constant_fold_and_or_reg0_immreg_reg{{$}}
+# GCN: %2:vgpr_32 = COPY $vgpr0, implicit $exec
+# GCN-NEXT: S_ENDPGM implicit %2
+
+name:            constant_fold_and_or_reg0_immreg_reg
+alignment:       0
+exposesReturnsTwice: false
+legalized:       false
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+
+body:             |
+  bb.0:
+    liveins: $vgpr0
+  
+    %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %1:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %2:vgpr_32 = V_AND_OR_B32 %0, %1, $vgpr0, implicit $exec
+    S_ENDPGM implicit %2
+
+...
+
+---
+
+# GCN-LABEL: name: constant_fold_and_or_reg0_immreg_imm{{$}}
+# GCN: %2:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+# GCN-NEXT: S_ENDPGM implicit %2
+
+name:            constant_fold_and_or_reg0_immreg_imm
+alignment:       0
+exposesReturnsTwice: false
+legalized:       false
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+
+body:             |
+  bb.0:
+
+    %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %1:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %2:vgpr_32 = V_AND_OR_B32 %0, %1, 10, implicit $exec
+    S_ENDPGM implicit %2
+
+...
+
+---
+
+# GCN-LABEL: name: constant_fold_and_or_reg0_immreg_immreg{{$}}
+# GCN: %3:vgpr_32 = V_MOV_B32_e32 12345, implicit $exec, implicit $exec
+# GCN-NEXT: S_ENDPGM implicit %3
+
+name:            constant_fold_and_or_reg0_immreg_immreg
+alignment:       0
+exposesReturnsTwice: false
+legalized:       false
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+
+body:             |
+  bb.0:
+
+    %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %1:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %2:vgpr_32 = V_MOV_B32_e32 12345, implicit $exec
+    %3:vgpr_32 = V_AND_OR_B32 %0, %1, %2, implicit $exec
+    S_ENDPGM implicit %3
+
+...