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Differential D52512

[WebAssembly] Restore proposed SIMD conversion names
ClosedPublic

Authored by tlively on Sep 25 2018, 11:10 AM.

Details

Reviewers
aheejin
dschuff
aardappel
Commits
rG6f77811a211e: [WebAssembly] Restore slashes in SIMD conversion names
rL343558: [WebAssembly] Restore slashes in SIMD conversion names
Summary

Depends on D52372 and D52442.

Diff Detail

Repository
rL LLVM

Event Timeline

tlively created this revision.Sep 25 2018, 11:10 AM
Herald added subscribers: llvm-commits, sunfish, jgravelle-google, sbc100. · View Herald TranscriptSep 25 2018, 11:10 AM
tlively mentioned this in D52372: [WebAssembly] SIMD conversions.Sep 25 2018, 11:11 AM
aheejin accepted this revision.Sep 25 2018, 12:03 PM
This revision is now accepted and ready to land.Sep 25 2018, 12:03 PM
aardappel accepted this revision.Sep 27 2018, 11:29 AM
Closed by commit rL343558: [WebAssembly] Restore slashes in SIMD conversion names (authored by tlively). · Explain WhyOct 1 2018, 6:53 PM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
trunk/
lib/
Target/
WebAssembly/
16 lines
test/
CodeGen/
WebAssembly/
40 lines
MC/
WebAssembly/
32 lines

Diff 167870

llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td

Show First 20 Lines • Show All 381 Lines • ▼ Show 20 Lines
defm GE : SIMDConditionFP<"ge", SETOGE, 123>; defm GE : SIMDConditionFP<"ge", SETOGE, 123>;
defm "" : SIMDAbs<v4f32, "f32x4", 127>; defm "" : SIMDAbs<v4f32, "f32x4", 127>;
defm "" : SIMDAbs<v2f64, "f64x2", 128>; defm "" : SIMDAbs<v2f64, "f64x2", 128>;
defm "" : SIMDSqrt<v4f32, "f32x4", 141>; defm "" : SIMDSqrt<v4f32, "f32x4", 141>;
defm "" : SIMDSqrt<v2f64, "f64x2", 142>; defm "" : SIMDSqrt<v2f64, "f64x2", 142>;
defm "" : SIMDConvert<v4f32, v4i32, sint_to_fp, "f32x4.convert_s?i32x4", 143>; defm "" : SIMDConvert<v4f32, v4i32, sint_to_fp, "f32x4.convert_s/i32x4", 143>;
defm "" : SIMDConvert<v4f32, v4i32, uint_to_fp, "f32x4.convert_u?i32x4", 144>; defm "" : SIMDConvert<v4f32, v4i32, uint_to_fp, "f32x4.convert_u/i32x4", 144>;
defm "" : SIMDConvert<v2f64, v2i64, sint_to_fp, "f64x2.convert_s?i64x2", 145>; defm "" : SIMDConvert<v2f64, v2i64, sint_to_fp, "f64x2.convert_s/i64x2", 145>;
defm "" : SIMDConvert<v2f64, v2i64, uint_to_fp, "f64x2.convert_u?i64x2", 146>; defm "" : SIMDConvert<v2f64, v2i64, uint_to_fp, "f64x2.convert_u/i64x2", 146>;
defm "" : SIMDConvert<v4i32, v4f32, fp_to_sint, "i32x4.trunc_saturating_s?f32x4", 143>; defm "" : SIMDConvert<v4i32, v4f32, fp_to_sint, "i32x4.trunc_sat_s/f32x4", 147>;
defm "" : SIMDConvert<v4i32, v4f32, fp_to_uint, "i32x4.trunc_saturating_u?f32x4", 144>; defm "" : SIMDConvert<v4i32, v4f32, fp_to_uint, "i32x4.trunc_sat_u/f32x4", 148>;
defm "" : SIMDConvert<v2i64, v2f64, fp_to_sint, "i64x2.trunc_saturating_s?f64x2", 145>; defm "" : SIMDConvert<v2i64, v2f64, fp_to_sint, "i64x2.trunc_sat_s/f64x2", 149>;
defm "" : SIMDConvert<v2i64, v2f64, fp_to_uint, "i64x2.trunc_saturating_u?f64x2", 146>; defm "" : SIMDConvert<v2i64, v2f64, fp_to_uint, "i64x2.trunc_sat_u/f64x2", 150>;
} // Defs = [ARGUMENTS] } // Defs = [ARGUMENTS]
// Def load and store patterns from WebAssemblyInstrMemory.td for vector types // Def load and store patterns from WebAssemblyInstrMemory.td for vector types
foreach vec_t = [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64] in { foreach vec_t = [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64] in {
def : LoadPatNoOffset<vec_t, load, !cast<NI>("LOAD_"#vec_t)>; def : LoadPatNoOffset<vec_t, load, !cast<NI>("LOAD_"#vec_t)>;
def : LoadPatImmOff<vec_t, load, regPlusImm, !cast<NI>("LOAD_"#vec_t)>; def : LoadPatImmOff<vec_t, load, regPlusImm, !cast<NI>("LOAD_"#vec_t)>;
▲ Show 20 Lines • Show All 188 Lines • Show Last 20 Lines

llvm/trunk/test/CodeGen/WebAssembly/simd-conversions.ll

; RUN: llc < %s -asm-verbose=false -wasm-keep-registers -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-enable-unimplemented-simd -mattr=+simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,SIMD128 ; RUN: llc < %s -asm-verbose=false -wasm-keep-registers -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-enable-unimplemented-simd -mattr=+simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,SIMD128
; RUN: llc < %s -asm-verbose=false -wasm-keep-registers -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,SIMD128-VM ; RUN: llc < %s -asm-verbose=false -wasm-keep-registers -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,SIMD128-VM
; RUN: llc < %s -asm-verbose=false -wasm-keep-registers -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=-simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,NO-SIMD128 ; RUN: llc < %s -asm-verbose=false -wasm-keep-registers -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=-simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,NO-SIMD128
; Test that vector float-to-int and int-to-float instructions lower correctly ; Test that vector float-to-int and int-to-float instructions lower correctly
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: convert_s_v4f32: ; CHECK-LABEL: convert_s_v4f32:
; NO-SIMD128-NOT: i32x4 ; NO-SIMD128-NOT: i32x4
; SIMD128-NEXT: .param v128{{$}} ; SIMD128-NEXT: .param v128{{$}}
; SIMD128-NEXT: .result v128{{$}} ; SIMD128-NEXT: .result v128{{$}}
; SIMD128-NEXT: f32x4.convert_s?i32x4 $push[[R:[0-9]+]]=, $0 ; SIMD128-NEXT: f32x4.convert_s/i32x4 $push[[R:[0-9]+]]=, $0
; SIMD128-NEXT: return $pop[[R]] ; SIMD128-NEXT: return $pop[[R]]
define <4 x float> @convert_s_v4f32(<4 x i32> %x) { define <4 x float> @convert_s_v4f32(<4 x i32> %x) {
%a = sitofp <4 x i32> %x to <4 x float> %a = sitofp <4 x i32> %x to <4 x float>
ret <4 x float> %a ret <4 x float> %a
} }
; CHECK-LABEL: convert_u_v4f32: ; CHECK-LABEL: convert_u_v4f32:
; NO-SIMD128-NOT: i32x4 ; NO-SIMD128-NOT: i32x4
; SIMD128-NEXT: .param v128{{$}} ; SIMD128-NEXT: .param v128{{$}}
; SIMD128-NEXT: .result v128{{$}} ; SIMD128-NEXT: .result v128{{$}}
; SIMD128-NEXT: f32x4.convert_u?i32x4 $push[[R:[0-9]+]]=, $0 ; SIMD128-NEXT: f32x4.convert_u/i32x4 $push[[R:[0-9]+]]=, $0
; SIMD128-NEXT: return $pop[[R]] ; SIMD128-NEXT: return $pop[[R]]
define <4 x float> @convert_u_v4f32(<4 x i32> %x) { define <4 x float> @convert_u_v4f32(<4 x i32> %x) {
%a = uitofp <4 x i32> %x to <4 x float> %a = uitofp <4 x i32> %x to <4 x float>
ret <4 x float> %a ret <4 x float> %a
} }
; CHECK-LABEL: convert_s_v2f64: ; CHECK-LABEL: convert_s_v2f64:
; NO-SIMD128-NOT: i64x2 ; NO-SIMD128-NOT: i64x2
; SIMD128-VM-NOT: f64x2.convert_s?i64x2 ; SIMD128-VM-NOT: f64x2.convert_s/i64x2
; SIMD128-NEXT: .param v128{{$}} ; SIMD128-NEXT: .param v128{{$}}
; SIMD128-NEXT: .result v128{{$}} ; SIMD128-NEXT: .result v128{{$}}
; SIMD128-NEXT: f64x2.convert_s?i64x2 $push[[R:[0-9]+]]=, $0 ; SIMD128-NEXT: f64x2.convert_s/i64x2 $push[[R:[0-9]+]]=, $0
; SIMD128-NEXT: return $pop[[R]] ; SIMD128-NEXT: return $pop[[R]]
define <2 x double> @convert_s_v2f64(<2 x i64> %x) { define <2 x double> @convert_s_v2f64(<2 x i64> %x) {
%a = sitofp <2 x i64> %x to <2 x double> %a = sitofp <2 x i64> %x to <2 x double>
ret <2 x double> %a ret <2 x double> %a
} }
; CHECK-LABEL: convert_u_v2f64: ; CHECK-LABEL: convert_u_v2f64:
; NO-SIMD128-NOT: i64x2 ; NO-SIMD128-NOT: i64x2
; SIMD128-VM-NOT: f64x2.convert_u?i64x2 ; SIMD128-VM-NOT: f64x2.convert_u/i64x2
; SIMD128-NEXT: .param v128{{$}} ; SIMD128-NEXT: .param v128{{$}}
; SIMD128-NEXT: .result v128{{$}} ; SIMD128-NEXT: .result v128{{$}}
; SIMD128-NEXT: f64x2.convert_u?i64x2 $push[[R:[0-9]+]]=, $0 ; SIMD128-NEXT: f64x2.convert_u/i64x2 $push[[R:[0-9]+]]=, $0
; SIMD128-NEXT: return $pop[[R]] ; SIMD128-NEXT: return $pop[[R]]
define <2 x double> @convert_u_v2f64(<2 x i64> %x) { define <2 x double> @convert_u_v2f64(<2 x i64> %x) {
%a = uitofp <2 x i64> %x to <2 x double> %a = uitofp <2 x i64> %x to <2 x double>
ret <2 x double> %a ret <2 x double> %a
} }
; CHECK-LABEL: trunc_saturating_s_v4i32: ; CHECK-LABEL: trunc_sat_s_v4i32:
; NO-SIMD128-NOT: f32x4 ; NO-SIMD128-NOT: f32x4
; SIMD128-NEXT: .param v128{{$}} ; SIMD128-NEXT: .param v128{{$}}
; SIMD128-NEXT: .result v128{{$}} ; SIMD128-NEXT: .result v128{{$}}
; SIMD128-NEXT: i32x4.trunc_saturating_s?f32x4 $push[[R:[0-9]+]]=, $0 ; SIMD128-NEXT: i32x4.trunc_sat_s/f32x4 $push[[R:[0-9]+]]=, $0
; SIMD128-NEXT: return $pop[[R]] ; SIMD128-NEXT: return $pop[[R]]
define <4 x i32> @trunc_saturating_s_v4i32(<4 x float> %x) { define <4 x i32> @trunc_sat_s_v4i32(<4 x float> %x) {
%a = fptosi <4 x float> %x to <4 x i32> %a = fptosi <4 x float> %x to <4 x i32>
ret <4 x i32> %a ret <4 x i32> %a
} }
; CHECK-LABEL: trunc_saturating_u_v4i32: ; CHECK-LABEL: trunc_sat_u_v4i32:
; NO-SIMD128-NOT: f32x4 ; NO-SIMD128-NOT: f32x4
; SIMD128-NEXT: .param v128{{$}} ; SIMD128-NEXT: .param v128{{$}}
; SIMD128-NEXT: .result v128{{$}} ; SIMD128-NEXT: .result v128{{$}}
; SIMD128-NEXT: i32x4.trunc_saturating_u?f32x4 $push[[R:[0-9]+]]=, $0 ; SIMD128-NEXT: i32x4.trunc_sat_u/f32x4 $push[[R:[0-9]+]]=, $0
; SIMD128-NEXT: return $pop[[R]] ; SIMD128-NEXT: return $pop[[R]]
define <4 x i32> @trunc_saturating_u_v4i32(<4 x float> %x) { define <4 x i32> @trunc_sat_u_v4i32(<4 x float> %x) {
%a = fptoui <4 x float> %x to <4 x i32> %a = fptoui <4 x float> %x to <4 x i32>
ret <4 x i32> %a ret <4 x i32> %a
} }
; CHECK-LABEL: trunc_saturating_s_v2i64: ; CHECK-LABEL: trunc_sat_s_v2i64:
; NO-SIMD128-NOT: f64x2 ; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: i64x2.trunc_saturating_s?f64x2 ; SIMD128-VM-NOT: i64x2.trunc_sat_s/f64x2
; SIMD128-NEXT: .param v128{{$}} ; SIMD128-NEXT: .param v128{{$}}
; SIMD128-NEXT: .result v128{{$}} ; SIMD128-NEXT: .result v128{{$}}
; SIMD128-NEXT: i64x2.trunc_saturating_s?f64x2 $push[[R:[0-9]+]]=, $0 ; SIMD128-NEXT: i64x2.trunc_sat_s/f64x2 $push[[R:[0-9]+]]=, $0
; SIMD128-NEXT: return $pop[[R]] ; SIMD128-NEXT: return $pop[[R]]
define <2 x i64> @trunc_saturating_s_v2i64(<2 x double> %x) { define <2 x i64> @trunc_sat_s_v2i64(<2 x double> %x) {
%a = fptosi <2 x double> %x to <2 x i64> %a = fptosi <2 x double> %x to <2 x i64>
ret <2 x i64> %a ret <2 x i64> %a
} }
; CHECK-LABEL: trunc_saturating_u_v2i64: ; CHECK-LABEL: trunc_sat_u_v2i64:
; NO-SIMD128-NOT: f64x2 ; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: i64x2.trunc_saturating_u?f64x2 ; SIMD128-VM-NOT: i64x2.trunc_sat_u/f64x2
; SIMD128-NEXT: .param v128{{$}} ; SIMD128-NEXT: .param v128{{$}}
; SIMD128-NEXT: .result v128{{$}} ; SIMD128-NEXT: .result v128{{$}}
; SIMD128-NEXT: i64x2.trunc_saturating_u?f64x2 $push[[R:[0-9]+]]=, $0 ; SIMD128-NEXT: i64x2.trunc_sat_u/f64x2 $push[[R:[0-9]+]]=, $0
; SIMD128-NEXT: return $pop[[R]] ; SIMD128-NEXT: return $pop[[R]]
define <2 x i64> @trunc_saturating_u_v2i64(<2 x double> %x) { define <2 x i64> @trunc_sat_u_v2i64(<2 x double> %x) {
%a = fptoui <2 x double> %x to <2 x i64> %a = fptoui <2 x double> %x to <2 x i64>
ret <2 x i64> %a ret <2 x i64> %a
} }

llvm/trunk/test/MC/WebAssembly/simd-encodings.s

Show First 20 Lines • Show All 355 Lines • ▼ Show 20 Lines# RUN: llvm-mc -show-encoding -triple=wasm32-unkown-unknown -mattr=+sign-ext,+simd128 < %s | FileCheck %s
f64x2.mul f64x2.mul
# CHECK: f32x4.sqrt # encoding: [0xfd,0x8d] # CHECK: f32x4.sqrt # encoding: [0xfd,0x8d]
f32x4.sqrt f32x4.sqrt
# CHECK: f64x2.sqrt # encoding: [0xfd,0x8e] # CHECK: f64x2.sqrt # encoding: [0xfd,0x8e]
f64x2.sqrt f64x2.sqrt
# CHECK: f32x4.convert_s?i32x4 # encoding: [0xfd,0x8f] # CHECK: f32x4.convert_s/i32x4 # encoding: [0xfd,0x8f]
f32x4.convert_s?i32x4 f32x4.convert_s/i32x4
# CHECK: f32x4.convert_u?i32x4 # encoding: [0xfd,0x90] # CHECK: f32x4.convert_u/i32x4 # encoding: [0xfd,0x90]
f32x4.convert_u?i32x4 f32x4.convert_u/i32x4
# CHECK: f64x2.convert_s?i64x2 # encoding: [0xfd,0x91] # CHECK: f64x2.convert_s/i64x2 # encoding: [0xfd,0x91]
f64x2.convert_s?i64x2 f64x2.convert_s/i64x2
# CHECK: f64x2.convert_u?i64x2 # encoding: [0xfd,0x92] # CHECK: f64x2.convert_u/i64x2 # encoding: [0xfd,0x92]
f64x2.convert_u?i64x2 f64x2.convert_u/i64x2
# CHECK? i32x4.trunc_saturating_s?f32x4 # encoding: [0xfd,0x93] # CHECK: i32x4.trunc_sat_s/f32x4 # encoding: [0xfd,0x93]
i32x4.trunc_saturating_s?f32x4 i32x4.trunc_sat_s/f32x4
# CHECK? i32x4.trunc_saturating_u?f32x4 # encoding: [0xfd,0x94] # CHECK: i32x4.trunc_sat_u/f32x4 # encoding: [0xfd,0x94]
i32x4.trunc_saturating_u?f32x4 i32x4.trunc_sat_u/f32x4
# CHECK? i64x2.trunc_saturating_s?f64x2 # encoding: [0xfd,0x95] # CHECK: i64x2.trunc_sat_s/f64x2 # encoding: [0xfd,0x95]
i64x2.trunc_saturating_s?f64x2 i64x2.trunc_sat_s/f64x2
# CHECK? i64x2.trunc_saturating_u?f64x2 # encoding: [0xfd,0x96] # CHECK: i64x2.trunc_sat_u/f64x2 # encoding: [0xfd,0x96]
i64x2.trunc_saturating_u?f64x2 i64x2.trunc_sat_u/f64x2
end_function end_function