[CUDA] Add basic support for CUDA-10.0

[Hahnfeld]

I think this revision can be closed after rC342924?

[tra]

Landed in rC342924

clang/include/clang/Basic/Cuda.h

 enum class CudaVersion {
   UNKNOWN,
   CUDA_70,
   CUDA_75,
   CUDA_80,
   CUDA_90,
   CUDA_91,
   CUDA_92,
-  LATEST = CUDA_92,
+  CUDA_100,
+  LATEST = CUDA_100,
 };
 const char *CudaVersionToString(CudaVersion V);
 
 // No string -> CudaVersion conversion function because there's no canonical
 // spelling of the various CUDA versions.
 
 enum class CudaArch {
   UNKNOWN,
   SM_20,
   SM_21,
   SM_30,
   SM_32,
   SM_35,
   SM_37,
   SM_50,
   SM_52,
   SM_53,
   SM_60,
   SM_61,
   SM_62,
   SM_70,
   SM_72,
+  SM_75,
   GFX600,
   GFX601,
   GFX700,
   GFX701,
   GFX702,
   GFX703,
   GFX704,
   GFX801,
enum class CudaVirtualArch {
   COMPUTE_50,
   COMPUTE_52,
   COMPUTE_53,
   COMPUTE_60,
   COMPUTE_61,
   COMPUTE_62,
   COMPUTE_70,
   COMPUTE_72,
+  COMPUTE_75,
   COMPUTE_AMDGCN,
 };
 const char *CudaVirtualArchToString(CudaVirtualArch A);
 
 // The input should have the form "compute_20".
 CudaVirtualArch StringToCudaVirtualArch(llvm::StringRef S);
 
 /// Get the compute_xx corresponding to an sm_yy.

clang/lib/Basic/Cuda.cpp

const char *CudaVersionToString(CudaVersion V) {
   case CudaVersion::CUDA_80:
     return "8.0";
   case CudaVersion::CUDA_90:
     return "9.0";
   case CudaVersion::CUDA_91:
     return "9.1";
   case CudaVersion::CUDA_92:
     return "9.2";
+  case CudaVersion::CUDA_100:
+    return "10.0";
   }
   llvm_unreachable("invalid enum");
 }
 
 const char *CudaArchToString(CudaArch A) {
   switch (A) {
   case CudaArch::LAST:
     break;
const char *CudaArchToString(CudaArch A) {
   case CudaArch::SM_61:
     return "sm_61";
   case CudaArch::SM_62:
     return "sm_62";
   case CudaArch::SM_70:
     return "sm_70";
   case CudaArch::SM_72:
     return "sm_72";
+  case CudaArch::SM_75:
+    return "sm_75";
   case CudaArch::GFX600: // tahiti
     return "gfx600";
   case CudaArch::GFX601: // pitcairn, verde, oland,hainan
     return "gfx601";
   case CudaArch::GFX700: // kaveri
     return "gfx700";
   case CudaArch::GFX701: // hawaii
     return "gfx701";
return llvm::StringSwitch<CudaArch>(S)
       .Case("sm_50", CudaArch::SM_50)
       .Case("sm_52", CudaArch::SM_52)
       .Case("sm_53", CudaArch::SM_53)
       .Case("sm_60", CudaArch::SM_60)
       .Case("sm_61", CudaArch::SM_61)
       .Case("sm_62", CudaArch::SM_62)
       .Case("sm_70", CudaArch::SM_70)
       .Case("sm_72", CudaArch::SM_72)
+      .Case("sm_75", CudaArch::SM_75)
       .Case("gfx600", CudaArch::GFX600)
       .Case("gfx601", CudaArch::GFX601)
       .Case("gfx700", CudaArch::GFX700)
       .Case("gfx701", CudaArch::GFX701)
       .Case("gfx702", CudaArch::GFX702)
       .Case("gfx703", CudaArch::GFX703)
       .Case("gfx704", CudaArch::GFX704)
       .Case("gfx801", CudaArch::GFX801)
const char *CudaVirtualArchToString(CudaVirtualArch A) {
   case CudaVirtualArch::COMPUTE_61:
     return "compute_61";
   case CudaVirtualArch::COMPUTE_62:
     return "compute_62";
   case CudaVirtualArch::COMPUTE_70:
     return "compute_70";
   case CudaVirtualArch::COMPUTE_72:
     return "compute_72";
+  case CudaVirtualArch::COMPUTE_75:
+    return "compute_75";
   case CudaVirtualArch::COMPUTE_AMDGCN:
     return "compute_amdgcn";
   }
   llvm_unreachable("invalid enum");
 }
 
 CudaVirtualArch StringToCudaVirtualArch(llvm::StringRef S) {
   return llvm::StringSwitch<CudaVirtualArch>(S)
       .Case("compute_20", CudaVirtualArch::COMPUTE_20)
       .Case("compute_30", CudaVirtualArch::COMPUTE_30)
       .Case("compute_32", CudaVirtualArch::COMPUTE_32)
       .Case("compute_35", CudaVirtualArch::COMPUTE_35)
       .Case("compute_37", CudaVirtualArch::COMPUTE_37)
       .Case("compute_50", CudaVirtualArch::COMPUTE_50)
       .Case("compute_52", CudaVirtualArch::COMPUTE_52)
       .Case("compute_53", CudaVirtualArch::COMPUTE_53)
       .Case("compute_60", CudaVirtualArch::COMPUTE_60)
       .Case("compute_61", CudaVirtualArch::COMPUTE_61)
       .Case("compute_62", CudaVirtualArch::COMPUTE_62)
       .Case("compute_70", CudaVirtualArch::COMPUTE_70)
       .Case("compute_72", CudaVirtualArch::COMPUTE_72)
+      .Case("compute_75", CudaVirtualArch::COMPUTE_75)
       .Case("compute_amdgcn", CudaVirtualArch::COMPUTE_AMDGCN)
       .Default(CudaVirtualArch::UNKNOWN);
 }
 
 CudaVirtualArch VirtualArchForCudaArch(CudaArch A) {
   switch (A) {
   case CudaArch::LAST:
     break;
CudaVirtualArch VirtualArchForCudaArch(CudaArch A) {
   case CudaArch::SM_61:
     return CudaVirtualArch::COMPUTE_61;
   case CudaArch::SM_62:
     return CudaVirtualArch::COMPUTE_62;
   case CudaArch::SM_70:
     return CudaVirtualArch::COMPUTE_70;
   case CudaArch::SM_72:
     return CudaVirtualArch::COMPUTE_72;
+  case CudaArch::SM_75:
+    return CudaVirtualArch::COMPUTE_75;
   case CudaArch::GFX600:
   case CudaArch::GFX601:
   case CudaArch::GFX700:
   case CudaArch::GFX701:
   case CudaArch::GFX702:
   case CudaArch::GFX703:
   case CudaArch::GFX704:
   case CudaArch::GFX801:
CudaVersion MinVersionForCudaArch(CudaArch A) {
   case CudaArch::SM_60:
   case CudaArch::SM_61:
   case CudaArch::SM_62:
     return CudaVersion::CUDA_80;
   case CudaArch::SM_70:
     return CudaVersion::CUDA_90;
   case CudaArch::SM_72:
     return CudaVersion::CUDA_91;
+  case CudaArch::SM_75:
+    return CudaVersion::CUDA_100;
   case CudaArch::GFX600:
   case CudaArch::GFX601:
   case CudaArch::GFX700:
   case CudaArch::GFX701:
   case CudaArch::GFX702:
   case CudaArch::GFX703:
   case CudaArch::GFX704:
   case CudaArch::GFX801:

clang/lib/Basic/Targets/NVPTX.cpp

std::string CUDAArchCode = [this] {
       case CudaArch::SM_61:
         return "610";
       case CudaArch::SM_62:
         return "620";
       case CudaArch::SM_70:
         return "700";
       case CudaArch::SM_72:
         return "720";
+      case CudaArch::SM_75:
+        return "750";
       }
       llvm_unreachable("unhandled CudaArch");
     }();
     Builder.defineMacro("__CUDA_ARCH__", CUDAArchCode);
   }
 }
 
 ArrayRef<Builtin::Info> NVPTXTargetInfo::getTargetBuiltins() const {
   return llvm::makeArrayRef(BuiltinInfo, clang::NVPTX::LastTSBuiltin -
                                              Builtin::FirstTSBuiltin);
 }

clang/lib/Driver/ToolChains/Cuda.cpp

static CudaVersion ParseCudaVersionFile(llvm::StringRef V) {
   if (Major == 8 && Minor == 0)
     return CudaVersion::CUDA_80;
   if (Major == 9 && Minor == 0)
     return CudaVersion::CUDA_90;
   if (Major == 9 && Minor == 1)
     return CudaVersion::CUDA_91;
   if (Major == 9 && Minor == 2)
     return CudaVersion::CUDA_92;
+  if (Major == 10 && Minor == 0)
+    return CudaVersion::CUDA_100;
   return CudaVersion::UNKNOWN;
 }
 
 CudaInstallationDetector::CudaInstallationDetector(
     const Driver &D, const llvm::Triple &HostTriple,
     const llvm::opt::ArgList &Args)
     : D(D) {
   struct Candidate {
for (const auto &Candidate : Candidates) {
     }
 
     if (Version >= CudaVersion::CUDA_90) {
       // CUDA-9+ uses single libdevice file for all GPU variants.
       std::string FilePath = LibDevicePath + "/libdevice.10.bc";
       if (FS.exists(FilePath)) {
         for (const char *GpuArchName :
              {"sm_30", "sm_32", "sm_35", "sm_37", "sm_50", "sm_52", "sm_53",
-              "sm_60", "sm_61", "sm_62", "sm_70", "sm_72"}) {
+              "sm_60", "sm_61", "sm_62", "sm_70", "sm_72", "sm_75"}) {
           const CudaArch GpuArch = StringToCudaArch(GpuArchName);
           if (Version >= MinVersionForCudaArch(GpuArch) &&
               Version <= MaxVersionForCudaArch(GpuArch))
             LibDeviceMap[GpuArchName] = FilePath;
         }
       }
     } else {
       std::error_code EC;
void CudaToolChain::addClangTargetOptions(
 
   CC1Args.push_back("-mlink-builtin-bitcode");
   CC1Args.push_back(DriverArgs.MakeArgString(LibDeviceFile));
 
   // Libdevice in CUDA-7.0 requires PTX version that's more recent than LLVM
   // defaults to. Use PTX4.2 by default, which is the PTX version that came with
   // CUDA-7.0.
   const char *PtxFeature = "+ptx42";
+  // TODO(tra): CUDA-10+ needs PTX 6.3 to support new features. However that
+  // requires fair amount of work on LLVM side. We'll keep using PTX 6.1 until
+  // all prerequisites are in place.
   if (CudaInstallation.version() >= CudaVersion::CUDA_91) {
     // CUDA-9.1 uses new instructions that are only available in PTX6.1+
     PtxFeature = "+ptx61";
   } else if (CudaInstallation.version() >= CudaVersion::CUDA_90) {
     // CUDA-9.0 uses new instructions that are only available in PTX6.0+
     PtxFeature = "+ptx60";
   }
   CC1Args.append({"-target-feature", PtxFeature});

clang/lib/Headers/__clang_cuda_runtime_wrapper.h

 #pragma push_macro("__CUDA_ARCH__")
 
 // WARNING: Preprocessor hacks below are based on specific details of
 // CUDA-7.x headers and are not expected to work with any other
 // version of CUDA headers.
 #include "cuda.h"
 #if !defined(CUDA_VERSION)
 #error "cuda.h did not define CUDA_VERSION"
-#elif CUDA_VERSION < 7000 || CUDA_VERSION > 9020
+#elif CUDA_VERSION < 7000 || CUDA_VERSION > 10000
 #error "Unsupported CUDA version!"
 #endif
 
+#pragma push_macro("__CUDA_INCLUDE_COMPILER_INTERNAL_HEADERS__")
+#if CUDA_VERSION >= 10000
+#define __CUDA_INCLUDE_COMPILER_INTERNAL_HEADERS__
+#endif
+
 // Make largest subset of device functions available during host
 // compilation -- SM_35 for the time being.
 #ifndef __CUDA_ARCH__
 #define __CUDA_ARCH__ 350
 #endif
 
 #include "__clang_cuda_builtin_vars.h"
 

 #pragma push_macro("dim3")
 #pragma push_macro("uint3")
 #define dim3 __cuda_builtin_blockDim_t
 #define uint3 __cuda_builtin_threadIdx_t
 #include "curand_mtgp32_kernel.h"
 #pragma pop_macro("dim3")
 #pragma pop_macro("uint3")
 #pragma pop_macro("__USE_FAST_MATH__")
+#pragma pop_macro("__CUDA_INCLUDE_COMPILER_INTERNAL_HEADERS__")
 
 #endif // __CUDA__
 #endif // __CLANG_CUDA_RUNTIME_WRAPPER_H__

llvm/lib/Target/NVPTX/NVPTX.td

 def SM61 : SubtargetFeature<"sm_61", "SmVersion", "61",
                              "Target SM 6.1">;
 def SM62 : SubtargetFeature<"sm_62", "SmVersion", "62",
                              "Target SM 6.2">;
 def SM70 : SubtargetFeature<"sm_70", "SmVersion", "70",
                              "Target SM 7.0">;
 def SM72 : SubtargetFeature<"sm_72", "SmVersion", "72",
                              "Target SM 7.2">;
+def SM75 : SubtargetFeature<"sm_75", "SmVersion", "75",
+                             "Target SM 7.5">;
 
 // PTX Versions
 def PTX32 : SubtargetFeature<"ptx32", "PTXVersion", "32",
                              "Use PTX version 3.2">;
 def PTX40 : SubtargetFeature<"ptx40", "PTXVersion", "40",
                              "Use PTX version 4.0">;
 def PTX41 : SubtargetFeature<"ptx41", "PTXVersion", "41",
                              "Use PTX version 4.1">;
 def PTX42 : SubtargetFeature<"ptx42", "PTXVersion", "42",
                              "Use PTX version 4.2">;
 def PTX43 : SubtargetFeature<"ptx43", "PTXVersion", "43",
                              "Use PTX version 4.3">;
 def PTX50 : SubtargetFeature<"ptx50", "PTXVersion", "50",
                              "Use PTX version 5.0">;
 def PTX60 : SubtargetFeature<"ptx60", "PTXVersion", "60",
                              "Use PTX version 6.0">;
 def PTX61 : SubtargetFeature<"ptx61", "PTXVersion", "61",
                              "Use PTX version 6.1">;
+def PTX63 : SubtargetFeature<"ptx63", "PTXVersion", "63",
+                             "Use PTX version 6.3">;
 
 //===----------------------------------------------------------------------===//
 // NVPTX supported processors.
 //===----------------------------------------------------------------------===//
 
 class Proc<string Name, list<SubtargetFeature> Features>
  : Processor<Name, NoItineraries, Features>;
 
 def : Proc<"sm_20", [SM20]>;
 def : Proc<"sm_21", [SM21]>;
 def : Proc<"sm_30", [SM30]>;
 def : Proc<"sm_32", [SM32, PTX40]>;
 def : Proc<"sm_35", [SM35]>;
 def : Proc<"sm_37", [SM37, PTX41]>;
 def : Proc<"sm_50", [SM50, PTX40]>;
 def : Proc<"sm_52", [SM52, PTX41]>;
 def : Proc<"sm_53", [SM53, PTX42]>;
 def : Proc<"sm_60", [SM60, PTX50]>;
 def : Proc<"sm_61", [SM61, PTX50]>;
 def : Proc<"sm_62", [SM62, PTX50]>;
 def : Proc<"sm_70", [SM70, PTX60]>;
 def : Proc<"sm_72", [SM72, PTX61]>;
+def : Proc<"sm_75", [SM75, PTX63]>;
 
 def NVPTXInstrInfo : InstrInfo {
 }
 
 def NVPTX : Target {
   let InstructionSet = NVPTXInstrInfo;
 }