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Differential D52388

[WebAssembly][NFC] Fix hardcoded stack indices in tests
ClosedPublic

Authored by tlively on Sep 21 2018, 8:08 PM.

Details

Reviewers
aheejin
dschuff
Commits
rG586153652c8c: [WebAssembly][NFC] Fix hardcoded stack indices in tests
rL342928: [WebAssembly][NFC] Fix hardcoded stack indices in tests

Diff Detail

Repository
rL LLVM

Event Timeline

tlively created this revision.Sep 21 2018, 8:08 PM
Herald added subscribers: llvm-commits, sunfish, jgravelle-google, sbc100. · View Herald TranscriptSep 21 2018, 8:08 PM
Harbormaster completed remote builds in B22953: Diff 166593.Sep 21 2018, 8:10 PM
aheejin accepted this revision.Sep 24 2018, 10:42 AM
This revision is now accepted and ready to land.Sep 24 2018, 10:42 AM
Closed by commit rL342928: [WebAssembly][NFC] Fix hardcoded stack indices in tests (authored by tlively). · Explain WhySep 24 2018, 4:46 PM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
trunk/
test/
CodeGen/
WebAssembly/
8 lines

Diff 166786

llvm/trunk/test/CodeGen/WebAssembly/simd-arith.ll

Show First 20 Lines • Show All 665 Lines • ▼ Show 20 Linesdefine <4 x float> @neg_v4f32(<4 x float> %x) {
%a = fsub <4 x float> <float 0., float 0., float 0., float 0.>, %x %a = fsub <4 x float> <float 0., float 0., float 0., float 0.>, %x
ret <4 x float> %a ret <4 x float> %a
} }
; CHECK-LABEL: abs_v4f32: ; CHECK-LABEL: abs_v4f32:
; NO-SIMD128-NOT: f32x4 ; NO-SIMD128-NOT: f32x4
; SIMD128-NEXT: .param v128{{$}} ; SIMD128-NEXT: .param v128{{$}}
; SIMD128-NEXT: .result v128{{$}} ; SIMD128-NEXT: .result v128{{$}}
; SIMD128-NEXT: f32x4.abs $push0=, $0{{$}} ; SIMD128-NEXT: f32x4.abs $push[[R:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: return $pop0{{$}} ; SIMD128-NEXT: return $pop[[R]]{{$}}
declare <4 x float> @llvm.fabs.v4f32(<4 x float>) nounwind readnone declare <4 x float> @llvm.fabs.v4f32(<4 x float>) nounwind readnone
define <4 x float> @abs_v4f32(<4 x float> %x) { define <4 x float> @abs_v4f32(<4 x float> %x) {
%a = call <4 x float> @llvm.fabs.v4f32(<4 x float> %x) %a = call <4 x float> @llvm.fabs.v4f32(<4 x float> %x)
ret <4 x float> %a ret <4 x float> %a
} }
; CHECK-LABEL: add_v4f32: ; CHECK-LABEL: add_v4f32:
; NO-SIMD128-NOT: f32x4 ; NO-SIMD128-NOT: f32x4
▲ Show 20 Lines • Show All 52 Lines • ▼ Show 20 Linesdefine <2 x double> @neg_v2f64(<2 x double> %x) {
%a = fsub <2 x double> <double 0., double 0.>, %x %a = fsub <2 x double> <double 0., double 0.>, %x
ret <2 x double> %a ret <2 x double> %a
} }
; CHECK-LABEL: abs_v2f64: ; CHECK-LABEL: abs_v2f64:
; NO-SIMD128-NOT: f64x2 ; NO-SIMD128-NOT: f64x2
; SIMD128-NEXT: .param v128{{$}} ; SIMD128-NEXT: .param v128{{$}}
; SIMD128-NEXT: .result v128{{$}} ; SIMD128-NEXT: .result v128{{$}}
; SIMD128-NEXT: f64x2.abs $push0=, $0{{$}} ; SIMD128-NEXT: f64x2.abs $push[[R:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: return $pop0{{$}} ; SIMD128-NEXT: return $pop[[R]]{{$}}
declare <2 x double> @llvm.fabs.v2f64(<2 x double>) nounwind readnone declare <2 x double> @llvm.fabs.v2f64(<2 x double>) nounwind readnone
define <2 x double> @abs_v2f64(<2 x double> %x) { define <2 x double> @abs_v2f64(<2 x double> %x) {
%a = call <2 x double> @llvm.fabs.v2f64(<2 x double> %x) %a = call <2 x double> @llvm.fabs.v2f64(<2 x double> %x)
ret <2 x double> %a ret <2 x double> %a
} }
; CHECK-LABEL: add_v2f64: ; CHECK-LABEL: add_v2f64:
▲ Show 20 Lines • Show All 46 Lines • Show Last 20 Lines