[Thumb] Add some integer abs testcases for different typesizes.

[ikulagin]

test/CodeGen/Thumb/iabs.ll

18 ↗

(On Diff #165656)

Why do we need to check in such a manner without taking into account specific instructions but only counting their number?

[RKSimon]

What's happening with this? I'm keen to get D49837 in soon

test/CodeGen/Thumb/iabs.ll

3 ↗

(On Diff #165656)

Instead of the counts, just running llc and checking the full codegen would be a lot cleaner.

I don't think the update_llc_test_checks script supports thumb triples but that'd be even easier.....

[ikulagin]

What's happening with this? I'm keen to get D49837 in soon

This changes are already exist in D49837

[RKSimon]

In D52138#1383957, @ikulagin wrote:

What's happening with this? I'm keen to get D49837 in soon

This changes are already exist in D49837

It'd be better to get this committed against current trunk codegen so D49837 shows the codegen change

@t.p.northover You blocked this change - any comments?

[ikulagin]

Ping

[RKSimon]

test/CodeGen/Thumb/iabs.ll

20 ↗

(On Diff #188677)

This test is just a copy of test_i32 - lets keep test_i32 and get rid of this.

3 ↗

(On Diff #165656)

Drop the llvm-objdump run - we can get everything we need (full instruction codegen) from the llc - that checks we have the right #instructions.

[dmgreen]

From what I can tell, t.p.northover was added as a blocking reviewer, he didn't block this patch.

I agree with RKSimon, you can remove the odd "count" check and just use the update script.

test/CodeGen/Thumb/iabs.ll

3 ↗

(On Diff #165656)

Yep, I agree. Maybe change the triple to thumbv6m-none-eabi too? Then just run update_llc_test_checks.py on it.

[ikulagin]

Update by update_llc_test_checks.py.

[RKSimon]

LGTM - do you have commit access yet?

[ikulagin]

No I don't. Could you commit it, please?

[RKSimon]

LGTM

llvm/trunk/test/CodeGen/Thumb/iabs.ll

-; RUN: llc < %s -mtriple=thumb-unknown-unknown -filetype=obj -o %t.o
-; RUN: llvm-objdump -disassemble -arch-name=thumb %t.o | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=thumbv6m-none-eabi | FileCheck %s
 
-define i32 @test(i32 %a) {
-        %tmp1neg = sub i32 0, %a
-        %b = icmp sgt i32 %a, -1
-        %abs = select i1 %b, i32 %a, i32 %tmp1neg
-        ret i32 %abs
-
-; This test just checks that 4 instructions were emitted
-
-; CHECK:      {{text}}
-; CHECK:      0:
-; CHECK-NEXT: 2:
-; CHECK-NEXT: 4:
-; CHECK-NEXT: 6:
-
-; CHECK-NOT: 8:
+define i8 @test_i8(i8 %a) nounwind {
+; CHECK-LABEL: test_i8:
+; CHECK:       @ %bb.0:
+; CHECK-NEXT:    sxtb r1, r0
+; CHECK-NEXT:    asrs r1, r1, #7
+; CHECK-NEXT:    adds r0, r0, r1
+; CHECK-NEXT:    eors r0, r1
+; CHECK-NEXT:    bx lr
+  %tmp1neg = sub i8 0, %a
+  %b = icmp sgt i8 %a, -1
+  %abs = select i1 %b, i8 %a, i8 %tmp1neg
+  ret i8 %abs
+}
+
+define i16 @test_i16(i16 %a) nounwind {
+; CHECK-LABEL: test_i16:
+; CHECK:       @ %bb.0:
+; CHECK-NEXT:    sxth r1, r0
+; CHECK-NEXT:    asrs r1, r1, #15
+; CHECK-NEXT:    adds r0, r0, r1
+; CHECK-NEXT:    eors r0, r1
+; CHECK-NEXT:    bx lr
+  %tmp1neg = sub i16 0, %a
+  %b = icmp sgt i16 %a, -1
+  %abs = select i1 %b, i16 %a, i16 %tmp1neg
+  ret i16 %abs
+}
+
+define i32 @test_i32(i32 %a) nounwind {
+; CHECK-LABEL: test_i32:
+; CHECK:       @ %bb.0:
+; CHECK-NEXT:    asrs r1, r0, #31
+; CHECK-NEXT:    adds r0, r0, r1
+; CHECK-NEXT:    eors r0, r1
+; CHECK-NEXT:    bx lr
 }
 
+define i64 @test_i64(i64 %a) nounwind {
+; CHECK-LABEL: test_i64:
+; CHECK:       @ %bb.0:
+; CHECK-NEXT:    asrs r2, r1, #31
+; CHECK-NEXT:    adds r0, r0, r2
+; CHECK-NEXT:    adcs r1, r2
+; CHECK-NEXT:    eors r0, r2
+; CHECK-NEXT:    eors r1, r2
+; CHECK-NEXT:    bx lr
+  %tmp1neg = sub i64 0, %a
+  %b = icmp sgt i64 %a, -1
+  %abs = select i1 %b, i64 %a, i64 %tmp1neg
+  ret i64 %abs
+}