- User Since
- Jun 5 2018, 9:40 AM (32 w, 2 d)
Wed, Jan 9
Oct 30 2018
Oct 29 2018
Extend 'matchSelectPattern' to recognize the ABS patterns with ICMP_SGE condition.
Oct 28 2018
Rebase and merge changes to one patch.
Oct 27 2018
Changes in this patch require the changes in target specific parts (AArch64, X86, etc), otherwise
some tests will fail. Should I include these target specific changes into the current differential or into a separate one?
Now they are in separate differential.
Oct 25 2018
Are you still working on this?
Sep 15 2018
Sep 13 2018
Please rebase after rL342156
Sep 12 2018
Commit this file with current codegen and update the patch to show the codegen diff?
Sep 10 2018
Sep 5 2018
Rebase and fix the SAD pattern recognizer.
Rebase and fix expand-based legalization of integer result for the ABS nodes.
Sep 4 2018
Aug 3 2018
Rebase the patch
Aug 1 2018
I have excluded the X86 SAD pattern recognizer from this patch. It will be in another diff.
Now, I am implementing the target-depended ABS handling and the test cases for it.
I will create a new diff for the target-depended handling + test cases over this patch.
Jul 30 2018
Jul 28 2018
And I have another comment, maybe you can split this patch into two parts:
Patch 1: contain first three parts in your description
SelectionDAGBuilder::visitSelect handles the unary SelectPatternFlavor::SPF_ABS case to build ABS node.
Expand-based legalization of integer result for the ABS nodes.
Expand-based legalization of ABS vector operations.
Patch 2: handle X86 specific
What do you think?
Jul 27 2018
Jul 26 2018
This patch produces ISD::ABS when ValueTracking recognizes the pattern from D48754.
Jul 10 2018
Could you commit it, please? I have no rights to do it.
Jul 9 2018
Or you should just check the CC in the first if, then select your Add and your possible constant. And check that it is an Add and a constant.
What happens with cttz when -mattr=bmi which enables the tzcnt instruction
The test cases only cover the CTTZ_ZERO_UNDEF version right?
Jul 7 2018
I have fixed this pattern as a DAG combining on the CMOV node before instruction selection.
The following DAG combinations are performed:
(CMOV (ADD (CTTZ X), C), C-1, (X != 0)) -> (ADD (CMOV (CTTZ X), -1, (X != 0)), C)
(CMOV C-1, (ADD (CTTZ X), C), (X == 0)) -> (ADD (CMOV C-1, (CTTZ X), (X == 0)), C)
Jun 30 2018
I figured out that the fixing this pattern while dag combining is possible indeed. I'll try to do it and see what happens.