[llvm-exegesis][NFC] Split BenchmarkRunner class

[courbet]

Summary

The snippet-generation part goes to the SnippetGenerator class.

This will allow benchmarking arbitrary code (see PR38437).

[courbet]

clang-format

[courbet]

update comment

[gchatelet]

tools/llvm-exegesis/lib/SnippetGenerator.h

40 ↗

(On Diff #165069)

SnippetGeneratorBase?

[courbet]

Thanks.

tools/llvm-exegesis/lib/SnippetGenerator.h

40 ↗

(On Diff #165069)

Users of the class manipulate it through the base class, so it would be a bit awkward to have functions take a SnippetGeneratorBase instead of a SnippetGenerator.

[gchatelet]

tools/llvm-exegesis/lib/SnippetGenerator.h

40 ↗

(On Diff #165069)

I see. Never mind then.

llvm/trunk/tools/llvm-exegesis/lib/BenchmarkCode.h

+//===-- BenchmarkCode.h -----------------------------------------*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_TOOLS_LLVM_EXEGESIS_BENCHMARKCODE_H
+#define LLVM_TOOLS_LLVM_EXEGESIS_BENCHMARKCODE_H
+
+#include "llvm/MC/MCInst.h"
+#include <string>
+#include <vector>
+
+namespace exegesis {
+
+// A collection of instructions that are to be assembled, executed and measured.
+struct BenchmarkCode {
+  // The sequence of instructions that are to be repeated.
+  std::vector<llvm::MCInst> Instructions;
+
+  // Before the code is executed some instructions are added to setup the
+  // registers initial values.
+  std::vector<unsigned> RegsToDef;
+
+  // We also need to provide the registers that are live on entry for the
+  // assembler to generate proper prologue/epilogue.
+  std::vector<unsigned> LiveIns;
+
+  // Informations about how this configuration was built.
+  std::string Info;
+};
+
+} // namespace exegesis
+
+#endif // LLVM_TOOLS_LLVM_EXEGESIS_BENCHMARKCODE_H

llvm/trunk/tools/llvm-exegesis/lib/BenchmarkRunner.h

 /// property of instructions (e.g. latency).
 ///
 //===----------------------------------------------------------------------===//
 
 #ifndef LLVM_TOOLS_LLVM_EXEGESIS_BENCHMARKRUNNER_H
 #define LLVM_TOOLS_LLVM_EXEGESIS_BENCHMARKRUNNER_H
 
 #include "Assembler.h"
+#include "BenchmarkCode.h"
 #include "BenchmarkResult.h"
 #include "LlvmState.h"
 #include "MCInstrDescView.h"
-#include "RegisterAliasing.h"
 #include "llvm/MC/MCInst.h"
 #include "llvm/Support/Error.h"
 #include <cstdlib>
 #include <memory>
 #include <vector>
 
 namespace exegesis {
 
 // A class representing failures that happened during Benchmark, they are used
 // to report informations to the user.
 class BenchmarkFailure : public llvm::StringError {
 public:
   BenchmarkFailure(const llvm::Twine &S);
 };
 
-// A collection of instructions that are to be assembled, executed and measured.
-struct BenchmarkCode {
-  // The sequence of instructions that are to be repeated.
-  std::vector<llvm::MCInst> Instructions;
-
-  // Before the code is executed some instructions are added to setup the
-  // registers initial values.
-  std::vector<unsigned> RegsToDef;
-
-  // We also need to provide the registers that are live on entry for the
-  // assembler to generate proper prologue/epilogue.
-  std::vector<unsigned> LiveIns;
-
-  // Informations about how this configuration was built.
-  std::string Info;
-};
-
 // Common code for all benchmark modes.
 class BenchmarkRunner {
 public:
   explicit BenchmarkRunner(const LLVMState &State,
                            InstructionBenchmark::ModeE Mode);
 
   virtual ~BenchmarkRunner();
 
-  llvm::Expected<std::vector<InstructionBenchmark>>
-  run(unsigned Opcode, unsigned NumRepetitions);
-
-  // Given a snippet, computes which registers the setup code needs to define.
-  std::vector<unsigned>
-  computeRegsToDef(const std::vector<InstructionBuilder> &Snippet) const;
+  InstructionBenchmark runConfiguration(const BenchmarkCode &Configuration,
+                                        unsigned NumRepetitions) const;
 
   // Scratch space to run instructions that touch memory.
   struct ScratchSpace {
     static constexpr const size_t kAlignment = 1024;
     static constexpr const size_t kSize = 1 << 20; // 1MB.
     ScratchSpace()
         : UnalignedPtr(llvm::make_unique<char[]>(kSize + kAlignment)),
           AlignedPtr(
               UnalignedPtr.get() + kAlignment -
               (reinterpret_cast<intptr_t>(UnalignedPtr.get()) % kAlignment)) {}
     char *ptr() const { return AlignedPtr; }
     void clear() { std::memset(ptr(), 0, kSize); }
 
   private:
     const std::unique_ptr<char[]> UnalignedPtr;
     char *const AlignedPtr;
   };
 
 protected:
   const LLVMState &State;
-  const RegisterAliasingTrackerCache RATC;
-
-  // Generates a single code template that has a self-dependency.
-  llvm::Expected<CodeTemplate>
-  generateSelfAliasingCodeTemplate(const Instruction &Instr) const;
-  // Generates a single code template without assignment constraints.
-  llvm::Expected<CodeTemplate>
-  generateUnconstrainedCodeTemplate(const Instruction &Instr,
-                                    llvm::StringRef Msg) const;
 
 private:
-  // API to be implemented by subclasses.
-  virtual llvm::Expected<CodeTemplate>
-  generateCodeTemplate(unsigned Opcode) const = 0;
-
   virtual std::vector<BenchmarkMeasure>
   runMeasurements(const ExecutableFunction &EF, ScratchSpace &Scratch,
                   const unsigned NumRepetitions) const = 0;
 
-  // Internal helpers.
-  InstructionBenchmark runConfiguration(const BenchmarkCode &Configuration,
-                                        unsigned NumRepetitions) const;
-
-  // Calls generateCodeTemplate and expands it into one or more BenchmarkCode.
-  llvm::Expected<std::vector<BenchmarkCode>>
-  generateConfigurations(unsigned Opcode) const;
-
   llvm::Expected<std::string>
   writeObjectFile(const BenchmarkCode &Configuration,
                   llvm::ArrayRef<llvm::MCInst> Code) const;
 
   const InstructionBenchmark::ModeE Mode;
 
   const std::unique_ptr<ScratchSpace> Scratch;
 };
 
 } // namespace exegesis
 
 #endif // LLVM_TOOLS_LLVM_EXEGESIS_BENCHMARKRUNNER_H

llvm/trunk/tools/llvm-exegesis/lib/BenchmarkRunner.cpp

 
 #include "Assembler.h"
 #include "BenchmarkRunner.h"
 #include "MCInstrDescView.h"
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringRef.h"
 #include "llvm/ADT/Twine.h"
 #include "llvm/Support/FileSystem.h"
-#include "llvm/Support/FormatVariadic.h"
 #include "llvm/Support/MemoryBuffer.h"
 #include "llvm/Support/Program.h"
 
 namespace exegesis {
 
 BenchmarkFailure::BenchmarkFailure(const llvm::Twine &S)
     : llvm::StringError(S, llvm::inconvertibleErrorCode()) {}
 
 BenchmarkRunner::BenchmarkRunner(const LLVMState &State,
                                  InstructionBenchmark::ModeE Mode)
-    : State(State), RATC(State.getRegInfo(),
-                         getFunctionReservedRegs(State.getTargetMachine())),
-      Mode(Mode), Scratch(llvm::make_unique<ScratchSpace>()) {}
+    : State(State), Mode(Mode), Scratch(llvm::make_unique<ScratchSpace>()) {}
 
 BenchmarkRunner::~BenchmarkRunner() = default;
 
-llvm::Expected<std::vector<InstructionBenchmark>>
-BenchmarkRunner::run(unsigned Opcode, unsigned NumRepetitions) {
-  const llvm::MCInstrDesc &InstrDesc = State.getInstrInfo().get(Opcode);
-  // Ignore instructions that we cannot run.
-  if (InstrDesc.isPseudo())
-    return llvm::make_error<BenchmarkFailure>("Unsupported opcode: isPseudo");
-  if (InstrDesc.isBranch() || InstrDesc.isIndirectBranch())
-    return llvm::make_error<BenchmarkFailure>(
-        "Unsupported opcode: isBranch/isIndirectBranch");
-  if (InstrDesc.isCall() || InstrDesc.isReturn())
-    return llvm::make_error<BenchmarkFailure>(
-        "Unsupported opcode: isCall/isReturn");
-
-  llvm::Expected<std::vector<BenchmarkCode>> ConfigurationOrError =
-      generateConfigurations(Opcode);
-
-  if (llvm::Error E = ConfigurationOrError.takeError())
-    return std::move(E);
-
-  std::vector<InstructionBenchmark> InstrBenchmarks;
-  for (const BenchmarkCode &Conf : ConfigurationOrError.get())
-    InstrBenchmarks.push_back(runConfiguration(Conf, NumRepetitions));
-  return InstrBenchmarks;
-}
-
 // Repeat the snippet until there are at least NumInstructions in the resulting
 // code.
 static std::vector<llvm::MCInst>
 GenerateInstructions(const BenchmarkCode &BC, const int MinInstructions) {
   std::vector<llvm::MCInst> Code = BC.Instructions;
   for (int I = 0; I < MinInstructions; ++I)
     Code.push_back(BC.Instructions[I % BC.Instructions.size()]);
   return Code;
llvm::outs() << "Check generated assembly with: /usr/bin/objdump -d "
                << *ObjectFilePath << "\n";
   const ExecutableFunction EF(State.createTargetMachine(),
                               getObjectFromFile(*ObjectFilePath));
   InstrBenchmark.Measurements = runMeasurements(EF, *Scratch, NumRepetitions);
 
   return InstrBenchmark;
 }
 
-llvm::Expected<std::vector<BenchmarkCode>>
-BenchmarkRunner::generateConfigurations(unsigned Opcode) const {
-  if (auto E = generateCodeTemplate(Opcode)) {
-    CodeTemplate &CT = E.get();
-    std::vector<BenchmarkCode> Output;
-    // TODO: Generate as many BenchmarkCode as needed.
-    {
-      BenchmarkCode BC;
-      BC.Info = CT.Info;
-      for (InstructionBuilder &IB : CT.Instructions) {
-        IB.randomizeUnsetVariables(
-            CT.ScratchSpacePointerInReg
-                ? RATC.getRegister(CT.ScratchSpacePointerInReg).aliasedBits()
-                : RATC.emptyRegisters());
-        BC.Instructions.push_back(IB.build());
-      }
-      if (CT.ScratchSpacePointerInReg)
-        BC.LiveIns.push_back(CT.ScratchSpacePointerInReg);
-      BC.RegsToDef = computeRegsToDef(CT.Instructions);
-      Output.push_back(std::move(BC));
-    }
-    return Output;
-  } else
-    return E.takeError();
-}
-
-std::vector<unsigned> BenchmarkRunner::computeRegsToDef(
-    const std::vector<InstructionBuilder> &Instructions) const {
-  // Collect all register uses and create an assignment for each of them.
-  // Ignore memory operands which are handled separately.
-  // Loop invariant: DefinedRegs[i] is true iif it has been set at least once
-  // before the current instruction.
-  llvm::BitVector DefinedRegs = RATC.emptyRegisters();
-  std::vector<unsigned> RegsToDef;
-  for (const InstructionBuilder &IB : Instructions) {
-    // Returns the register that this Operand sets or uses, or 0 if this is not
-    // a register.
-    const auto GetOpReg = [&IB](const Operand &Op) -> unsigned {
-      if (Op.IsMem)
-        return 0;
-      if (Op.ImplicitReg)
-        return *Op.ImplicitReg;
-      if (Op.IsExplicit && IB.getValueFor(Op).isReg())
-        return IB.getValueFor(Op).getReg();
-      return 0;
-    };
-    // Collect used registers that have never been def'ed.
-    for (const Operand &Op : IB.Instr.Operands) {
-      if (!Op.IsDef) {
-        const unsigned Reg = GetOpReg(Op);
-        if (Reg > 0 && !DefinedRegs.test(Reg)) {
-          RegsToDef.push_back(Reg);
-          DefinedRegs.set(Reg);
-        }
-      }
-    }
-    // Mark defs as having been def'ed.
-    for (const Operand &Op : IB.Instr.Operands) {
-      if (Op.IsDef) {
-        const unsigned Reg = GetOpReg(Op);
-        if (Reg > 0)
-          DefinedRegs.set(Reg);
-      }
-    }
-  }
-  return RegsToDef;
-}
-
 llvm::Expected<std::string>
 BenchmarkRunner::writeObjectFile(const BenchmarkCode &BC,
                                  llvm::ArrayRef<llvm::MCInst> Code) const {
   int ResultFD = 0;
   llvm::SmallString<256> ResultPath;
   if (llvm::Error E = llvm::errorCodeToError(llvm::sys::fs::createTemporaryFile(
           "snippet", "o", ResultFD, ResultPath)))
     return std::move(E);
   llvm::raw_fd_ostream OFS(ResultFD, true /*ShouldClose*/);
   assembleToStream(State.getExegesisTarget(), State.createTargetMachine(),
                    BC.LiveIns, BC.RegsToDef, Code, OFS);
   return ResultPath.str();
 }
 
-llvm::Expected<CodeTemplate> BenchmarkRunner::generateSelfAliasingCodeTemplate(
-    const Instruction &Instr) const {
-  const AliasingConfigurations SelfAliasing(Instr, Instr);
-  if (SelfAliasing.empty()) {
-    return llvm::make_error<BenchmarkFailure>("empty self aliasing");
-  }
-  CodeTemplate CT;
-  InstructionBuilder IB(Instr);
-  if (SelfAliasing.hasImplicitAliasing()) {
-    CT.Info = "implicit Self cycles, picking random values.";
-  } else {
-    CT.Info = "explicit self cycles, selecting one aliasing Conf.";
-    // This is a self aliasing instruction so defs and uses are from the same
-    // instance, hence twice IB in the following call.
-    setRandomAliasing(SelfAliasing, IB, IB);
-  }
-  CT.Instructions.push_back(std::move(IB));
-  return std::move(CT);
-}
-
-llvm::Expected<CodeTemplate>
-BenchmarkRunner::generateUnconstrainedCodeTemplate(const Instruction &Instr,
-                                                   llvm::StringRef Msg) const {
-  CodeTemplate CT;
-  CT.Info = llvm::formatv("{0}, repeating an unconstrained assignment", Msg);
-  CT.Instructions.emplace_back(Instr);
-  return std::move(CT);
-}
 } // namespace exegesis

llvm/trunk/tools/llvm-exegesis/lib/CMakeLists.txt

add_library(LLVMExegesis
   BenchmarkResult.cpp
   BenchmarkRunner.cpp
   Clustering.cpp
   Latency.cpp
   LlvmState.cpp
   MCInstrDescView.cpp
   PerfHelper.cpp
   RegisterAliasing.cpp
+  SnippetGenerator.cpp
   Target.cpp
   Uops.cpp
   )
 
 llvm_update_compile_flags(LLVMExegesis)
 llvm_map_components_to_libnames(libs
   Analysis
   CodeGen

llvm/trunk/tools/llvm-exegesis/lib/Latency.h

 ///
 //===----------------------------------------------------------------------===//
 
 #ifndef LLVM_TOOLS_LLVM_EXEGESIS_LATENCY_H
 #define LLVM_TOOLS_LLVM_EXEGESIS_LATENCY_H
 
 #include "BenchmarkRunner.h"
 #include "MCInstrDescView.h"
+#include "SnippetGenerator.h"
 
 namespace exegesis {
 
-class LatencyBenchmarkRunner : public BenchmarkRunner {
+class LatencySnippetGenerator : public SnippetGenerator {
 public:
-  LatencyBenchmarkRunner(const LLVMState &State)
-      : BenchmarkRunner(State, InstructionBenchmark::Latency) {}
-  ~LatencyBenchmarkRunner() override;
+  LatencySnippetGenerator(const LLVMState &State) : SnippetGenerator(State) {}
+  ~LatencySnippetGenerator() override;
 
   llvm::Expected<CodeTemplate>
   generateCodeTemplate(unsigned Opcode) const override;
 
 private:
   llvm::Error isInfeasible(const llvm::MCInstrDesc &MCInstrDesc) const;
 
   llvm::Expected<CodeTemplate>
   generateTwoInstructionPrototype(const Instruction &Instr) const;
+};
 
+class LatencyBenchmarkRunner : public BenchmarkRunner {
+public:
+  LatencyBenchmarkRunner(const LLVMState &State)
+      : BenchmarkRunner(State, InstructionBenchmark::Latency) {}
+  ~LatencyBenchmarkRunner() override;
+
+private:
   std::vector<BenchmarkMeasure>
   runMeasurements(const ExecutableFunction &EF, ScratchSpace &Scratch,
                   const unsigned NumRepetitions) const override;
 
   virtual const char *getCounterName() const;
 };
-
 } // namespace exegesis
 
 #endif // LLVM_TOOLS_LLVM_EXEGESIS_LATENCY_H

llvm/trunk/tools/llvm-exegesis/lib/Latency.cpp

static bool hasUnknownOperand(const llvm::MCOperandInfo &OpInfo) {
   return OpInfo.OperandType == llvm::MCOI::OPERAND_UNKNOWN;
 }
 
 // FIXME: Handle memory, see PR36905.
 static bool hasMemoryOperand(const llvm::MCOperandInfo &OpInfo) {
   return OpInfo.OperandType == llvm::MCOI::OPERAND_MEMORY;
 }
 
-LatencyBenchmarkRunner::~LatencyBenchmarkRunner() = default;
+LatencySnippetGenerator::~LatencySnippetGenerator() = default;
 
-llvm::Error LatencyBenchmarkRunner::isInfeasible(
+llvm::Error LatencySnippetGenerator::isInfeasible(
     const llvm::MCInstrDesc &MCInstrDesc) const {
   if (llvm::any_of(MCInstrDesc.operands(), hasUnknownOperand))
     return llvm::make_error<BenchmarkFailure>(
         "Infeasible : has unknown operands");
   if (llvm::any_of(MCInstrDesc.operands(), hasMemoryOperand))
     return llvm::make_error<BenchmarkFailure>(
         "Infeasible : has memory operands");
   return llvm::Error::success();
 }
 
 llvm::Expected<CodeTemplate>
-LatencyBenchmarkRunner::generateTwoInstructionPrototype(
+LatencySnippetGenerator::generateTwoInstructionPrototype(
     const Instruction &Instr) const {
   std::vector<unsigned> Opcodes;
   Opcodes.resize(State.getInstrInfo().getNumOpcodes());
   std::iota(Opcodes.begin(), Opcodes.end(), 0U);
   std::shuffle(Opcodes.begin(), Opcodes.end(), randomGenerator());
   for (const unsigned OtherOpcode : Opcodes) {
     if (OtherOpcode == Instr.Description->Opcode)
       continue;
for (const unsigned OtherOpcode : Opcodes) {
     CT.Instructions.push_back(std::move(OtherIB));
     return std::move(CT);
   }
   return llvm::make_error<BenchmarkFailure>(
       "Infeasible : Didn't find any scheme to make the instruction serial");
 }
 
 llvm::Expected<CodeTemplate>
-LatencyBenchmarkRunner::generateCodeTemplate(unsigned Opcode) const {
+LatencySnippetGenerator::generateCodeTemplate(unsigned Opcode) const {
   const auto &InstrDesc = State.getInstrInfo().get(Opcode);
   if (auto E = isInfeasible(InstrDesc))
     return std::move(E);
   const Instruction Instr(InstrDesc, RATC);
   if (auto CT = generateSelfAliasingCodeTemplate(Instr))
     return CT;
   else
     llvm::consumeError(CT.takeError());
   // No self aliasing, trying to create a dependency through another opcode.
   return generateTwoInstructionPrototype(Instr);
 }
 
 const char *LatencyBenchmarkRunner::getCounterName() const {
   if (!State.getSubtargetInfo().getSchedModel().hasExtraProcessorInfo())
     llvm::report_fatal_error("sched model is missing extra processor info!");
   const char *CounterName = State.getSubtargetInfo()
                                 .getSchedModel()
                                 .getExtraProcessorInfo()
                                 .PfmCounters.CycleCounter;
   if (!CounterName)
     llvm::report_fatal_error("sched model does not define a cycle counter");
   return CounterName;
 }
 
+LatencyBenchmarkRunner::~LatencyBenchmarkRunner() = default;
+
 std::vector<BenchmarkMeasure>
 LatencyBenchmarkRunner::runMeasurements(const ExecutableFunction &Function,
                                         ScratchSpace &Scratch,
                                         const unsigned NumRepetitions) const {
   // Cycle measurements include some overhead from the kernel. Repeat the
   // measure several times and take the minimum value.
   constexpr const int NumMeasurements = 30;
   int64_t MinLatency = std::numeric_limits<int64_t>::max();

llvm/trunk/tools/llvm-exegesis/lib/SnippetGenerator.h

+//===-- SnippetGenerator.h --------------------------------------*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+///
+/// \file
+/// Defines the abstract SnippetGenerator class for generating code that allows
+/// measuring a certain property of instructions (e.g. latency).
+///
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_TOOLS_LLVM_EXEGESIS_SNIPPETGENERATOR_H
+#define LLVM_TOOLS_LLVM_EXEGESIS_SNIPPETGENERATOR_H
+
+#include "Assembler.h"
+#include "BenchmarkCode.h"
+#include "LlvmState.h"
+#include "MCInstrDescView.h"
+#include "RegisterAliasing.h"
+#include "llvm/MC/MCInst.h"
+#include "llvm/Support/Error.h"
+#include <cstdlib>
+#include <memory>
+#include <vector>
+
+namespace exegesis {
+
+// A class representing failures that happened during Benchmark, they are used
+// to report informations to the user.
+class SnippetGeneratorFailure : public llvm::StringError {
+public:
+  SnippetGeneratorFailure(const llvm::Twine &S);
+};
+
+// Common code for all benchmark modes.
+class SnippetGenerator {
+public:
+  explicit SnippetGenerator(const LLVMState &State);
+
+  virtual ~SnippetGenerator();
+
+  // Calls generateCodeTemplate and expands it into one or more BenchmarkCode.
+  llvm::Expected<std::vector<BenchmarkCode>>
+  generateConfigurations(unsigned Opcode) const;
+
+  // Given a snippet, computes which registers the setup code needs to define.
+  std::vector<unsigned>
+  computeRegsToDef(const std::vector<InstructionBuilder> &Snippet) const;
+
+protected:
+  const LLVMState &State;
+  const RegisterAliasingTrackerCache RATC;
+
+  // Generates a single code template that has a self-dependency.
+  llvm::Expected<CodeTemplate>
+  generateSelfAliasingCodeTemplate(const Instruction &Instr) const;
+  // Generates a single code template without assignment constraints.
+  llvm::Expected<CodeTemplate>
+  generateUnconstrainedCodeTemplate(const Instruction &Instr,
+                                    llvm::StringRef Msg) const;
+
+private:
+  // API to be implemented by subclasses.
+  virtual llvm::Expected<CodeTemplate>
+  generateCodeTemplate(unsigned Opcode) const = 0;
+};
+
+} // namespace exegesis
+
+#endif // LLVM_TOOLS_LLVM_EXEGESIS_SNIPPETGENERATOR_H

llvm/trunk/tools/llvm-exegesis/lib/SnippetGenerator.cpp

+//===-- SnippetGenerator.cpp ------------------------------------*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include <array>
+#include <string>
+
+#include "Assembler.h"
+#include "MCInstrDescView.h"
+#include "SnippetGenerator.h"
+#include "llvm/ADT/StringExtras.h"
+#include "llvm/ADT/StringRef.h"
+#include "llvm/ADT/Twine.h"
+#include "llvm/Support/FileSystem.h"
+#include "llvm/Support/FormatVariadic.h"
+#include "llvm/Support/Program.h"
+
+namespace exegesis {
+
+SnippetGeneratorFailure::SnippetGeneratorFailure(const llvm::Twine &S)
+    : llvm::StringError(S, llvm::inconvertibleErrorCode()) {}
+
+SnippetGenerator::SnippetGenerator(const LLVMState &State)
+    : State(State), RATC(State.getRegInfo(),
+                         getFunctionReservedRegs(State.getTargetMachine())) {}
+
+SnippetGenerator::~SnippetGenerator() = default;
+
+llvm::Expected<std::vector<BenchmarkCode>>
+SnippetGenerator::generateConfigurations(unsigned Opcode) const {
+  if (auto E = generateCodeTemplate(Opcode)) {
+    CodeTemplate &CT = E.get();
+    std::vector<BenchmarkCode> Output;
+    // TODO: Generate as many BenchmarkCode as needed.
+    {
+      BenchmarkCode BC;
+      BC.Info = CT.Info;
+      for (InstructionBuilder &IB : CT.Instructions) {
+        IB.randomizeUnsetVariables(
+            CT.ScratchSpacePointerInReg
+                ? RATC.getRegister(CT.ScratchSpacePointerInReg).aliasedBits()
+                : RATC.emptyRegisters());
+        BC.Instructions.push_back(IB.build());
+      }
+      if (CT.ScratchSpacePointerInReg)
+        BC.LiveIns.push_back(CT.ScratchSpacePointerInReg);
+      BC.RegsToDef = computeRegsToDef(CT.Instructions);
+      Output.push_back(std::move(BC));
+    }
+    return Output;
+  } else
+    return E.takeError();
+}
+
+std::vector<unsigned> SnippetGenerator::computeRegsToDef(
+    const std::vector<InstructionBuilder> &Instructions) const {
+  // Collect all register uses and create an assignment for each of them.
+  // Ignore memory operands which are handled separately.
+  // Loop invariant: DefinedRegs[i] is true iif it has been set at least once
+  // before the current instruction.
+  llvm::BitVector DefinedRegs = RATC.emptyRegisters();
+  std::vector<unsigned> RegsToDef;
+  for (const InstructionBuilder &IB : Instructions) {
+    // Returns the register that this Operand sets or uses, or 0 if this is not
+    // a register.
+    const auto GetOpReg = [&IB](const Operand &Op) -> unsigned {
+      if (Op.IsMem)
+        return 0;
+      if (Op.ImplicitReg)
+        return *Op.ImplicitReg;
+      if (Op.IsExplicit && IB.getValueFor(Op).isReg())
+        return IB.getValueFor(Op).getReg();
+      return 0;
+    };
+    // Collect used registers that have never been def'ed.
+    for (const Operand &Op : IB.Instr.Operands) {
+      if (!Op.IsDef) {
+        const unsigned Reg = GetOpReg(Op);
+        if (Reg > 0 && !DefinedRegs.test(Reg)) {
+          RegsToDef.push_back(Reg);
+          DefinedRegs.set(Reg);
+        }
+      }
+    }
+    // Mark defs as having been def'ed.
+    for (const Operand &Op : IB.Instr.Operands) {
+      if (Op.IsDef) {
+        const unsigned Reg = GetOpReg(Op);
+        if (Reg > 0)
+          DefinedRegs.set(Reg);
+      }
+    }
+  }
+  return RegsToDef;
+}
+
+llvm::Expected<CodeTemplate> SnippetGenerator::generateSelfAliasingCodeTemplate(
+    const Instruction &Instr) const {
+  const AliasingConfigurations SelfAliasing(Instr, Instr);
+  if (SelfAliasing.empty()) {
+    return llvm::make_error<SnippetGeneratorFailure>("empty self aliasing");
+  }
+  CodeTemplate CT;
+  InstructionBuilder IB(Instr);
+  if (SelfAliasing.hasImplicitAliasing()) {
+    CT.Info = "implicit Self cycles, picking random values.";
+  } else {
+    CT.Info = "explicit self cycles, selecting one aliasing Conf.";
+    // This is a self aliasing instruction so defs and uses are from the same
+    // instance, hence twice IB in the following call.
+    setRandomAliasing(SelfAliasing, IB, IB);
+  }
+  CT.Instructions.push_back(std::move(IB));
+  return std::move(CT);
+}
+
+llvm::Expected<CodeTemplate>
+SnippetGenerator::generateUnconstrainedCodeTemplate(const Instruction &Instr,
+                                                    llvm::StringRef Msg) const {
+  CodeTemplate CT;
+  CT.Info = llvm::formatv("{0}, repeating an unconstrained assignment", Msg);
+  CT.Instructions.emplace_back(Instr);
+  return std::move(CT);
+}
+} // namespace exegesis

llvm/trunk/tools/llvm-exegesis/lib/Target.h

 //===----------------------------------------------------------------------===//
 
 #ifndef LLVM_TOOLS_LLVM_EXEGESIS_TARGET_H
 #define LLVM_TOOLS_LLVM_EXEGESIS_TARGET_H
 
 #include "BenchmarkResult.h"
 #include "BenchmarkRunner.h"
 #include "LlvmState.h"
+#include "SnippetGenerator.h"
 #include "llvm/ADT/Triple.h"
 #include "llvm/CodeGen/TargetPassConfig.h"
 #include "llvm/IR/CallingConv.h"
 #include "llvm/IR/LegacyPassManager.h"
 #include "llvm/MC/MCInst.h"
 #include "llvm/MC/MCRegisterInfo.h"
 
 namespace exegesis {
public:
 
   // Returns the maximum number of bytes a load/store instruction can access at
   // once. This is typically the size of the largest register available on the
   // processor. Note that this only used as a hint to generate independant
   // load/stores to/from memory, so the exact returned value does not really
   // matter as long as it's large enough.
   virtual unsigned getMaxMemoryAccessSize() const { return 0; }
 
+  // Creates a snippet generator for the given mode.
+  std::unique_ptr<SnippetGenerator>
+  createSnippetGenerator(InstructionBenchmark::ModeE Mode,
+                         const LLVMState &State) const;
   // Creates a benchmark runner for the given mode.
   std::unique_ptr<BenchmarkRunner>
   createBenchmarkRunner(InstructionBenchmark::ModeE Mode,
                         const LLVMState &State) const;
 
   // Returns the ExegesisTarget for the given triple or nullptr if the target
   // does not exist.
   static const ExegesisTarget *lookup(llvm::Triple TT);
   // Returns the default (unspecialized) ExegesisTarget.
   static const ExegesisTarget &getDefault();
   // Registers a target. Not thread safe.
   static void registerTarget(ExegesisTarget *T);
 
   virtual ~ExegesisTarget();
 
 private:
   virtual bool matchesArch(llvm::Triple::ArchType Arch) const = 0;
 
-  // Targets can implement their own Latency/Uops benchmarks runners by
+  // Targets can implement their own snippet generators/benchmarks runners by
   // implementing these.
+  std::unique_ptr<SnippetGenerator> virtual createLatencySnippetGenerator(
+      const LLVMState &State) const;
+  std::unique_ptr<SnippetGenerator> virtual createUopsSnippetGenerator(
+      const LLVMState &State) const;
   std::unique_ptr<BenchmarkRunner> virtual createLatencyBenchmarkRunner(
       const LLVMState &State) const;
   std::unique_ptr<BenchmarkRunner> virtual createUopsBenchmarkRunner(
       const LLVMState &State) const;
 
   const ExegesisTarget *Next = nullptr;
 };
 
 } // namespace exegesis
 
 #endif // LLVM_TOOLS_LLVM_EXEGESIS_TARGET_H

llvm/trunk/tools/llvm-exegesis/lib/Target.cpp

if (FirstTarget == nullptr) {
     return;
   }
   if (Target->Next != nullptr)
     return; // Already registered.
   Target->Next = FirstTarget;
   FirstTarget = Target;
 }
 
+std::unique_ptr<SnippetGenerator>
+ExegesisTarget::createSnippetGenerator(InstructionBenchmark::ModeE Mode,
+                                       const LLVMState &State) const {
+  switch (Mode) {
+  case InstructionBenchmark::Unknown:
+    return nullptr;
+  case InstructionBenchmark::Latency:
+    return createLatencySnippetGenerator(State);
+  case InstructionBenchmark::Uops:
+    return createUopsSnippetGenerator(State);
+  }
+  return nullptr;
+}
+
 std::unique_ptr<BenchmarkRunner>
 ExegesisTarget::createBenchmarkRunner(InstructionBenchmark::ModeE Mode,
                                       const LLVMState &State) const {
   switch (Mode) {
   case InstructionBenchmark::Unknown:
     return nullptr;
   case InstructionBenchmark::Latency:
     return createLatencyBenchmarkRunner(State);
   case InstructionBenchmark::Uops:
     return createUopsBenchmarkRunner(State);
   }
   return nullptr;
 }
 
+std::unique_ptr<SnippetGenerator>
+ExegesisTarget::createLatencySnippetGenerator(const LLVMState &State) const {
+  return llvm::make_unique<LatencySnippetGenerator>(State);
+}
+
+std::unique_ptr<SnippetGenerator>
+ExegesisTarget::createUopsSnippetGenerator(const LLVMState &State) const {
+  return llvm::make_unique<UopsSnippetGenerator>(State);
+}
+
 std::unique_ptr<BenchmarkRunner>
 ExegesisTarget::createLatencyBenchmarkRunner(const LLVMState &State) const {
   return llvm::make_unique<LatencyBenchmarkRunner>(State);
 }
 
 std::unique_ptr<BenchmarkRunner>
 ExegesisTarget::createUopsBenchmarkRunner(const LLVMState &State) const {
   return llvm::make_unique<UopsBenchmarkRunner>(State);

llvm/trunk/tools/llvm-exegesis/lib/Uops.h

 /// A BenchmarkRunner implementation to measure uop decomposition.
 ///
 //===----------------------------------------------------------------------===//
 
 #ifndef LLVM_TOOLS_LLVM_EXEGESIS_UOPS_H
 #define LLVM_TOOLS_LLVM_EXEGESIS_UOPS_H
 
 #include "BenchmarkRunner.h"
+#include "SnippetGenerator.h"
 
 namespace exegesis {
 
-class UopsBenchmarkRunner : public BenchmarkRunner {
+class UopsSnippetGenerator : public SnippetGenerator {
 public:
-  UopsBenchmarkRunner(const LLVMState &State)
-      : BenchmarkRunner(State, InstructionBenchmark::Uops) {}
-  ~UopsBenchmarkRunner() override;
+  UopsSnippetGenerator(const LLVMState &State) : SnippetGenerator(State) {}
+  ~UopsSnippetGenerator() override;
 
   llvm::Expected<CodeTemplate>
   generateCodeTemplate(unsigned Opcode) const override;
 
   static constexpr const size_t kMinNumDifferentAddresses = 6;
 
 private:
   llvm::Error isInfeasible(const llvm::MCInstrDesc &MCInstrDesc) const;
 
-  std::vector<BenchmarkMeasure>
-  runMeasurements(const ExecutableFunction &EF, ScratchSpace &Scratch,
-                  const unsigned NumRepetitions) const override;
-
   // Instantiates memory operands within a snippet.
   // To make computations as parallel as possible, we generate independant
   // memory locations for instructions that load and store. If there are less
   // than kMinNumDifferentAddresses in the original snippet, we duplicate
   // instructions until there are this number of instructions.
   // For example, assuming kMinNumDifferentAddresses=5 and
   // getMaxMemoryAccessSize()=64, if the original snippet is:
   //   mov eax, [memory]
private:
   //   mov eax, [rdi + 128]
   //   add eax, [rdi + 192]
   //   mov eax, [rdi + 256]
   void
   instantiateMemoryOperands(unsigned ScratchSpaceReg,
                             std::vector<InstructionBuilder> &Snippet) const;
 };
 
+class UopsBenchmarkRunner : public BenchmarkRunner {
+public:
+  UopsBenchmarkRunner(const LLVMState &State)
+      : BenchmarkRunner(State, InstructionBenchmark::Uops) {}
+  ~UopsBenchmarkRunner() override;
+
+  static constexpr const size_t kMinNumDifferentAddresses = 6;
+
+private:
+  std::vector<BenchmarkMeasure>
+  runMeasurements(const ExecutableFunction &EF, ScratchSpace &Scratch,
+                  const unsigned NumRepetitions) const override;
+};
+
 } // namespace exegesis
 
 #endif // LLVM_TOOLS_LLVM_EXEGESIS_UOPS_H

llvm/trunk/tools/llvm-exegesis/lib/Uops.cpp

 
 namespace exegesis {
 
 static bool hasUnknownOperand(const llvm::MCOperandInfo &OpInfo) {
   return OpInfo.OperandType == llvm::MCOI::OPERAND_UNKNOWN;
 }
 
 llvm::Error
-UopsBenchmarkRunner::isInfeasible(const llvm::MCInstrDesc &MCInstrDesc) const {
+UopsSnippetGenerator::isInfeasible(const llvm::MCInstrDesc &MCInstrDesc) const {
   if (llvm::any_of(MCInstrDesc.operands(), hasUnknownOperand))
     return llvm::make_error<BenchmarkFailure>(
         "Infeasible : has unknown operands");
   return llvm::Error::success();
 }
 
 // Returns whether this Variable ties Use and Def operands together.
 static bool hasTiedOperands(const Instruction &Instr, const Variable &Var) {

 
 static void remove(llvm::BitVector &a, const llvm::BitVector &b) {
   assert(a.size() == b.size());
   for (auto I : b.set_bits())
     a.reset(I);
 }
 
 UopsBenchmarkRunner::~UopsBenchmarkRunner() = default;
+UopsSnippetGenerator::~UopsSnippetGenerator() = default;
 
-void UopsBenchmarkRunner::instantiateMemoryOperands(
+void UopsSnippetGenerator::instantiateMemoryOperands(
     const unsigned ScratchSpacePointerInReg,
     std::vector<InstructionBuilder> &Instructions) const {
   if (ScratchSpacePointerInReg == 0)
     return; // no memory operands.
   const auto &ET = State.getExegesisTarget();
   const unsigned MemStep = ET.getMaxMemoryAccessSize();
   const size_t OriginalInstructionsSize = Instructions.size();
   size_t I = 0;
   for (InstructionBuilder &IB : Instructions) {
     ET.fillMemoryOperands(IB, ScratchSpacePointerInReg, I * MemStep);
     ++I;
   }
 
   while (Instructions.size() < kMinNumDifferentAddresses) {
     InstructionBuilder IB = Instructions[I % OriginalInstructionsSize];
     ET.fillMemoryOperands(IB, ScratchSpacePointerInReg, I * MemStep);
     ++I;
     Instructions.push_back(std::move(IB));
   }
-  assert(I * MemStep < ScratchSpace::kSize && "not enough scratch space");
+  assert(I * MemStep < BenchmarkRunner::ScratchSpace::kSize &&
+         "not enough scratch space");
 }
 
 llvm::Expected<CodeTemplate>
-UopsBenchmarkRunner::generateCodeTemplate(unsigned Opcode) const {
+UopsSnippetGenerator::generateCodeTemplate(unsigned Opcode) const {
   const auto &InstrDesc = State.getInstrInfo().get(Opcode);
   if (auto E = isInfeasible(InstrDesc))
     return std::move(E);
   const Instruction Instr(InstrDesc, RATC);
   const auto &ET = State.getExegesisTarget();
   CodeTemplate CT;
 
   const llvm::BitVector *ScratchSpaceAliasedRegs = nullptr;
for (unsigned ProcResIdx = 1;
     }
     Result.push_back({llvm::itostr(ProcResIdx),
                       static_cast<double>(CounterValue) / NumRepetitions,
                       SchedModel.getProcResource(ProcResIdx)->Name});
   }
   return Result;
 }
 
-constexpr const size_t UopsBenchmarkRunner::kMinNumDifferentAddresses;
+constexpr const size_t UopsSnippetGenerator::kMinNumDifferentAddresses;
 
 } // namespace exegesis

llvm/trunk/tools/llvm-exegesis/lib/X86/Target.cpp

 #include "X86Subtarget.h"
 #include "llvm/MC/MCInstBuilder.h"
 
 namespace exegesis {
 
 namespace {
 
 // Common code for X86 Uops and Latency runners.
-template <typename Impl> class X86BenchmarkRunner : public Impl {
+template <typename Impl> class X86SnippetGenerator : public Impl {
   using Impl::Impl;
 
   llvm::Expected<CodeTemplate>
   generateCodeTemplate(unsigned Opcode) const override {
     // Test whether we can generate a snippet for this instruction.
     const auto &InstrInfo = this->State.getInstrInfo();
     const auto OpcodeName = InstrInfo.getName(Opcode);
     if (OpcodeName.startswith("POPF") || OpcodeName.startswith("PUSHF") ||
default:
       llvm_unreachable("Unknown FP Type!");
     }
 
     // Fallback to generic implementation.
     return Impl::Base::generateCodeTemplate(Opcode);
   }
 };
 
-class X86LatencyImpl : public LatencyBenchmarkRunner {
+class X86LatencyImpl : public LatencySnippetGenerator {
 protected:
-  using Base = LatencyBenchmarkRunner;
+  using Base = LatencySnippetGenerator;
   using Base::Base;
   llvm::Expected<CodeTemplate> handleCompareFP(const Instruction &Instr) const {
-    return llvm::make_error<BenchmarkFailure>("Unsupported x87 CompareFP");
+    return llvm::make_error<SnippetGeneratorFailure>(
+        "Unsupported x87 CompareFP");
   }
   llvm::Expected<CodeTemplate> handleCondMovFP(const Instruction &Instr) const {
-    return llvm::make_error<BenchmarkFailure>("Unsupported x87 CondMovFP");
+    return llvm::make_error<SnippetGeneratorFailure>(
+        "Unsupported x87 CondMovFP");
   }
 };
 
-class X86UopsImpl : public UopsBenchmarkRunner {
+class X86UopsImpl : public UopsSnippetGenerator {
 protected:
-  using Base = UopsBenchmarkRunner;
+  using Base = UopsSnippetGenerator;
   using Base::Base;
   // We can compute uops for any FP instruction that does not grow or shrink the
   // stack (either do not touch the stack or push as much as they pop).
   llvm::Expected<CodeTemplate> handleCompareFP(const Instruction &Instr) const {
     return generateUnconstrainedCodeTemplate(
         Instr, "instruction does not grow/shrink the FP stack");
   }
   llvm::Expected<CodeTemplate> handleCondMovFP(const Instruction &Instr) const {
if (Reg == llvm::X86::EFLAGS) {
       Result.push_back(allocateStackSpace(8));
       Result.push_back(fillStackSpace(llvm::X86::MOV64mi32, 0, kImmValue));
       Result.push_back(llvm::MCInstBuilder(llvm::X86::POPF64)); // Also pops.
       return Result;
     }
     return {};
   }
 
-  std::unique_ptr<BenchmarkRunner>
-  createLatencyBenchmarkRunner(const LLVMState &State) const override {
-    return llvm::make_unique<X86BenchmarkRunner<X86LatencyImpl>>(State);
+  std::unique_ptr<SnippetGenerator>
+  createLatencySnippetGenerator(const LLVMState &State) const override {
+    return llvm::make_unique<X86SnippetGenerator<X86LatencyImpl>>(State);
   }
 
-  std::unique_ptr<BenchmarkRunner>
-  createUopsBenchmarkRunner(const LLVMState &State) const override {
-    return llvm::make_unique<X86BenchmarkRunner<X86UopsImpl>>(State);
+  std::unique_ptr<SnippetGenerator>
+  createUopsSnippetGenerator(const LLVMState &State) const override {
+    return llvm::make_unique<X86SnippetGenerator<X86UopsImpl>>(State);
   }
 
   bool matchesArch(llvm::Triple::ArchType Arch) const override {
     return Arch == llvm::Triple::x86_64 || Arch == llvm::Triple::x86;
   }
 
 private:
   // setRegToConstant() specialized for a vector register of size

llvm/trunk/tools/llvm-exegesis/llvm-exegesis.cpp

getBenchmarkResultContext(const LLVMState &State) {
 
   const llvm::MCRegisterInfo &RegInfo = State.getRegInfo();
   for (unsigned E = RegInfo.getNumRegs(), I = 0; I < E; ++I)
     Ctx.addRegEntry(I, RegInfo.getName(I));
 
   return Ctx;
 }
 
+// Generates code snippets for opcode `Opcode`.
+llvm::Expected<std::vector<BenchmarkCode>>
+generateSnippets(const LLVMState &State, unsigned Opcode,
+                 unsigned NumRepetitions) {
+  const std::unique_ptr<SnippetGenerator> Generator =
+      State.getExegesisTarget().createSnippetGenerator(BenchmarkMode, State);
+  if (!Generator) {
+    llvm::report_fatal_error("cannot create snippet generator");
+  }
+
+  const llvm::MCInstrDesc &InstrDesc = State.getInstrInfo().get(Opcode);
+  // Ignore instructions that we cannot run.
+  if (InstrDesc.isPseudo())
+    return llvm::make_error<BenchmarkFailure>("Unsupported opcode: isPseudo");
+  if (InstrDesc.isBranch() || InstrDesc.isIndirectBranch())
+    return llvm::make_error<BenchmarkFailure>(
+        "Unsupported opcode: isBranch/isIndirectBranch");
+  if (InstrDesc.isCall() || InstrDesc.isReturn())
+    return llvm::make_error<BenchmarkFailure>(
+        "Unsupported opcode: isCall/isReturn");
+
+  return Generator->generateConfigurations(Opcode);
+}
+
 void benchmarkMain() {
   if (exegesis::pfm::pfmInitialize())
     llvm::report_fatal_error("cannot initialize libpfm");
 
   llvm::InitializeNativeTarget();
   llvm::InitializeNativeTargetAsmPrinter();
 #ifdef LLVM_EXEGESIS_INITIALIZE_NATIVE_TARGET
   LLVM_EXEGESIS_INITIALIZE_NATIVE_TARGET();
 #endif
 
   const LLVMState State;
   const auto Opcode = GetOpcodeOrDie(State.getInstrInfo());
 
   // Ignore instructions without a sched class if -ignore-invalid-sched-class is
   // passed.
   if (IgnoreInvalidSchedClass &&
       State.getInstrInfo().get(Opcode).getSchedClass() == 0) {
     llvm::errs() << "ignoring instruction without sched class\n";
     return;
   }
 
+  // FIXME: Allow arbitrary code.
+  const std::vector<BenchmarkCode> Configurations =
+      ExitOnErr(generateSnippets(State, Opcode, NumRepetitions));
+
   const std::unique_ptr<BenchmarkRunner> Runner =
       State.getExegesisTarget().createBenchmarkRunner(BenchmarkMode, State);
   if (!Runner) {
     llvm::report_fatal_error("cannot create benchmark runner");
   }
 
   if (NumRepetitions == 0)
     llvm::report_fatal_error("--num-repetitions must be greater than zero");
 
   // Write to standard output if file is not set.
   if (BenchmarkFile.empty())
     BenchmarkFile = "-";
 
   const BenchmarkResultContext Context = getBenchmarkResultContext(State);
-  std::vector<InstructionBenchmark> Results =
-      ExitOnErr(Runner->run(Opcode, NumRepetitions));
-  for (InstructionBenchmark &Result : Results)
-    ExitOnErr(Result.writeYaml(Context, BenchmarkFile));
 
+  for (const BenchmarkCode &Conf : Configurations) {
+    InstructionBenchmark Result =
+        Runner->runConfiguration(Conf, NumRepetitions);
+    ExitOnErr(Result.writeYaml(Context, BenchmarkFile));
+  }
   exegesis::pfm::pfmTerminate();
 }
 
 // Prints the results of running analysis pass `Pass` to file `OutputFilename`
 // if OutputFilename is non-empty.
 template <typename Pass>
 static void maybeRunAnalysis(const Analysis &Analyzer, const std::string &Name,
                              const std::string &OutputFilename) {

llvm/trunk/unittests/tools/llvm-exegesis/X86/SnippetGeneratorTest.cpp

static void SetUpTestCase() {
     InitializeX86ExegesisTarget();
   }
 
   const LLVMState State;
   const llvm::MCInstrInfo &MCInstrInfo;
   const llvm::MCRegisterInfo &MCRegisterInfo;
 };
 
-template <typename BenchmarkRunner>
+template <typename SnippetGeneratorT>
 class SnippetGeneratorTest : public X86SnippetGeneratorTest {
 protected:
-  SnippetGeneratorTest() : Runner(State) {}
+  SnippetGeneratorTest() : Generator(State) {}
 
   CodeTemplate checkAndGetCodeTemplate(unsigned Opcode) {
     randomGenerator().seed(0); // Initialize seed.
-    auto CodeTemplateOrError = Runner.generateCodeTemplate(Opcode);
+    auto CodeTemplateOrError = Generator.generateCodeTemplate(Opcode);
     EXPECT_FALSE(CodeTemplateOrError.takeError()); // Valid configuration.
     return std::move(CodeTemplateOrError.get());
   }
 
-  BenchmarkRunner Runner;
+  SnippetGeneratorT Generator;
 };
 
-using LatencyBenchmarkRunnerTest = SnippetGeneratorTest<LatencyBenchmarkRunner>;
+using LatencySnippetGeneratorTest =
+    SnippetGeneratorTest<LatencySnippetGenerator>;
 
-using UopsBenchmarkRunnerTest = SnippetGeneratorTest<UopsBenchmarkRunner>;
+using UopsSnippetGeneratorTest = SnippetGeneratorTest<UopsSnippetGenerator>;
 
-TEST_F(LatencyBenchmarkRunnerTest, ImplicitSelfDependency) {
+TEST_F(LatencySnippetGeneratorTest, ImplicitSelfDependency) {
   // ADC16i16 self alias because of implicit use and def.
 
   // explicit use 0       : imm
   // implicit def         : AX
   // implicit def         : EFLAGS
   // implicit use         : AX
   // implicit use         : EFLAGS
   const unsigned Opcode = llvm::X86::ADC16i16;
   EXPECT_THAT(MCInstrInfo.get(Opcode).getImplicitDefs()[0], llvm::X86::AX);
   EXPECT_THAT(MCInstrInfo.get(Opcode).getImplicitDefs()[1], llvm::X86::EFLAGS);
   EXPECT_THAT(MCInstrInfo.get(Opcode).getImplicitUses()[0], llvm::X86::AX);
   EXPECT_THAT(MCInstrInfo.get(Opcode).getImplicitUses()[1], llvm::X86::EFLAGS);
   const CodeTemplate CT = checkAndGetCodeTemplate(Opcode);
   EXPECT_THAT(CT.Info, HasSubstr("implicit"));
   ASSERT_THAT(CT.Instructions, SizeIs(1));
   const InstructionBuilder &IB = CT.Instructions[0];
   EXPECT_THAT(IB.getOpcode(), Opcode);
   ASSERT_THAT(IB.VariableValues, SizeIs(1)); // Imm.
   EXPECT_THAT(IB.VariableValues[0], IsInvalid()) << "Immediate is not set";
 }
 
-TEST_F(LatencyBenchmarkRunnerTest, ExplicitSelfDependency) {
+TEST_F(LatencySnippetGeneratorTest, ExplicitSelfDependency) {
   // ADD16ri self alias because Op0 and Op1 are tied together.
 
   // explicit def 0       : reg RegClass=GR16
   // explicit use 1       : reg RegClass=GR16 | TIED_TO:0
   // explicit use 2       : imm
   // implicit def         : EFLAGS
   const unsigned Opcode = llvm::X86::ADD16ri;
   EXPECT_THAT(MCInstrInfo.get(Opcode).getImplicitDefs()[0], llvm::X86::EFLAGS);
   const CodeTemplate CT = checkAndGetCodeTemplate(Opcode);
   EXPECT_THAT(CT.Info, HasSubstr("explicit"));
   ASSERT_THAT(CT.Instructions, SizeIs(1));
   const InstructionBuilder &IB = CT.Instructions[0];
   EXPECT_THAT(IB.getOpcode(), Opcode);
   ASSERT_THAT(IB.VariableValues, SizeIs(2));
   EXPECT_THAT(IB.VariableValues[0], IsReg()) << "Operand 0 and 1";
   EXPECT_THAT(IB.VariableValues[1], IsInvalid()) << "Operand 2 is not set";
 }
 
-TEST_F(LatencyBenchmarkRunnerTest, DependencyThroughOtherOpcode) {
+TEST_F(LatencySnippetGeneratorTest, DependencyThroughOtherOpcode) {
   // CMP64rr
   // explicit use 0       : reg RegClass=GR64
   // explicit use 1       : reg RegClass=GR64
   // implicit def         : EFLAGS
 
   const unsigned Opcode = llvm::X86::CMP64rr;
   const CodeTemplate CT = checkAndGetCodeTemplate(Opcode);
   EXPECT_THAT(CT.Info, HasSubstr("cycle through"));
   ASSERT_THAT(CT.Instructions, SizeIs(2));
   const InstructionBuilder &IB = CT.Instructions[0];
   EXPECT_THAT(IB.getOpcode(), Opcode);
   ASSERT_THAT(IB.VariableValues, SizeIs(2));
   EXPECT_THAT(IB.VariableValues, AnyOf(ElementsAre(IsReg(), IsInvalid()),
                                        ElementsAre(IsInvalid(), IsReg())));
   EXPECT_THAT(CT.Instructions[1].getOpcode(), Not(Opcode));
   // TODO: check that the two instructions alias each other.
 }
 
-TEST_F(LatencyBenchmarkRunnerTest, LAHF) {
+TEST_F(LatencySnippetGeneratorTest, LAHF) {
   const unsigned Opcode = llvm::X86::LAHF;
   const CodeTemplate CT = checkAndGetCodeTemplate(Opcode);
   EXPECT_THAT(CT.Info, HasSubstr("cycle through"));
   ASSERT_THAT(CT.Instructions, SizeIs(2));
   const InstructionBuilder &IB = CT.Instructions[0];
   EXPECT_THAT(IB.getOpcode(), Opcode);
   ASSERT_THAT(IB.VariableValues, SizeIs(0));
 }
 
-TEST_F(UopsBenchmarkRunnerTest, ParallelInstruction) {
+TEST_F(UopsSnippetGeneratorTest, ParallelInstruction) {
   // BNDCL32rr is parallel no matter what.
 
   // explicit use 0       : reg RegClass=BNDR
   // explicit use 1       : reg RegClass=GR32
 
   const unsigned Opcode = llvm::X86::BNDCL32rr;
   const CodeTemplate CT = checkAndGetCodeTemplate(Opcode);
   EXPECT_THAT(CT.Info, HasSubstr("parallel"));
   ASSERT_THAT(CT.Instructions, SizeIs(1));
   const InstructionBuilder &IB = CT.Instructions[0];
   EXPECT_THAT(IB.getOpcode(), Opcode);
   ASSERT_THAT(IB.VariableValues, SizeIs(2));
   EXPECT_THAT(IB.VariableValues[0], IsInvalid());
   EXPECT_THAT(IB.VariableValues[1], IsInvalid());
 }
 
-TEST_F(UopsBenchmarkRunnerTest, SerialInstruction) {
+TEST_F(UopsSnippetGeneratorTest, SerialInstruction) {
   // CDQ is serial no matter what.
 
   // implicit def         : EAX
   // implicit def         : EDX
   // implicit use         : EAX
   const unsigned Opcode = llvm::X86::CDQ;
   const CodeTemplate CT = checkAndGetCodeTemplate(Opcode);
   EXPECT_THAT(CT.Info, HasSubstr("serial"));
   ASSERT_THAT(CT.Instructions, SizeIs(1));
   const InstructionBuilder &IB = CT.Instructions[0];
   EXPECT_THAT(IB.getOpcode(), Opcode);
   ASSERT_THAT(IB.VariableValues, SizeIs(0));
 }
 
-TEST_F(UopsBenchmarkRunnerTest, StaticRenaming) {
+TEST_F(UopsSnippetGeneratorTest, StaticRenaming) {
   // CMOVA32rr has tied variables, we enumarate the possible values to execute
   // as many in parallel as possible.
 
   // explicit def 0       : reg RegClass=GR32
   // explicit use 1       : reg RegClass=GR32 | TIED_TO:0
   // explicit use 2       : reg RegClass=GR32
   // implicit use         : EFLAGS
   const unsigned Opcode = llvm::X86::CMOVA32rr;
   const CodeTemplate CT = checkAndGetCodeTemplate(Opcode);
   EXPECT_THAT(CT.Info, HasSubstr("static renaming"));
   constexpr const unsigned kInstructionCount = 15;
   ASSERT_THAT(CT.Instructions, SizeIs(kInstructionCount));
   std::unordered_set<unsigned> AllDefRegisters;
   for (const auto &IB : CT.Instructions) {
     ASSERT_THAT(IB.VariableValues, SizeIs(2));
     AllDefRegisters.insert(IB.VariableValues[0].getReg());
   }
   EXPECT_THAT(AllDefRegisters, SizeIs(kInstructionCount))
       << "Each instruction writes to a different register";
 }
 
-TEST_F(UopsBenchmarkRunnerTest, NoTiedVariables) {
+TEST_F(UopsSnippetGeneratorTest, NoTiedVariables) {
   // CMOV_GR32 has no tied variables, we make sure def and use are different
   // from each other.
 
   // explicit def 0       : reg RegClass=GR32
   // explicit use 1       : reg RegClass=GR32
   // explicit use 2       : reg RegClass=GR32
   // explicit use 3       : imm
   // implicit use         : EFLAGS
   const unsigned Opcode = llvm::X86::CMOV_GR32;
   const CodeTemplate CT = checkAndGetCodeTemplate(Opcode);
   EXPECT_THAT(CT.Info, HasSubstr("no tied variables"));
   ASSERT_THAT(CT.Instructions, SizeIs(1));
   const InstructionBuilder &IB = CT.Instructions[0];
   EXPECT_THAT(IB.getOpcode(), Opcode);
   ASSERT_THAT(IB.VariableValues, SizeIs(4));
   EXPECT_THAT(IB.VariableValues[0].getReg(), Not(IB.VariableValues[1].getReg()))
       << "Def is different from first Use";
   EXPECT_THAT(IB.VariableValues[0].getReg(), Not(IB.VariableValues[2].getReg()))
       << "Def is different from second Use";
   EXPECT_THAT(IB.VariableValues[3], IsInvalid());
 }
 
-TEST_F(UopsBenchmarkRunnerTest, MemoryUse) {
+TEST_F(UopsSnippetGeneratorTest, MemoryUse) {
   // Mov32rm reads from memory.
   const unsigned Opcode = llvm::X86::MOV32rm;
   const CodeTemplate CT = checkAndGetCodeTemplate(Opcode);
   EXPECT_THAT(CT.Info, HasSubstr("no tied variables"));
   ASSERT_THAT(CT.Instructions,
-              SizeIs(UopsBenchmarkRunner::kMinNumDifferentAddresses));
+              SizeIs(UopsSnippetGenerator::kMinNumDifferentAddresses));
   const InstructionBuilder &IB = CT.Instructions[0];
   EXPECT_THAT(IB.getOpcode(), Opcode);
   ASSERT_THAT(IB.VariableValues, SizeIs(6));
   EXPECT_EQ(IB.VariableValues[2].getImm(), 1);
   EXPECT_EQ(IB.VariableValues[3].getReg(), 0u);
   EXPECT_EQ(IB.VariableValues[4].getImm(), 0);
   EXPECT_EQ(IB.VariableValues[5].getReg(), 0u);
 }
 
-TEST_F(UopsBenchmarkRunnerTest, MemoryUse_Movsb) {
+TEST_F(UopsSnippetGeneratorTest, MemoryUse_Movsb) {
   // MOVSB writes to scratch memory register.
   const unsigned Opcode = llvm::X86::MOVSB;
-  auto Error = Runner.generateCodeTemplate(Opcode).takeError();
+  auto Error = Generator.generateCodeTemplate(Opcode).takeError();
   EXPECT_TRUE((bool)Error);
   llvm::consumeError(std::move(Error));
 }
 
-class FakeBenchmarkRunner : public BenchmarkRunner {
+class FakeSnippetGenerator : public SnippetGenerator {
 public:
-  FakeBenchmarkRunner(const LLVMState &State)
-      : BenchmarkRunner(State, InstructionBenchmark::Unknown) {}
+  FakeSnippetGenerator(const LLVMState &State) : SnippetGenerator(State) {}
 
   Instruction createInstruction(unsigned Opcode) {
     return Instruction(State.getInstrInfo().get(Opcode), RATC);
   }
 
 private:
   llvm::Expected<CodeTemplate>
   generateCodeTemplate(unsigned Opcode) const override {
     return llvm::make_error<llvm::StringError>("not implemented",
                                                llvm::inconvertibleErrorCode());
   }
-
-  std::vector<BenchmarkMeasure>
-  runMeasurements(const ExecutableFunction &EF, ScratchSpace &Scratch,
-                  const unsigned NumRepetitions) const override {
-    return {};
-  }
 };
 
-using FakeSnippetGeneratorTest = SnippetGeneratorTest<FakeBenchmarkRunner>;
+using FakeSnippetGeneratorTest = SnippetGeneratorTest<FakeSnippetGenerator>;
 
 TEST_F(FakeSnippetGeneratorTest, ComputeRegsToDefAdd16ri) {
   // ADD16ri:
   // explicit def 0       : reg RegClass=GR16
   // explicit use 1       : reg RegClass=GR16 | TIED_TO:0
   // explicit use 2       : imm
   // implicit def         : EFLAGS
-  InstructionBuilder IB(Runner.createInstruction(llvm::X86::ADD16ri));
+  InstructionBuilder IB(Generator.createInstruction(llvm::X86::ADD16ri));
   IB.getValueFor(IB.Instr.Variables[0]) =
       llvm::MCOperand::createReg(llvm::X86::AX);
   std::vector<InstructionBuilder> Snippet;
   Snippet.push_back(std::move(IB));
-  const auto RegsToDef = Runner.computeRegsToDef(Snippet);
+  const auto RegsToDef = Generator.computeRegsToDef(Snippet);
   EXPECT_THAT(RegsToDef, UnorderedElementsAre(llvm::X86::AX));
 }
 
 TEST_F(FakeSnippetGeneratorTest, ComputeRegsToDefAdd64rr) {
   // ADD64rr:
   //  mov64ri rax, 42
   //  add64rr rax, rax, rbx
   // -> only rbx needs defining.
   std::vector<InstructionBuilder> Snippet;
   {
-    InstructionBuilder Mov(Runner.createInstruction(llvm::X86::MOV64ri));
+    InstructionBuilder Mov(Generator.createInstruction(llvm::X86::MOV64ri));
     Mov.getValueFor(Mov.Instr.Variables[0]) =
         llvm::MCOperand::createReg(llvm::X86::RAX);
     Mov.getValueFor(Mov.Instr.Variables[1]) = llvm::MCOperand::createImm(42);
     Snippet.push_back(std::move(Mov));
   }
   {
-    InstructionBuilder Add(Runner.createInstruction(llvm::X86::ADD64rr));
+    InstructionBuilder Add(Generator.createInstruction(llvm::X86::ADD64rr));
     Add.getValueFor(Add.Instr.Variables[0]) =
         llvm::MCOperand::createReg(llvm::X86::RAX);
     Add.getValueFor(Add.Instr.Variables[1]) =
         llvm::MCOperand::createReg(llvm::X86::RBX);
     Snippet.push_back(std::move(Add));
   }
 
-  const auto RegsToDef = Runner.computeRegsToDef(Snippet);
+  const auto RegsToDef = Generator.computeRegsToDef(Snippet);
   EXPECT_THAT(RegsToDef, UnorderedElementsAre(llvm::X86::RBX));
 }
 
 } // namespace
 } // namespace exegesis