[AArch64] -mcpu=native CPU detection for Cavium processors

[steleman]

Summary

This small patch updates the CPU detection for Cavium processors when -mcpu=native was passed on compile-line.

[steleman]

Le Ping!

[fhahn]

LGTM. Could you please add a unittest similar to the one added in D40985?

[steleman]

In D51939#1241238, @fhahn wrote:

LGTM. Could you please add a unittest similar to the one added in D40985?

Yes, I will add a test case for T88/T99.

[steleman]

Added unit test case for Cavium processors - T99 and T88.

[fhahn]

Thanks!

llvm/trunk/lib/Support/Host.cpp

for (unsigned I = 0, E = Lines.size(); I != E; ++I)
             .Case("0xd04", "cortex-a35")
             .Case("0xd03", "cortex-a53")
             .Case("0xd07", "cortex-a57")
             .Case("0xd08", "cortex-a72")
             .Case("0xd09", "cortex-a73")
             .Default("generic");
   }
 
+  if (Implementer == "0x42" || Implementer == "0x43") { // Broadcom | Cavium.
+    for (unsigned I = 0, E = Lines.size(); I != E; ++I) {
+      if (Lines[I].startswith("CPU part")) {
+        return StringSwitch<const char *>(Lines[I].substr(8).ltrim("\t :"))
+          .Case("0x516", "thunderx2t99")
+          .Case("0x0516", "thunderx2t99")
+          .Case("0xaf", "thunderx2t99")
+          .Case("0x0af", "thunderx2t99")
+          .Case("0xa1", "thunderxt88")
+          .Case("0x0a1", "thunderxt88")
+          .Default("generic");
+      }
+    }
+  }
+
   if (Implementer == "0x51") // Qualcomm Technologies, Inc.
     // Look for the CPU part line.
     for (unsigned I = 0, E = Lines.size(); I != E; ++I)
       if (Lines[I].startswith("CPU part"))
         // The CPU part is a 3 digit hexadecimal number with a 0x prefix. The
         // values correspond to the "Part number" in the CP15/c0 register. The
         // contents are specified in the various processor manuals.
         return StringSwitch<const char *>(Lines[I].substr(8).ltrim("\t :"))

llvm/trunk/unittests/Support/Host.cpp

EXPECT_EQ(sys::detail::getHostCPUNameForARM(ExynosProcCpuInfo +
                                               "CPU variant     : 0x1\n"
                                               "CPU part        : 0x001"),
             "exynos-m1");
   // Verify Exynos M2.
   EXPECT_EQ(sys::detail::getHostCPUNameForARM(ExynosProcCpuInfo +
                                               "CPU variant     : 0x4\n"
                                               "CPU part        : 0x001"),
             "exynos-m2");
+
+  const std::string ThunderX2T99ProcCpuInfo = R"(
+processor : 0
+BogoMIPS  : 400.00
+Features  : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics
+CPU implementer : 0x43
+CPU architecture: 8
+CPU variant : 0x1
+CPU part  : 0x0af
+)";
+
+  // Verify different versions of ThunderX2T99.
+  EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderX2T99ProcCpuInfo +
+                                              "CPU implementer : 0x42\n"
+                                              "CPU part  : 0x516"),
+            "thunderx2t99");
+
+  EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderX2T99ProcCpuInfo +
+                                              "CPU implementer : 0x42\n"
+                                              "CPU part  : 0x0516"),
+            "thunderx2t99");
+
+  EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderX2T99ProcCpuInfo +
+                                              "CPU implementer : 0x43\n"
+                                              "CPU part  : 0x516"),
+            "thunderx2t99");
+
+  EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderX2T99ProcCpuInfo +
+                                              "CPU implementer : 0x43\n"
+                                              "CPU part  : 0x0516"),
+            "thunderx2t99");
+
+  EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderX2T99ProcCpuInfo +
+                                              "CPU implementer : 0x42\n"
+                                              "CPU part  : 0xaf"),
+            "thunderx2t99");
+
+  EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderX2T99ProcCpuInfo +
+                                              "CPU implementer : 0x42\n"
+                                              "CPU part  : 0x0af"),
+            "thunderx2t99");
+
+  EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderX2T99ProcCpuInfo +
+                                              "CPU implementer : 0x43\n"
+                                              "CPU part  : 0xaf"),
+            "thunderx2t99");
+
+  EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderX2T99ProcCpuInfo +
+                                              "CPU implementer : 0x43\n"
+                                              "CPU part  : 0x0af"),
+            "thunderx2t99");
+
+  // Verify ThunderXT88.
+  const std::string ThunderXT88ProcCpuInfo = R"(
+processor : 0
+BogoMIPS  : 200.00
+Features  : fp asimd evtstrm aes pmull sha1 sha2 crc32
+CPU implementer : 0x43
+CPU architecture: 8
+CPU variant : 0x1
+CPU part  : 0x0a1
+)";
+
+  EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderXT88ProcCpuInfo +
+                                              "CPU implementer : 0x43\n"
+                                              "CPU part  : 0x0a1"),
+            "thunderxt88");
+
+  EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderXT88ProcCpuInfo +
+                                              "CPU implementer : 0x43\n"
+                                              "CPU part  : 0xa1"),
+            "thunderxt88");
 }
 
 #if defined(__APPLE__)
 TEST_F(HostTest, getMacOSHostVersion) {
   using namespace llvm::sys;
   llvm::Triple HostTriple(getProcessTriple());
   if (!HostTriple.isMacOSX())
     return;