[WebAssembly] Prioritize splats over v128.consts

[tlively]

Summary

Splats are fewer bytes than v128.consts, so use them when either could
apply.

llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td

def splat8 : PatFrag<(ops node:$x), (build_vector
                        node:$x, node:$x, node:$x, node:$x)>;
 def splat16 : PatFrag<(ops node:$x), (build_vector
                         node:$x, node:$x, node:$x, node:$x,
                         node:$x, node:$x, node:$x, node:$x,
                         node:$x, node:$x, node:$x, node:$x,
                         node:$x, node:$x, node:$x, node:$x)>;
 multiclass Splat<ValueType vec_t, string vec, WebAssemblyRegClass reg_t,
                  PatFrag splat_pat, bits<32> simdop> {
+  // Prefer splats over v128.const for const splats (65 is lowest that works)
+  let AddedComplexity = 65 in
   defm SPLAT_#vec_t : SIMD_I<(outs V128:$dst), (ins reg_t:$x), (outs), (ins),
                              [(set (vec_t V128:$dst), (splat_pat reg_t:$x))],
                              vec#".splat\t$dst, $x", vec#".splat", simdop>;
 }
 multiclass SIMDBinary<ValueType vec_t, string vec, SDNode node, string name,
                       bits<32> simdop> {
   defm _#vec_t : SIMD_I<(outs V128:$dst), (ins V128:$lhs, V128:$rhs),
                         (outs), (ins),

llvm/trunk/test/CodeGen/WebAssembly/simd.ll

 define <16 x i8> @splat_v16i8(i8 %x) {
   %v = insertelement <16 x i8> undef, i8 %x, i32 0
   %res = shufflevector <16 x i8> %v, <16 x i8> undef,
     <16 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0,
                 i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
   ret <16 x i8> %res
 }
 
+; CHECK-LABEL: const_splat_v16i8
+; SIMD128; i8x16.splat
+define <16 x i8> @const_splat_v16i8() {
+  ret <16 x i8> <i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42,
+                 i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42>
+}
+
 ; CHECK-LABEL: extract_v16i8_s:
 ; NO-SIMD128-NOT: i8x16
 ; SIMD128: .param v128{{$}}
 ; SIMD128: .result i32{{$}}
 ; SIMD128: i8x16.extract_lane_s $push0=, $0, 13 # encoding: [0xfd,0x09,0x0d]{{$}}
 ; SIMD128: return $pop0 #
 define i32 @extract_v16i8_s(<16 x i8> %v) {
   %elem = extractelement <16 x i8> %v, i8 13

 ; SIMD128: return $pop0 # encoding: [0x0f]{{$}}
 define <8 x i16> @splat_v8i16(i16 %x) {
   %v = insertelement <8 x i16> undef, i16 %x, i32 0
   %res = shufflevector <8 x i16> %v, <8 x i16> undef,
     <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
   ret <8 x i16> %res
 }
 
+; CHECK-LABEL: const_splat_v8i16
+; SIMD128; i16x8.splat
+define <8 x i16> @const_splat_v8i16() {
+  ret <8 x i16> <i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42>
+}
+
 ; CHECK-LABEL: extract_v8i16_s:
 ; NO-SIMD128-NOT: i16x8
 ; SIMD128: .param v128{{$}}
 ; SIMD128: .result i32{{$}}
 ; SIMD128: i16x8.extract_lane_s $push0=, $0, 5 # encoding: [0xfd,0x0b,0x05]{{$}}
 ; SIMD128: return $pop0 #
 define i32 @extract_v8i16_s(<8 x i16> %v) {
   %elem = extractelement <8 x i16> %v, i16 5

 ; SIMD128: return $pop0 # encoding: [0x0f]{{$}}
 define <4 x i32> @splat_v4i32(i32 %x) {
   %v = insertelement <4 x i32> undef, i32 %x, i32 0
   %res = shufflevector <4 x i32> %v, <4 x i32> undef,
     <4 x i32> <i32 0, i32 0, i32 0, i32 0>
   ret <4 x i32> %res
 }
 
+; CHECK-LABEL: const_splat_v4i32
+; SIMD128; i32x4.splat
+define <4 x i32> @const_splat_v4i32() {
+  ret <4 x i32> <i32 42, i32 42, i32 42, i32 42>
+}
+
 ; CHECK-LABEL: extract_v4i32:
 ; NO-SIMD128-NOT: i32x4
 ; SIMD128: .param v128{{$}}
 ; SIMD128: .result i32{{$}}
 ; SIMD128: i32x4.extract_lane $push0=, $0, 3 # encoding: [0xfd,0x0d,0x03]{{$}}
 ; SIMD128: return $pop0 #
 define i32 @extract_v4i32(<4 x i32> %v) {
   %elem = extractelement <4 x i32> %v, i32 3

 ; SIMD128: .result v128{{$}}
 ; SIMD128: i64x2.replace_lane $push0=, $0, 0, $1 # encoding: [0xfd,0x14,0x00]{{$}}
 ; SIMD128: return $pop0 # encoding: [0x0f]{{$}}
 define <2 x i64> @replace_v2i64(<2 x i64> %v, i64 %x) {
   %res = insertelement <2 x i64> %v, i64 %x, i32 0
   ret <2 x i64> %res
 }
 
+define <2 x i64> @const_splat_v2i64() {
+  ret <2 x i64> <i64 42, i64 42>
+}
+
 ; CHECK-LABEL: build_v2i64:
 ; NO-SIMD128-NOT: i64x2
 ; SIMD128-VM-NOT: i64x2
 ; SIMD128: .param i64, i64{{$}}
 ; SIMD128: .result v128{{$}}
 ; SIMD128: i64x2.splat $push0=, $0 # encoding: [0xfd,0x06]
 ; SIMD128: i64x2.replace_lane $push1=, $pop0, 1, $1 # encoding: [0xfd,0x14,0x01]
 ; SIMD128: return $pop1 # encoding: [0x0f]

 ; SIMD128: return $pop0 # encoding: [0x0f]{{$}}
 define <4 x float> @splat_v4f32(float %x) {
   %v = insertelement <4 x float> undef, float %x, i32 0
   %res = shufflevector <4 x float> %v, <4 x float> undef,
     <4 x i32> <i32 0, i32 0, i32 0, i32 0>
   ret <4 x float> %res
 }
 
+; CHECK-LABEL: const_splat_v4f32
+; SIMD128; f32x4.splat
+define <4 x float> @const_splat_v4f32() {
+  ret <4 x float> <float 42., float 42., float 42., float 42.>
+}
+
 ; CHECK-LABEL: extract_v4f32:
 ; NO-SIMD128-NOT: f32x4
 ; SIMD128: .param v128{{$}}
 ; SIMD128: .result f32{{$}}
 ; SIMD128: f32x4.extract_lane $push0=, $0, 3 # encoding: [0xfd,0x0f,0x03]{{$}}
 ; SIMD128: return $pop0 #
 define float @extract_v4f32(<4 x float> %v) {
   %elem = extractelement <4 x float> %v, i32 3

 ; SIMD128: f64x2.splat $push0=, $0 # encoding: [0xfd,0x08]{{$}}
 ; SIMD128: return $pop0 # encoding: [0x0f]{{$}}
 define <2 x double> @splat_v2f64(double %x) {
   %t1 = insertelement <2 x double> zeroinitializer, double %x, i3 0
   %res = insertelement <2 x double> %t1, double %x, i32 1
   ret <2 x double> %res
 }
 
+; CHECK-LABEL: const_splat_v2f64:
+; SIMD128; f64x2.splat
+define <2 x double> @const_splat_v2f64() {
+  ret <2 x double> <double 42., double 42.>
+}
+
 ; CHECK-LABEL: extract_v2f64:
 ; NO-SIMD128-NOT: f64x2
 ; SIMD128-VM-NOT: f64x2
 ; SIMD128: .param v128{{$}}
 ; SIMD128: .result f64{{$}}
 ; SIMD128: f64x2.extract_lane $push0=, $0, 1 # encoding: [0xfd,0x10,0x01]{{$}}
 ; SIMD128: return $pop0 #
 define double @extract_v2f64(<2 x double> %v) {