[ARM] Set __ARM_FEATURE_SIMD32 for +dsp cores

[samparker]

Summary

ARM_FEATURE_DSP is already set for targets with the +dsp feature. In the backend, this target feature is also used to represent the availability of the of the instructions that the ACLE guard through the ARM_FEATURE_SIMD32 macro. So it would seem that we don't have any cores that implement one and not the other, so set this macro for cores later than V6 and that the target parser, or user, reports that the 'dsp' instructions are supported.

[samparker]

Added test for armv8m.main+dsp.

[SjoerdMeijer]

Looks reasonable to me.

cfe/trunk/lib/Basic/Targets/ARM.cpp

void ARMTargetInfo::getTargetDefines(const LangOptions &Opts,
   if (isThumb()) {
     Builder.defineMacro("__THUMBEL__");
     Builder.defineMacro("__thumb__");
     if (supportsThumb2())
       Builder.defineMacro("__thumb2__");
   }
 
   // ACLE 6.4.9 32-bit SIMD instructions
-  if (ArchVersion >= 6 && (CPUProfile != "M" || CPUAttr == "7EM"))
+  if (ArchVersion >= 6 || (CPUProfile == "M" && DSP))
     Builder.defineMacro("__ARM_FEATURE_SIMD32", "1");
 
   // ACLE 6.4.10 Hardware Integer Divide
   if (((HWDiv & HWDivThumb) && isThumb()) ||
       ((HWDiv & HWDivARM) && !isThumb())) {
     Builder.defineMacro("__ARM_FEATURE_IDIV", "1");
     Builder.defineMacro("__ARM_ARCH_EXT_IDIV__", "1");
   }

cfe/trunk/test/Preprocessor/arm-acle-6.4.c

 // CHECK-V7M:     __ARM_ARCH_PROFILE 'M'
 // CHECK-V7M:     __ARM_FEATURE_CLZ 1
 // CHECK-V7M:     __ARM_FEATURE_IDIV 1
 // CHECK-V7M:     __ARM_FEATURE_LDREX 0x7
 // CHECK-V7M:     __ARM_FEATURE_QBIT 1
 // CHECK-V7M:     __ARM_FEATURE_SAT 1
 // CHECK-V7M:     __ARM_FEATURE_UNALIGNED 1
 
-// RUN: %clang -target arm-none-linux-eabi -march=armv7e-m -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-V7EM
+// RUN: %clang -target arm-none-linux-eabi -march=armv7e-m -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-M-DSP
+// RUN: %clang --target=arm-arm-none-eabi -mcpu=cortex-m4 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-M-DSP
+// RUN: %clang --target=arm-arm-none-eabi -mcpu=cortex-m7 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-M-DSP
+// RUN: %clang --target=arm-arm-none-eabi -mcpu=cortex-m33 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-M-DSP
+// RUN: %clang --target=arm-arm-none-eabi -march=armv8m.main+dsp -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-M-DSP
 
-// CHECK-V7EM: __ARM_FEATURE_DSP 1
-// CHECK-V7EM: __ARM_FEATURE_SIMD32 1
+// CHECK-M-DSP: __ARM_FEATURE_DSP 1
+// CHECK-M-DSP: __ARM_FEATURE_SIMD32 1
 
 // RUN: %clang -target arm-none-linux-eabi -march=armv8-a -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-V8A
 
 // CHECK-V8A: __ARM_ARCH 8
 // CHECK-V8A: __ARM_ARCH_ISA_ARM 1
 // CHECK-V8A: __ARM_ARCH_ISA_THUMB 2
 // CHECK-V8A: __ARM_ARCH_PROFILE 'A'
 // CHECK-V8A: __ARM_FEATURE_CLZ 1
 // CHECK-V8A: __ARM_FEATURE_DSP 1
 // CHECK-V8A: __ARM_FEATURE_IDIV 1
 // CHECK-V8A: __ARM_FEATURE_LDREX 0xf
 // CHECK-V8A: __ARM_FEATURE_QBIT 1
 // CHECK-V8A: __ARM_FEATURE_SAT 1
 // CHECK-V8A: __ARM_FEATURE_SIMD32 1
 // CHECK-V8A: __ARM_FEATURE_UNALIGNED 1