The two rules tables have to be updated because MAX_COMMON_ADDRESS has been bumped to 6 for handling 32-bit constant address space. Otherwise, we might have out of bounds access. Reported by Jan Vesely.
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arsenm
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Diff Detail
Event Timeline
lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp | ||
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72 | This does not match the current code. Is this a fixup for https://reviews.llvm.org/D47261? afaik, MAX_COMMON_ADDRESS refers to address spaces shared between amdgcn and r600. r600 does not use CONST_32_BIT AS so it probably should not be in the table. |
lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp | ||
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72 | Yes, you have to apply this https://reviews.llvm.org/D50973 I think so for MAX_COMMON_ADDRESS, so only ASAliasRulesGenIsZero should be updated? |
This does not match the current code. Is this a fixup for https://reviews.llvm.org/D47261?
afaik, MAX_COMMON_ADDRESS refers to address spaces shared between amdgcn and r600. r600 does not use CONST_32_BIT AS so it probably should not be in the table.
That said, bumping the table size does not impact r600, so renaming the MAX_COMMON_ADDRESS bound works as well.