[PowerPC] Fix label address calculation for ppc64

[spetrovic]

Summary

This patch fixes calculating address of label for non-pic ppc64.

[kbarton]

I'm not overly familiar with this. I think @sfertile is more familiar with this, so I've added him as a reviewer.

[nemanjai]

This seems to make sense to me and it resolves the kernel build issue. If @sfertile sees something wrong with the patch, he can chime in before or after the commit.

[sfertile]

LGTM with a few minor comments about the test.

test/CodeGen/PowerPC/ppc-label2.ll

1 ↗

(On Diff #161454)

Please add -ppc-asm-full-reg-names to the run steps.

3 ↗

(On Diff #161454)

Since the codegen is expected to be identical between position-dependent and position-independent we should use the same check-prefix for both.

19 ↗

(On Diff #161454)

The addis will always use the toc-pointer (r2) as the second operand so we should be checking for it directly.

addis r3, r2, .LC0@toc@ha
ld r3, .LC0@toc@l(r3)

[spetrovic]

Comments Addressed. Thanks for the review.

[jsji]

Committing this should also resolve https://bugs.llvm.org/show_bug.cgi?id=38864

[joel]

I tested this patch applied to trunk and can confirm this resolves the kernel build issue.

[nickdesaulniers]

Do you need help committing this?

llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp

 SDValue PPCTargetLowering::LowerBlockAddress(SDValue Op,
                                              SelectionDAG &DAG) const {
   EVT PtrVT = Op.getValueType();
   BlockAddressSDNode *BASDN = cast<BlockAddressSDNode>(Op);
   const BlockAddress *BA = BASDN->getBlockAddress();
 
   // 64-bit SVR4 ABI code is always position-independent.
   // The actual BlockAddress is stored in the TOC.
-  if (Subtarget.isSVR4ABI() && isPositionIndependent()) {
+  if (Subtarget.isSVR4ABI() &&
+      (Subtarget.isPPC64() || isPositionIndependent())) {
     if (Subtarget.isPPC64())
       setUsesTOCBasePtr(DAG);
     SDValue GA = DAG.getTargetBlockAddress(BA, PtrVT, BASDN->getOffset());
     return getTOCEntry(DAG, SDLoc(BASDN), Subtarget.isPPC64(), GA);
   }
 
   unsigned MOHiFlag, MOLoFlag;
   bool IsPIC = isPositionIndependent();

llvm/trunk/test/CodeGen/PowerPC/ppc-label2.ll

+; RUN: llc < %s -mtriple=powerpc-unknown-linux-gnu -ppc-asm-full-reg-names -relocation-model=pic | FileCheck --check-prefix=CHECK-PIC32 %s
+; RUN: llc < %s -mtriple=powerpc-unknown-linux-gnu -ppc-asm-full-reg-names -relocation-model=static | FileCheck --check-prefix=CHECK-STATIC32 %s
+; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -ppc-asm-full-reg-names -relocation-model=pic | FileCheck --check-prefix=CHECK-PPC64 %s
+; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -ppc-asm-full-reg-names -relocation-model=static | FileCheck --check-prefix=CHECK-PPC64 %s
+
+
+define dso_local i64 @foo() {
+entry:
+  br label %__here
+
+__here:                                           ; preds = %entry
+  ret i64 ptrtoint (i8* blockaddress(@foo, %__here) to i64)
+}
+
+; CHECK-PIC32:           lwz {{r[0-9]+}}, .LC0-.LTOC(r30)
+; CHECK-PIC32-NOT:       li {{r[0-9]+}}, .Ltmp1-.L1$pb@l
+; CHECK-PIC32-NOT:       addis 4, 30, .Ltmp1-.L1$pb@ha
+; CHECK-STATIC32:        li {{r[0-9]+}}, .Ltmp0@l
+; CHECK-STATIC32-NEXT:   addis {{r[0-9]+}}, {{r[0-9]+}}, .Ltmp0@ha
+; CHECK-PPC64:           addis   r3, r2, .LC0@toc@ha
+; CHECK-PPC64-NEXT:      ld r3, .LC0@toc@l(r3)
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