[mips][microMIPS] Implement ADDIUSP instruction

[jkolek]

Summary

Implement 16-bit microMIPS add immediate unsigned word to stack pointer - ADDIUSP.

[sstankovic]

For this instruction there seems to be a difference between microMIPS reference and GAS, regarding the decoded value of a offset. microMIPS reference says that allowable values for a offset are [2, 3, ..., 256, 257] and [-3, -4, ..., -257, -258], and this value is shifted by 2 to give final stack offset. GAS allows only shifted (final) values: [8, 12, ... , 1024, 1028] and [-12, -16, ... , -1028, -1032]. I suggest to follow GAS approach, because .s file is much easier to read if final offset is used. Of course, encoded values are identical.

[sstankovic]

LGTM, with a change of variable name to uppercase.

lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp

373

Variable name should start with uppercase.

Closed by commit rL219500 (authored by zjovanovic).

lib/Target/Mips/AsmParser/MipsAsmParser.cpp

         if (Imm < -8 || Imm > 7)
           return Error(IDLoc, "immediate operand value out of range");
         break;
+      case Mips::ADDIUSP_MM:
+        Opnd = Inst.getOperand(0);
+        if (!Opnd.isImm())
+          return Error(IDLoc, "expected immediate operand kind");
+        Imm = Opnd.getImm();
+        if (Imm < -258 || Imm > 257 || (Imm < 2 && Imm > -3))
+          return Error(IDLoc, "unexpected immediate operand value");
+        break;
     }
   }
 

lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h

                                 SmallVectorImpl<MCFixup> &Fixups,
                                 const MCSubtargetInfo &STI) const;
 
+  // getSImm9AddiuspValue - Return binary encoding of the microMIPS addiusp
+  // instruction immediate operand.
+  unsigned getSImm9AddiuspValue(const MCInst &MI, unsigned OpNo,
+                                SmallVectorImpl<MCFixup> &Fixups,
+                                const MCSubtargetInfo &STI) const;
+
   // getBranchTargetOpValue - Return binary encoding of the branch
   // target operand. If the machine operand requires relocation,
   // record the relocation and return zero.

lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp

 }
 
 unsigned MipsMCCodeEmitter::
+getSImm9AddiuspValue(const MCInst &MI, unsigned OpNo,
+                SmallVectorImpl<MCFixup> &Fixups,
+                const MCSubtargetInfo &STI) const {
+
+  const MCOperand &MO = MI.getOperand(OpNo);
+  if (MO.isImm()) {
+    unsigned binary = MO.getImm() & 0x0000ffff;
+    return (((binary & 0x8000) >> 7) | (binary & 0x00ff));
+  }
+
+  return 0;
+}
+
+unsigned MipsMCCodeEmitter::
 getExprOpValue(const MCExpr *Expr,SmallVectorImpl<MCFixup> &Fixups,
                const MCSubtargetInfo &STI) const {
   int64_t Res;

lib/Target/Mips/MicroMipsInstrFormats.td

   let Inst{0}     = 0;
 }
 
+class ADDIUSP_FM_MM16 {
+  bits<9> imm;
+
+  bits<16> Inst;
+
+  let Inst{15-10} = 0x13;
+  let Inst{9-1}   = imm;
+  let Inst{0}     = 1;
+}
+
 class MOVE_FM_MM16<bits<6> funct> {
   bits<5> rs;
   bits<5> rd;

lib/Target/Mips/MicroMipsInstrInfo.td

   let EncoderMethod = "getSImm5Addius5Value";
 }
 
+def simm9_addiusp : Operand<i32> {
+  let EncoderMethod = "getSImm9AddiuspValue";
+}
+
 def mem_mm_12 : Operand<i32> {
   let PrintMethod = "printMemOperand";
   let MIOperandInfo = (ops GPR32, simm12);

   let isCommutable = 1;
 }
 
+class AddImmUSP<string opstr> :
+  MicroMipsInst16<(outs), (ins simm9_addiusp:$imm),
+                  !strconcat(opstr, "\t$imm"), [], NoItinerary, FrmI>;
+
 class MoveFromHILOMM<string opstr, RegisterOperand RO, Register UseReg> :
       MicroMipsInst16<(outs RO:$rd), (ins), !strconcat(opstr, "\t$rd"),
   [], II_MFHI_MFLO, FrmR> {

 }
 
 def ADDIUS5_MM : AddImmUS5<"addius5", GPR32Opnd>, ADDIUS5_FM_MM16;
+def ADDIUSP_MM : AddImmUSP<"addiusp">, ADDIUSP_FM_MM16;
 def MFHI16_MM : MoveFromHILOMM<"mfhi", GPR32Opnd, AC0>, MFHILO_FM_MM16<0x10>;
 def MFLO16_MM : MoveFromHILOMM<"mflo", GPR32Opnd, AC0>, MFHILO_FM_MM16<0x12>;
 def MOVE16_MM : MoveMM16<"move", GPR32Opnd>, MOVE_FM_MM16<0x03>;

test/MC/Mips/micromips-16-bit-instructions.s

 # Little endian
 #------------------------------------------------------------------------------
 # CHECK-EL: addius5 $7, -2          # encoding: [0xfc,0x4c]
+# CHECK-EL: addiusp -255            # encoding: [0x03,0x4e]
 # CHECK-EL: mfhi    $9              # encoding: [0x09,0x46]
 # CHECK-EL: mflo    $9              # encoding: [0x49,0x46]
 # CHECK-EL: move    $25, $1         # encoding: [0x21,0x0f]

 # Big endian
 #------------------------------------------------------------------------------
 # CHECK-EB: addius5 $7, -2          # encoding: [0x4c,0xfc]
+# CHECK-EB: addiusp -255            # encoding: [0x4e,0x03]
 # CHECK-EB: mfhi    $9              # encoding: [0x46,0x09]
 # CHECK-EB: mflo    $9              # encoding: [0x46,0x49]
 # CHECK-EB: move    $25, $1         # encoding: [0x0f,0x21]

 # CHECK-EB: move    $zero, $zero    # encoding: [0x0c,0x00]
 
     addius5 $7, -2
+    addiusp -255
     mfhi    $9
     mflo    $9
     move    $25, $1