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Differential D50819

Add support for AVX-512 CodeView Registers
ClosedPublic

Authored by zturner on Aug 15 2018, 4:23 PM.

Details

Reviewers
rnk
Commits
rG2838b59121b0: Add support for AVX-512 CodeView registers.
rL339893: Add support for AVX-512 CodeView registers.
Summary

AVX-512 introduces 16 new YMM registers, as well as 32 ZMM registers. These are already in our X86 target register description file, so our code generator was trying to use them, and then failing to find a mapping to the corresponding CodeView registers when emitting debug info. I pulled these values from the latest version of cvconst.h that ships with the DIA SDK. After making this change, I can recompile an application which was previously crashing, and it no longer crashes.

Diff Detail

Repository
rL LLVM

Event Timeline

zturner created this revision.Aug 15 2018, 4:23 PM
Herald added subscribers: JDevlieghere, hiraditya, aprantl. · View Herald TranscriptAug 15 2018, 4:23 PM
rnk added inline comments.Aug 15 2018, 4:31 PM
llvm/include/llvm/DebugInfo/CodeView/CodeViewRegisters.def
270 ↗(On Diff #160939)

As a follow up after you land this, I want to remove this CVReg prefix from the .def file that was added in rL333421. @JDevlieghere I don't like how it affects our dumped output. Instead the enum should token paste CVReg onto each register name.

rnk accepted this revision.Aug 15 2018, 4:53 PM

lgtm

This revision is now accepted and ready to land.Aug 15 2018, 4:53 PM
Closed by commit rL339893: Add support for AVX-512 CodeView registers. (authored by zturner). · Explain WhyAug 16 2018, 9:18 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
trunk/
include/
llvm/
DebugInfo/
CodeView/
59 lines
lib/
Target/
X86/
MCTargetDesc/
284 lines

Diff 161044

llvm/trunk/include/llvm/DebugInfo/CodeView/CodeViewRegisters.def

Show First 20 Lines • Show All 260 Lines • ▼ Show 20 Lines
CV_REGISTER(CVRegAMD64_YMM8, 376) CV_REGISTER(CVRegAMD64_YMM8, 376)
CV_REGISTER(CVRegAMD64_YMM9, 377) CV_REGISTER(CVRegAMD64_YMM9, 377)
CV_REGISTER(CVRegAMD64_YMM10, 378) CV_REGISTER(CVRegAMD64_YMM10, 378)
CV_REGISTER(CVRegAMD64_YMM11, 379) CV_REGISTER(CVRegAMD64_YMM11, 379)
CV_REGISTER(CVRegAMD64_YMM12, 380) CV_REGISTER(CVRegAMD64_YMM12, 380)
CV_REGISTER(CVRegAMD64_YMM13, 381) CV_REGISTER(CVRegAMD64_YMM13, 381)
CV_REGISTER(CVRegAMD64_YMM14, 382) CV_REGISTER(CVRegAMD64_YMM14, 382)
CV_REGISTER(CVRegAMD64_YMM15, 383) CV_REGISTER(CVRegAMD64_YMM15, 383)
CV_REGISTER(CVRegAMD64_YMM16, 710)
CV_REGISTER(CVRegAMD64_YMM17, 711)
CV_REGISTER(CVRegAMD64_YMM18, 712)
CV_REGISTER(CVRegAMD64_YMM19, 713)
CV_REGISTER(CVRegAMD64_YMM20, 714)
CV_REGISTER(CVRegAMD64_YMM21, 715)
CV_REGISTER(CVRegAMD64_YMM22, 716)
CV_REGISTER(CVRegAMD64_YMM23, 717)
CV_REGISTER(CVRegAMD64_YMM24, 718)
CV_REGISTER(CVRegAMD64_YMM25, 719)
CV_REGISTER(CVRegAMD64_YMM26, 720)
CV_REGISTER(CVRegAMD64_YMM27, 721)
CV_REGISTER(CVRegAMD64_YMM28, 722)
CV_REGISTER(CVRegAMD64_YMM29, 723)
CV_REGISTER(CVRegAMD64_YMM30, 724)
CV_REGISTER(CVRegAMD64_YMM31, 725)
CV_REGISTER(CVRegAMD64_ZMM0, 726)
CV_REGISTER(CVRegAMD64_ZMM1, 727)
CV_REGISTER(CVRegAMD64_ZMM2, 728)
CV_REGISTER(CVRegAMD64_ZMM3, 729)
CV_REGISTER(CVRegAMD64_ZMM4, 730)
CV_REGISTER(CVRegAMD64_ZMM5, 731)
CV_REGISTER(CVRegAMD64_ZMM6, 732)
CV_REGISTER(CVRegAMD64_ZMM7, 733)
CV_REGISTER(CVRegAMD64_ZMM8, 734)
CV_REGISTER(CVRegAMD64_ZMM9, 735)
CV_REGISTER(CVRegAMD64_ZMM10, 736)
CV_REGISTER(CVRegAMD64_ZMM11, 737)
CV_REGISTER(CVRegAMD64_ZMM12, 738)
CV_REGISTER(CVRegAMD64_ZMM13, 739)
CV_REGISTER(CVRegAMD64_ZMM14, 740)
CV_REGISTER(CVRegAMD64_ZMM15, 741)
CV_REGISTER(CVRegAMD64_ZMM16, 742)
CV_REGISTER(CVRegAMD64_ZMM17, 743)
CV_REGISTER(CVRegAMD64_ZMM18, 744)
CV_REGISTER(CVRegAMD64_ZMM19, 745)
CV_REGISTER(CVRegAMD64_ZMM20, 746)
CV_REGISTER(CVRegAMD64_ZMM21, 747)
CV_REGISTER(CVRegAMD64_ZMM22, 748)
CV_REGISTER(CVRegAMD64_ZMM23, 749)
CV_REGISTER(CVRegAMD64_ZMM24, 750)
CV_REGISTER(CVRegAMD64_ZMM25, 751)
CV_REGISTER(CVRegAMD64_ZMM26, 752)
CV_REGISTER(CVRegAMD64_ZMM27, 753)
CV_REGISTER(CVRegAMD64_ZMM28, 754)
CV_REGISTER(CVRegAMD64_ZMM29, 755)
CV_REGISTER(CVRegAMD64_ZMM30, 756)
CV_REGISTER(CVRegAMD64_ZMM31, 757)
CV_REGISTER(CVRegAMD64_K0, 758)
CV_REGISTER(CVRegAMD64_K1, 759)
CV_REGISTER(CVRegAMD64_K2, 760)
CV_REGISTER(CVRegAMD64_K3, 761)
CV_REGISTER(CVRegAMD64_K4, 762)
CV_REGISTER(CVRegAMD64_K5, 763)
CV_REGISTER(CVRegAMD64_K6, 764)
CV_REGISTER(CVRegAMD64_K7, 765)

llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp

Show First 20 Lines • Show All 75 Lines • ▼ Show 20 Lines for (unsigned Reg = X86::NoRegister + 1; Reg < X86::NUM_TARGET_REGS; ++Reg) {
MRI->mapLLVMRegToSEHReg(Reg, SEH); MRI->mapLLVMRegToSEHReg(Reg, SEH);
} }
// Mapping from CodeView to MC register id. // Mapping from CodeView to MC register id.
static const struct { static const struct {
codeview::RegisterId CVReg; codeview::RegisterId CVReg;
MCPhysReg Reg; MCPhysReg Reg;
} RegMap[] = { } RegMap[] = {
{ codeview::RegisterId::CVRegAL, X86::AL}, {codeview::RegisterId::CVRegAL, X86::AL},
{ codeview::RegisterId::CVRegCL, X86::CL}, {codeview::RegisterId::CVRegCL, X86::CL},
{ codeview::RegisterId::CVRegDL, X86::DL}, {codeview::RegisterId::CVRegDL, X86::DL},
{ codeview::RegisterId::CVRegBL, X86::BL}, {codeview::RegisterId::CVRegBL, X86::BL},
{ codeview::RegisterId::CVRegAH, X86::AH}, {codeview::RegisterId::CVRegAH, X86::AH},
{ codeview::RegisterId::CVRegCH, X86::CH}, {codeview::RegisterId::CVRegCH, X86::CH},
{ codeview::RegisterId::CVRegDH, X86::DH}, {codeview::RegisterId::CVRegDH, X86::DH},
{ codeview::RegisterId::CVRegBH, X86::BH}, {codeview::RegisterId::CVRegBH, X86::BH},
{ codeview::RegisterId::CVRegAX, X86::AX}, {codeview::RegisterId::CVRegAX, X86::AX},
{ codeview::RegisterId::CVRegCX, X86::CX}, {codeview::RegisterId::CVRegCX, X86::CX},
{ codeview::RegisterId::CVRegDX, X86::DX}, {codeview::RegisterId::CVRegDX, X86::DX},
{ codeview::RegisterId::CVRegBX, X86::BX}, {codeview::RegisterId::CVRegBX, X86::BX},
{ codeview::RegisterId::CVRegSP, X86::SP}, {codeview::RegisterId::CVRegSP, X86::SP},
{ codeview::RegisterId::CVRegBP, X86::BP}, {codeview::RegisterId::CVRegBP, X86::BP},
{ codeview::RegisterId::CVRegSI, X86::SI}, {codeview::RegisterId::CVRegSI, X86::SI},
{ codeview::RegisterId::CVRegDI, X86::DI}, {codeview::RegisterId::CVRegDI, X86::DI},
{ codeview::RegisterId::CVRegEAX, X86::EAX}, {codeview::RegisterId::CVRegEAX, X86::EAX},
{ codeview::RegisterId::CVRegECX, X86::ECX}, {codeview::RegisterId::CVRegECX, X86::ECX},
{ codeview::RegisterId::CVRegEDX, X86::EDX}, {codeview::RegisterId::CVRegEDX, X86::EDX},
{ codeview::RegisterId::CVRegEBX, X86::EBX}, {codeview::RegisterId::CVRegEBX, X86::EBX},
{ codeview::RegisterId::CVRegESP, X86::ESP}, {codeview::RegisterId::CVRegESP, X86::ESP},
{ codeview::RegisterId::CVRegEBP, X86::EBP}, {codeview::RegisterId::CVRegEBP, X86::EBP},
{ codeview::RegisterId::CVRegESI, X86::ESI}, {codeview::RegisterId::CVRegESI, X86::ESI},
{ codeview::RegisterId::CVRegEDI, X86::EDI}, {codeview::RegisterId::CVRegEDI, X86::EDI},
{ codeview::RegisterId::CVRegEFLAGS, X86::EFLAGS}, {codeview::RegisterId::CVRegEFLAGS, X86::EFLAGS},
{ codeview::RegisterId::CVRegST0, X86::FP0}, {codeview::RegisterId::CVRegST0, X86::FP0},
{ codeview::RegisterId::CVRegST1, X86::FP1}, {codeview::RegisterId::CVRegST1, X86::FP1},
{ codeview::RegisterId::CVRegST2, X86::FP2}, {codeview::RegisterId::CVRegST2, X86::FP2},
{ codeview::RegisterId::CVRegST3, X86::FP3}, {codeview::RegisterId::CVRegST3, X86::FP3},
{ codeview::RegisterId::CVRegST4, X86::FP4}, {codeview::RegisterId::CVRegST4, X86::FP4},
{ codeview::RegisterId::CVRegST5, X86::FP5}, {codeview::RegisterId::CVRegST5, X86::FP5},
{ codeview::RegisterId::CVRegST6, X86::FP6}, {codeview::RegisterId::CVRegST6, X86::FP6},
{ codeview::RegisterId::CVRegST7, X86::FP7}, {codeview::RegisterId::CVRegST7, X86::FP7},
{ codeview::RegisterId::CVRegXMM0, X86::XMM0}, {codeview::RegisterId::CVRegXMM0, X86::XMM0},
{ codeview::RegisterId::CVRegXMM1, X86::XMM1}, {codeview::RegisterId::CVRegXMM1, X86::XMM1},
{ codeview::RegisterId::CVRegXMM2, X86::XMM2}, {codeview::RegisterId::CVRegXMM2, X86::XMM2},
{ codeview::RegisterId::CVRegXMM3, X86::XMM3}, {codeview::RegisterId::CVRegXMM3, X86::XMM3},
{ codeview::RegisterId::CVRegXMM4, X86::XMM4}, {codeview::RegisterId::CVRegXMM4, X86::XMM4},
{ codeview::RegisterId::CVRegXMM5, X86::XMM5}, {codeview::RegisterId::CVRegXMM5, X86::XMM5},
{ codeview::RegisterId::CVRegXMM6, X86::XMM6}, {codeview::RegisterId::CVRegXMM6, X86::XMM6},
{ codeview::RegisterId::CVRegXMM7, X86::XMM7}, {codeview::RegisterId::CVRegXMM7, X86::XMM7},
{ codeview::RegisterId::CVRegXMM8, X86::XMM8}, {codeview::RegisterId::CVRegXMM8, X86::XMM8},
{ codeview::RegisterId::CVRegXMM9, X86::XMM9}, {codeview::RegisterId::CVRegXMM9, X86::XMM9},
{ codeview::RegisterId::CVRegXMM10, X86::XMM10}, {codeview::RegisterId::CVRegXMM10, X86::XMM10},
{ codeview::RegisterId::CVRegXMM11, X86::XMM11}, {codeview::RegisterId::CVRegXMM11, X86::XMM11},
{ codeview::RegisterId::CVRegXMM12, X86::XMM12}, {codeview::RegisterId::CVRegXMM12, X86::XMM12},
{ codeview::RegisterId::CVRegXMM13, X86::XMM13}, {codeview::RegisterId::CVRegXMM13, X86::XMM13},
{ codeview::RegisterId::CVRegXMM14, X86::XMM14}, {codeview::RegisterId::CVRegXMM14, X86::XMM14},
{ codeview::RegisterId::CVRegXMM15, X86::XMM15}, {codeview::RegisterId::CVRegXMM15, X86::XMM15},
{ codeview::RegisterId::CVRegSIL, X86::SIL}, {codeview::RegisterId::CVRegSIL, X86::SIL},
{ codeview::RegisterId::CVRegDIL, X86::DIL}, {codeview::RegisterId::CVRegDIL, X86::DIL},
{ codeview::RegisterId::CVRegBPL, X86::BPL}, {codeview::RegisterId::CVRegBPL, X86::BPL},
{ codeview::RegisterId::CVRegSPL, X86::SPL}, {codeview::RegisterId::CVRegSPL, X86::SPL},
{ codeview::RegisterId::CVRegRAX, X86::RAX}, {codeview::RegisterId::CVRegRAX, X86::RAX},
{ codeview::RegisterId::CVRegRBX, X86::RBX}, {codeview::RegisterId::CVRegRBX, X86::RBX},
{ codeview::RegisterId::CVRegRCX, X86::RCX}, {codeview::RegisterId::CVRegRCX, X86::RCX},
{ codeview::RegisterId::CVRegRDX, X86::RDX}, {codeview::RegisterId::CVRegRDX, X86::RDX},
{ codeview::RegisterId::CVRegRSI, X86::RSI}, {codeview::RegisterId::CVRegRSI, X86::RSI},
{ codeview::RegisterId::CVRegRDI, X86::RDI}, {codeview::RegisterId::CVRegRDI, X86::RDI},
{ codeview::RegisterId::CVRegRBP, X86::RBP}, {codeview::RegisterId::CVRegRBP, X86::RBP},
{ codeview::RegisterId::CVRegRSP, X86::RSP}, {codeview::RegisterId::CVRegRSP, X86::RSP},
{ codeview::RegisterId::CVRegR8, X86::R8}, {codeview::RegisterId::CVRegR8, X86::R8},
{ codeview::RegisterId::CVRegR9, X86::R9}, {codeview::RegisterId::CVRegR9, X86::R9},
{ codeview::RegisterId::CVRegR10, X86::R10}, {codeview::RegisterId::CVRegR10, X86::R10},
{ codeview::RegisterId::CVRegR11, X86::R11}, {codeview::RegisterId::CVRegR11, X86::R11},
{ codeview::RegisterId::CVRegR12, X86::R12}, {codeview::RegisterId::CVRegR12, X86::R12},
{ codeview::RegisterId::CVRegR13, X86::R13}, {codeview::RegisterId::CVRegR13, X86::R13},
{ codeview::RegisterId::CVRegR14, X86::R14}, {codeview::RegisterId::CVRegR14, X86::R14},
{ codeview::RegisterId::CVRegR15, X86::R15}, {codeview::RegisterId::CVRegR15, X86::R15},
{ codeview::RegisterId::CVRegR8B, X86::R8B}, {codeview::RegisterId::CVRegR8B, X86::R8B},
{ codeview::RegisterId::CVRegR9B, X86::R9B}, {codeview::RegisterId::CVRegR9B, X86::R9B},
{ codeview::RegisterId::CVRegR10B, X86::R10B}, {codeview::RegisterId::CVRegR10B, X86::R10B},
{ codeview::RegisterId::CVRegR11B, X86::R11B}, {codeview::RegisterId::CVRegR11B, X86::R11B},
{ codeview::RegisterId::CVRegR12B, X86::R12B}, {codeview::RegisterId::CVRegR12B, X86::R12B},
{ codeview::RegisterId::CVRegR13B, X86::R13B}, {codeview::RegisterId::CVRegR13B, X86::R13B},
{ codeview::RegisterId::CVRegR14B, X86::R14B}, {codeview::RegisterId::CVRegR14B, X86::R14B},
{ codeview::RegisterId::CVRegR15B, X86::R15B}, {codeview::RegisterId::CVRegR15B, X86::R15B},
{ codeview::RegisterId::CVRegR8W, X86::R8W}, {codeview::RegisterId::CVRegR8W, X86::R8W},
{ codeview::RegisterId::CVRegR9W, X86::R9W}, {codeview::RegisterId::CVRegR9W, X86::R9W},
{ codeview::RegisterId::CVRegR10W, X86::R10W}, {codeview::RegisterId::CVRegR10W, X86::R10W},
{ codeview::RegisterId::CVRegR11W, X86::R11W}, {codeview::RegisterId::CVRegR11W, X86::R11W},
{ codeview::RegisterId::CVRegR12W, X86::R12W}, {codeview::RegisterId::CVRegR12W, X86::R12W},
{ codeview::RegisterId::CVRegR13W, X86::R13W}, {codeview::RegisterId::CVRegR13W, X86::R13W},
{ codeview::RegisterId::CVRegR14W, X86::R14W}, {codeview::RegisterId::CVRegR14W, X86::R14W},
{ codeview::RegisterId::CVRegR15W, X86::R15W}, {codeview::RegisterId::CVRegR15W, X86::R15W},
{ codeview::RegisterId::CVRegR8D, X86::R8D}, {codeview::RegisterId::CVRegR8D, X86::R8D},
{ codeview::RegisterId::CVRegR9D, X86::R9D}, {codeview::RegisterId::CVRegR9D, X86::R9D},
{ codeview::RegisterId::CVRegR10D, X86::R10D}, {codeview::RegisterId::CVRegR10D, X86::R10D},
{ codeview::RegisterId::CVRegR11D, X86::R11D}, {codeview::RegisterId::CVRegR11D, X86::R11D},
{ codeview::RegisterId::CVRegR12D, X86::R12D}, {codeview::RegisterId::CVRegR12D, X86::R12D},
{ codeview::RegisterId::CVRegR13D, X86::R13D}, {codeview::RegisterId::CVRegR13D, X86::R13D},
{ codeview::RegisterId::CVRegR14D, X86::R14D}, {codeview::RegisterId::CVRegR14D, X86::R14D},
{ codeview::RegisterId::CVRegR15D, X86::R15D}, {codeview::RegisterId::CVRegR15D, X86::R15D},
{ codeview::RegisterId::CVRegAMD64_YMM0, X86::YMM0}, {codeview::RegisterId::CVRegAMD64_YMM0, X86::YMM0},
{ codeview::RegisterId::CVRegAMD64_YMM1, X86::YMM1}, {codeview::RegisterId::CVRegAMD64_YMM1, X86::YMM1},
{ codeview::RegisterId::CVRegAMD64_YMM2, X86::YMM2}, {codeview::RegisterId::CVRegAMD64_YMM2, X86::YMM2},
{ codeview::RegisterId::CVRegAMD64_YMM3, X86::YMM3}, {codeview::RegisterId::CVRegAMD64_YMM3, X86::YMM3},
{ codeview::RegisterId::CVRegAMD64_YMM4, X86::YMM4}, {codeview::RegisterId::CVRegAMD64_YMM4, X86::YMM4},
{ codeview::RegisterId::CVRegAMD64_YMM5, X86::YMM5}, {codeview::RegisterId::CVRegAMD64_YMM5, X86::YMM5},
{ codeview::RegisterId::CVRegAMD64_YMM6, X86::YMM6}, {codeview::RegisterId::CVRegAMD64_YMM6, X86::YMM6},
{ codeview::RegisterId::CVRegAMD64_YMM7, X86::YMM7}, {codeview::RegisterId::CVRegAMD64_YMM7, X86::YMM7},
{ codeview::RegisterId::CVRegAMD64_YMM8, X86::YMM8}, {codeview::RegisterId::CVRegAMD64_YMM8, X86::YMM8},
{ codeview::RegisterId::CVRegAMD64_YMM9, X86::YMM9}, {codeview::RegisterId::CVRegAMD64_YMM9, X86::YMM9},
{ codeview::RegisterId::CVRegAMD64_YMM10, X86::YMM10}, {codeview::RegisterId::CVRegAMD64_YMM10, X86::YMM10},
{ codeview::RegisterId::CVRegAMD64_YMM11, X86::YMM11}, {codeview::RegisterId::CVRegAMD64_YMM11, X86::YMM11},
{ codeview::RegisterId::CVRegAMD64_YMM12, X86::YMM12}, {codeview::RegisterId::CVRegAMD64_YMM12, X86::YMM12},
{ codeview::RegisterId::CVRegAMD64_YMM13, X86::YMM13}, {codeview::RegisterId::CVRegAMD64_YMM13, X86::YMM13},
{ codeview::RegisterId::CVRegAMD64_YMM14, X86::YMM14}, {codeview::RegisterId::CVRegAMD64_YMM14, X86::YMM14},
{ codeview::RegisterId::CVRegAMD64_YMM15, X86::YMM15}, {codeview::RegisterId::CVRegAMD64_YMM15, X86::YMM15},
{codeview::RegisterId::CVRegAMD64_YMM16, X86::YMM16},
{codeview::RegisterId::CVRegAMD64_YMM17, X86::YMM17},
{codeview::RegisterId::CVRegAMD64_YMM18, X86::YMM18},
{codeview::RegisterId::CVRegAMD64_YMM19, X86::YMM19},
{codeview::RegisterId::CVRegAMD64_YMM20, X86::YMM20},
{codeview::RegisterId::CVRegAMD64_YMM21, X86::YMM21},
{codeview::RegisterId::CVRegAMD64_YMM22, X86::YMM22},
{codeview::RegisterId::CVRegAMD64_YMM23, X86::YMM23},
{codeview::RegisterId::CVRegAMD64_YMM24, X86::YMM24},
{codeview::RegisterId::CVRegAMD64_YMM25, X86::YMM25},
{codeview::RegisterId::CVRegAMD64_YMM26, X86::YMM26},
{codeview::RegisterId::CVRegAMD64_YMM27, X86::YMM27},
{codeview::RegisterId::CVRegAMD64_YMM28, X86::YMM28},
{codeview::RegisterId::CVRegAMD64_YMM29, X86::YMM29},
{codeview::RegisterId::CVRegAMD64_YMM30, X86::YMM30},
{codeview::RegisterId::CVRegAMD64_YMM31, X86::YMM31},
{codeview::RegisterId::CVRegAMD64_ZMM0, X86::ZMM0},
{codeview::RegisterId::CVRegAMD64_ZMM1, X86::ZMM1},
{codeview::RegisterId::CVRegAMD64_ZMM2, X86::ZMM2},
{codeview::RegisterId::CVRegAMD64_ZMM3, X86::ZMM3},
{codeview::RegisterId::CVRegAMD64_ZMM4, X86::ZMM4},
{codeview::RegisterId::CVRegAMD64_ZMM5, X86::ZMM5},
{codeview::RegisterId::CVRegAMD64_ZMM6, X86::ZMM6},
{codeview::RegisterId::CVRegAMD64_ZMM7, X86::ZMM7},
{codeview::RegisterId::CVRegAMD64_ZMM8, X86::ZMM8},
{codeview::RegisterId::CVRegAMD64_ZMM9, X86::ZMM9},
{codeview::RegisterId::CVRegAMD64_ZMM10, X86::ZMM10},
{codeview::RegisterId::CVRegAMD64_ZMM11, X86::ZMM11},
{codeview::RegisterId::CVRegAMD64_ZMM12, X86::ZMM12},
{codeview::RegisterId::CVRegAMD64_ZMM13, X86::ZMM13},
{codeview::RegisterId::CVRegAMD64_ZMM14, X86::ZMM14},
{codeview::RegisterId::CVRegAMD64_ZMM15, X86::ZMM15},
{codeview::RegisterId::CVRegAMD64_ZMM16, X86::ZMM16},
{codeview::RegisterId::CVRegAMD64_ZMM17, X86::ZMM17},
{codeview::RegisterId::CVRegAMD64_ZMM18, X86::ZMM18},
{codeview::RegisterId::CVRegAMD64_ZMM19, X86::ZMM19},
{codeview::RegisterId::CVRegAMD64_ZMM20, X86::ZMM20},
{codeview::RegisterId::CVRegAMD64_ZMM21, X86::ZMM21},
{codeview::RegisterId::CVRegAMD64_ZMM22, X86::ZMM22},
{codeview::RegisterId::CVRegAMD64_ZMM23, X86::ZMM23},
{codeview::RegisterId::CVRegAMD64_ZMM24, X86::ZMM24},
{codeview::RegisterId::CVRegAMD64_ZMM25, X86::ZMM25},
{codeview::RegisterId::CVRegAMD64_ZMM26, X86::ZMM26},
{codeview::RegisterId::CVRegAMD64_ZMM27, X86::ZMM27},
{codeview::RegisterId::CVRegAMD64_ZMM28, X86::ZMM28},
{codeview::RegisterId::CVRegAMD64_ZMM29, X86::ZMM29},
{codeview::RegisterId::CVRegAMD64_ZMM30, X86::ZMM30},
{codeview::RegisterId::CVRegAMD64_ZMM31, X86::ZMM31},
{codeview::RegisterId::CVRegAMD64_K0, X86::K0},
{codeview::RegisterId::CVRegAMD64_K1, X86::K1},
{codeview::RegisterId::CVRegAMD64_K2, X86::K2},
{codeview::RegisterId::CVRegAMD64_K3, X86::K3},
{codeview::RegisterId::CVRegAMD64_K4, X86::K4},
{codeview::RegisterId::CVRegAMD64_K5, X86::K5},
{codeview::RegisterId::CVRegAMD64_K6, X86::K6},
{codeview::RegisterId::CVRegAMD64_K7, X86::K7},
}; };
for (unsigned I = 0; I < array_lengthof(RegMap); ++I) for (unsigned I = 0; I < array_lengthof(RegMap); ++I)
MRI->mapLLVMRegToCVReg(RegMap[I].Reg, static_cast<int>(RegMap[I].CVReg)); MRI->mapLLVMRegToCVReg(RegMap[I].Reg, static_cast<int>(RegMap[I].CVReg));
} }
MCSubtargetInfo *X86_MC::createX86MCSubtargetInfo(const Triple &TT, MCSubtargetInfo *X86_MC::createX86MCSubtargetInfo(const Triple &TT,
StringRef CPU, StringRef FS) { StringRef CPU, StringRef FS) {
std::string ArchFS = X86_MC::ParseX86Triple(TT); std::string ArchFS = X86_MC::ParseX86Triple(TT);
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