[sanitizer] Remove st(X) from the clobber list in 32-bit x86 atomics

[cryptoad]

Summary

When compiling with WERROR=ON & a recent clang, having the st(?) registers
in the clobber list produces a fatal error (except st(7) for some reason):

.../sanitizer_common/sanitizer_atomic_clang_x86.h:98:9: error: inline asm clobber list contains reserved registers: ST0, ST1, ST2, ST3, ST4, ST5, ST6 [-Werror,-Winline-asm]
        "movq %1, %%mm0;"  // Use mmx reg for 64-bit atomic moves
        ^
<inline asm>:1:1: note: instantiated into assembly here
        movq 8(%esp), %mm0;movq %mm0, (%esi);emms;
^
.../sanitizer_common/sanitizer_atomic_clang_x86.h:98:9: note: Reserved registers on the clobber list may not be preserved across the asm statement, and clobbering them may lead to undefined behaviour.
        "movq %1, %%mm0;"  // Use mmx reg for 64-bit atomic moves
        ^
<inline asm>:1:1: note: instantiated into assembly here
        movq 8(%esp), %mm0;movq %mm0, (%esi);emms;
^

As far as I can tell, they were in there due to the use of the emms
instruction, but removing the clobber doesn't appear to have a functional
impact. I am unsure if there is a better way to address this.

lib/sanitizer_common/sanitizer_atomic_clang_x86.h

INLINE typename T::Type atomic_load(
   } else {
     // 64-bit load on 32-bit platform.
     __asm__ __volatile__(
         "movq %1, %%mm0;"  // Use mmx reg for 64-bit atomic moves
         "movq %%mm0, %0;"  // (ptr could be read-only)
         "emms;"            // Empty mmx state/Reset FP regs
         : "=m" (v)
         : "m" (a->val_dont_use)
-        : // mark the FP stack and mmx registers as clobbered
-          "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)",
+        : // mark the mmx registers as clobbered
 #ifdef __MMX__
           "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7",
 #endif  // #ifdef __MMX__
           "memory");
   }
   return v;
 }
 
INLINE void atomic_store(volatile T *a, typename T::Type v, memory_order mo) {
   } else {
     // 64-bit store on 32-bit platform.
     __asm__ __volatile__(
         "movq %1, %%mm0;"  // Use mmx reg for 64-bit atomic moves
         "movq %%mm0, %0;"
         "emms;"            // Empty mmx state/Reset FP regs
         : "=m" (a->val_dont_use)
         : "m" (v)
-        : // mark the FP stack and mmx registers as clobbered
-          "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)",
+        : // mark the mmx registers as clobbered
 #ifdef __MMX__
           "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7",
 #endif  // #ifdef __MMX__
           "memory");
     if (mo == memory_order_seq_cst)
       __sync_synchronize();
   }
 }
 
 }  // namespace __sanitizer
 
 #endif  // #ifndef SANITIZER_ATOMIC_CLANG_X86_H