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[NFC][MCA] ZnVer1: Update RegisterFile to identify false dependencies on partially written registers.
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Authored by lebedev.ri on Jul 16 2018, 11:48 AM.

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Summary

Pretty mechanical follow-up for D49196.

As microarchitecture.pdf notes, "20 AMD Ryzen pipeline",
"20.8 Register renaming and out-of-order schedulers":

The integer register file has 168 physical registers of 64 bits each.
The floating point register file has 160 registers of 128 bits each.

"20.14 Partial register access":

The processor always keeps the different parts of an integer register together. 
...
An instruction that writes to part of a register will therefore have a false dependence
on any previous write to the same register or any part of it.

There is one caveat, however:

An instruction that writes to a 32-bit register will not have any false dependence on the
corresponding 64-bit register because the upper part of the 64-bit register is set to zero.

I have added a test (partial-reg-update-7.s), but something seems to be missing,
if i keep GR32 in RegisterFile<>, the test doesn't change.

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lebedev.ri created this revision.Jul 16 2018, 11:48 AM

I have added a test (partial-reg-update-7.s), but something seems to be missing,
if i keep GR32 in RegisterFile<>, the test doesn't change.

That is because on x86-64, a write to EAX implicitly zeroes the upper half or RAX. So, there is no false dependency with previous values of RAX, and - for the purpose of mca - EAX renames as RAX. See also the definition of X86CInstrAnalysis::clearsSuperRegisters() in the X86 Backend (X86/MCTargetDesc/X86MCTargetDesc.cpp).

I have added a test (partial-reg-update-7.s), but something seems to be missing,
if i keep GR32 in RegisterFile<>, the test doesn't change.

That is because on x86-64, a write to EAX implicitly zeroes the upper half or RAX. So, there is no false dependency with previous values of RAX, and - for the purpose of mca - EAX renames as RAX. See also the definition of X86CInstrAnalysis::clearsSuperRegisters() in the X86 Backend (X86/MCTargetDesc/X86MCTargetDesc.cpp).

Right, thank you, so this already works as-is; Should i keep the test?

I have added a test (partial-reg-update-7.s), but something seems to be missing,
if i keep GR32 in RegisterFile<>, the test doesn't change.

That is because on x86-64, a write to EAX implicitly zeroes the upper half or RAX. So, there is no false dependency with previous values of RAX, and - for the purpose of mca - EAX renames as RAX. See also the definition of X86CInstrAnalysis::clearsSuperRegisters() in the X86 Backend (X86/MCTargetDesc/X86MCTargetDesc.cpp).

Right, thank you, so this already works as-is; Should i keep the test?

It is fine to keep the test :-)

GGanesh accepted this revision.Jul 23 2018, 2:47 AM

I am fine!

This revision is now accepted and ready to land.Jul 23 2018, 2:47 AM

I am fine!

Thank you for the review.

Care to also stamp the tests? :) (D49392)

This revision was automatically updated to reflect the committed changes.