[MIPS] Fix local dynamic TLS with Sym64

[jrtc27]

Summary

For the final DTPREL addition, rather than a lui/daddiu/daddu triple,
LLVM was erronously emitting a daddiu/daddiu pair, treating the
%dtprel_hi as if it were a %dtprel_lo, since Mips::Hi expands unshifted
for Sym64. Instead, use a new TlsHi node and, although unnecessary
due to the exact structure of the nodes emitted, use TlsHi for local
exec too to prevent future bugs. Also garbage-collect the unused
TprelLo and TlsGd nodes, and TprelHi since its functionality is provided
by the new common TlsHi node.

[jrtc27]

I've merged DtprelHi and TprelHi into a single node rather providing two copies
of their functionality.

[jrtc27]

Ping?

[atanasyan]

Could you please rebase the patch against the trunk?

[jrtc27]

Rebased against trunk

[atanasyan]

LGTM. Thanks for the patch.

lib/Target/Mips/MicroMipsInstrInfo.td

 
 defm : MipsHiLoRelocs<LUi_MM, ADDiu_MM, ZERO, GPR32Opnd>, ISA_MICROMIPS;
 
 def : MipsPat<(MipsGotHi tglobaladdr:$in), (LUi_MM tglobaladdr:$in)>,
       ISA_MICROMIPS;
 def : MipsPat<(MipsGotHi texternalsym:$in), (LUi_MM texternalsym:$in)>,
       ISA_MICROMIPS;
 
+def : MipsPat<(MipsDtprelHi tglobaltlsaddr:$in), (LUi_MM tglobaltlsaddr:$in)>,
+      ISA_MICROMIPS;
+def : MipsPat<(MipsTprelHi tglobaltlsaddr:$in), (LUi_MM tglobaltlsaddr:$in)>,
+      ISA_MICROMIPS;
+
 // gp_rel relocs
 def : MipsPat<(add GPR32:$gp, (MipsGPRel tglobaladdr:$in)),
               (ADDiu_MM GPR32:$gp, tglobaladdr:$in)>, ISA_MICROMIPS;
 def : MipsPat<(add GPR32:$gp, (MipsGPRel tconstpool:$in)),
               (ADDiu_MM GPR32:$gp, tconstpool:$in)>, ISA_MICROMIPS;
 
 def : WrapperPat<tglobaladdr, ADDiu_MM, GPR32>, ISA_MICROMIPS;
 def : WrapperPat<tconstpool, ADDiu_MM, GPR32>, ISA_MICROMIPS;

lib/Target/Mips/Mips16InstrInfo.td

 
 // hi/lo relocs
 def : Mips16Pat<(MipsHi tblockaddress:$in),
                 (SllX16 (LiRxImmX16 tblockaddress:$in), 16)>;
 def : Mips16Pat<(MipsHi tglobaladdr:$in),
                 (SllX16 (LiRxImmX16 tglobaladdr:$in), 16)>;
 def : Mips16Pat<(MipsHi tjumptable:$in),
                 (SllX16 (LiRxImmX16 tjumptable:$in), 16)>;
-def : Mips16Pat<(MipsHi tglobaltlsaddr:$in),
-                (SllX16 (LiRxImmX16 tglobaltlsaddr:$in), 16)>;
 
 def : Mips16Pat<(MipsLo tblockaddress:$in), (LiRxImmX16 tblockaddress:$in)>;
 
+def : Mips16Pat<(MipsDtprelHi tglobaltlsaddr:$in),
+                (SllX16 (LiRxImmX16 tglobaltlsaddr:$in), 16)>;
+def : Mips16Pat<(MipsTprelHi tglobaltlsaddr:$in),
+                (SllX16 (LiRxImmX16 tglobaltlsaddr:$in), 16)>;
+
 // wrapper_pic
 class Wrapper16Pat<SDNode node, Instruction ADDiuOp, RegisterClass RC>:
   Mips16Pat<(MipsWrapper RC:$gp, node:$in),
             (ADDiuOp RC:$gp, node:$in)>;
 
 
 def : Wrapper16Pat<tglobaladdr, AddiuRxRxImmX16, CPU16Regs>;
 def : Wrapper16Pat<tglobaltlsaddr, AddiuRxRxImmX16, CPU16Regs>;

lib/Target/Mips/Mips64InstrInfo.td

 
 // hi/lo relocs
 let AdditionalPredicates = [NotInMicroMips] in
 defm : MipsHiLoRelocs<LUi64, DADDiu, ZERO_64, GPR64Opnd>, SYM_32;
 
 def : MipsPat<(MipsGotHi tglobaladdr:$in), (LUi64 tglobaladdr:$in)>;
 def : MipsPat<(MipsGotHi texternalsym:$in), (LUi64 texternalsym:$in)>;
 
+def : MipsPat<(MipsTprelHi tglobaltlsaddr:$in), (LUi64 tglobaltlsaddr:$in)>;
+def : MipsPat<(MipsDtprelHi tglobaltlsaddr:$in), (LUi64 tglobaltlsaddr:$in)>;
+
 // highest/higher/hi/lo relocs
 let AdditionalPredicates = [NotInMicroMips] in {
   def : MipsPat<(MipsJmpLink (i64 texternalsym:$dst)),
                 (JAL texternalsym:$dst)>, SYM_64;
   def : MipsPat<(MipsHighest (i64 tglobaladdr:$in)),
                 (LUi64 tglobaladdr:$in)>, SYM_64;
   def : MipsPat<(MipsHighest (i64 tblockaddress:$in)),
                 (LUi64 tblockaddress:$in)>, SYM_64;
   def : MipsPat<(MipsHighest (i64 tjumptable:$in)),
                 (LUi64 tjumptable:$in)>, SYM_64;
   def : MipsPat<(MipsHighest (i64 tconstpool:$in)),
                 (LUi64 tconstpool:$in)>, SYM_64;
-  def : MipsPat<(MipsHighest (i64 tglobaltlsaddr:$in)),
-                (LUi64 tglobaltlsaddr:$in)>, SYM_64;
   def : MipsPat<(MipsHighest (i64 texternalsym:$in)),
                 (LUi64 texternalsym:$in)>, SYM_64;
 
   def : MipsPat<(MipsHigher (i64 tglobaladdr:$in)),
                 (DADDiu ZERO_64, tglobaladdr:$in)>, SYM_64;
   def : MipsPat<(MipsHigher (i64 tblockaddress:$in)),
                 (DADDiu ZERO_64, tblockaddress:$in)>, SYM_64;
   def : MipsPat<(MipsHigher (i64 tjumptable:$in)),
                 (DADDiu ZERO_64, tjumptable:$in)>, SYM_64;
   def : MipsPat<(MipsHigher (i64 tconstpool:$in)),
                 (DADDiu ZERO_64, tconstpool:$in)>, SYM_64;
-  def : MipsPat<(MipsHigher (i64 tglobaltlsaddr:$in)),
-                (DADDiu ZERO_64, tglobaltlsaddr:$in)>, SYM_64;
   def : MipsPat<(MipsHigher (i64 texternalsym:$in)),
                 (DADDiu ZERO_64, texternalsym:$in)>, SYM_64;
 
   def : MipsPat<(add GPR64:$hi, (MipsHigher (i64 tglobaladdr:$lo))),
                 (DADDiu GPR64:$hi, tglobaladdr:$lo)>, SYM_64;
   def : MipsPat<(add GPR64:$hi, (MipsHigher (i64 tblockaddress:$lo))),
                 (DADDiu GPR64:$hi, tblockaddress:$lo)>, SYM_64;
   def : MipsPat<(add GPR64:$hi, (MipsHigher (i64 tjumptable:$lo))),
                 (DADDiu GPR64:$hi, tjumptable:$lo)>, SYM_64;
   def : MipsPat<(add GPR64:$hi, (MipsHigher (i64 tconstpool:$lo))),
                 (DADDiu GPR64:$hi, tconstpool:$lo)>, SYM_64;
-  def : MipsPat<(add GPR64:$hi, (MipsHigher (i64 tglobaltlsaddr:$lo))),
-                (DADDiu GPR64:$hi, tglobaltlsaddr:$lo)>, SYM_64;
 
   def : MipsPat<(add GPR64:$hi, (MipsHi (i64 tglobaladdr:$lo))),
                 (DADDiu GPR64:$hi, tglobaladdr:$lo)>, SYM_64;
   def : MipsPat<(add GPR64:$hi, (MipsHi (i64 tblockaddress:$lo))),
                 (DADDiu GPR64:$hi, tblockaddress:$lo)>, SYM_64;
   def : MipsPat<(add GPR64:$hi, (MipsHi (i64 tjumptable:$lo))),
                 (DADDiu GPR64:$hi, tjumptable:$lo)>, SYM_64;
   def : MipsPat<(add GPR64:$hi, (MipsHi (i64 tconstpool:$lo))),
                 (DADDiu GPR64:$hi, tconstpool:$lo)>, SYM_64;
-  def : MipsPat<(add GPR64:$hi, (MipsHi (i64 tglobaltlsaddr:$lo))),
-                (DADDiu GPR64:$hi, tglobaltlsaddr:$lo)>, SYM_64;
 
   def : MipsPat<(add GPR64:$hi, (MipsLo (i64 tglobaladdr:$lo))),
                 (DADDiu GPR64:$hi, tglobaladdr:$lo)>, SYM_64;
   def : MipsPat<(add GPR64:$hi, (MipsLo (i64 tblockaddress:$lo))),
                 (DADDiu GPR64:$hi, tblockaddress:$lo)>, SYM_64;
   def : MipsPat<(add GPR64:$hi, (MipsLo (i64 tjumptable:$lo))),
                 (DADDiu GPR64:$hi, tjumptable:$lo)>, SYM_64;
   def : MipsPat<(add GPR64:$hi, (MipsLo (i64 tconstpool:$lo))),

lib/Target/Mips/MipsISelLowering.h

enum NodeType : unsigned {
 
       // Get the Lower 16 bits from a 32/64-bit immediate
       // No relation with Mips Lo register
       Lo,
 
       // Get the High 16 bits from a 32 bit immediate for accessing the GOT.
       GotHi,
 
+      // Get the High 16 bits from a 32-bit immediate for accessing the DTP.
+      DtprelHi,
+
+      // Get the High 16 bits from a 32-bit immediate for accessing the TP.
+      TprelHi,
+
       // Handle gp_rel (small data/bss sections) relocation.
       GPRel,
 
       // Thread Pointer
       ThreadPointer,
 
       // Vector Floating Point Multiply and Subtract
       FMS,

lib/Target/Mips/MipsISelLowering.cpp

const char *MipsTargetLowering::getTargetNodeName(unsigned Opcode) const {
   case MipsISD::FIRST_NUMBER:      break;
   case MipsISD::JmpLink:           return "MipsISD::JmpLink";
   case MipsISD::TailCall:          return "MipsISD::TailCall";
   case MipsISD::Highest:           return "MipsISD::Highest";
   case MipsISD::Higher:            return "MipsISD::Higher";
   case MipsISD::Hi:                return "MipsISD::Hi";
   case MipsISD::Lo:                return "MipsISD::Lo";
   case MipsISD::GotHi:             return "MipsISD::GotHi";
+  case MipsISD::DtprelHi:          return "MipsISD::DtprelHi";
+  case MipsISD::TprelHi:           return "MipsISD::TprelHi";
   case MipsISD::GPRel:             return "MipsISD::GPRel";
   case MipsISD::ThreadPointer:     return "MipsISD::ThreadPointer";
   case MipsISD::Ret:               return "MipsISD::Ret";
   case MipsISD::ERet:              return "MipsISD::ERet";
   case MipsISD::EH_RETURN:         return "MipsISD::EH_RETURN";
   case MipsISD::FMS:               return "MipsISD::FMS";
   case MipsISD::FPBrcond:          return "MipsISD::FPBrcond";
   case MipsISD::FPCmp:             return "MipsISD::FPCmp";
if (model == TLSModel::GeneralDynamic || model == TLSModel::LocalDynamic) {
 
     SDValue Ret = CallResult.first;
 
     if (model != TLSModel::LocalDynamic)
       return Ret;
 
     SDValue TGAHi = DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0,
                                                MipsII::MO_DTPREL_HI);
-    SDValue Hi = DAG.getNode(MipsISD::Hi, DL, PtrVT, TGAHi);
+    SDValue Hi = DAG.getNode(MipsISD::DtprelHi, DL, PtrVT, TGAHi);
     SDValue TGALo = DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0,
                                                MipsII::MO_DTPREL_LO);
     SDValue Lo = DAG.getNode(MipsISD::Lo, DL, PtrVT, TGALo);
     SDValue Add = DAG.getNode(ISD::ADD, DL, PtrVT, Hi, Ret);
     return DAG.getNode(ISD::ADD, DL, PtrVT, Add, Lo);
   }
 
   SDValue Offset;
   if (model == TLSModel::InitialExec) {
     // Initial Exec TLS Model
     SDValue TGA = DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0,
                                              MipsII::MO_GOTTPREL);
     TGA = DAG.getNode(MipsISD::Wrapper, DL, PtrVT, getGlobalReg(DAG, PtrVT),
                       TGA);
     Offset =
         DAG.getLoad(PtrVT, DL, DAG.getEntryNode(), TGA, MachinePointerInfo());
   } else {
     // Local Exec TLS Model
     assert(model == TLSModel::LocalExec);
     SDValue TGAHi = DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0,
                                                MipsII::MO_TPREL_HI);
     SDValue TGALo = DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0,
                                                MipsII::MO_TPREL_LO);
-    SDValue Hi = DAG.getNode(MipsISD::Hi, DL, PtrVT, TGAHi);
+    SDValue Hi = DAG.getNode(MipsISD::TprelHi, DL, PtrVT, TGAHi);
     SDValue Lo = DAG.getNode(MipsISD::Lo, DL, PtrVT, TGALo);
     Offset = DAG.getNode(ISD::ADD, DL, PtrVT, Hi, Lo);
   }
 
   SDValue ThreadPointer = DAG.getNode(MipsISD::ThreadPointer, DL, PtrVT);
   return DAG.getNode(ISD::ADD, DL, PtrVT, ThreadPointer, Offset);
 }
 

lib/Target/Mips/MipsInstrInfo.td

 def MipsHi    : SDNode<"MipsISD::Hi", SDTIntUnaryOp>;
 def MipsLo    : SDNode<"MipsISD::Lo", SDTIntUnaryOp>;
 
 def MipsGPRel : SDNode<"MipsISD::GPRel", SDTIntUnaryOp>;
 
 // Hi node for accessing the GOT.
 def MipsGotHi : SDNode<"MipsISD::GotHi", SDTIntUnaryOp>;
 
-// TlsGd node is used to handle General Dynamic TLS
-def MipsTlsGd : SDNode<"MipsISD::TlsGd", SDTIntUnaryOp>;
-
-// TprelHi and TprelLo nodes are used to handle Local Exec TLS
+// DtprelHi and TprelHi nodes used to handle Local Dynamic and Local Exec TLS
+def MipsDtprelHi   : SDNode<"MipsISD::DtprelHi", SDTIntUnaryOp>;
 def MipsTprelHi    : SDNode<"MipsISD::TprelHi", SDTIntUnaryOp>;
-def MipsTprelLo    : SDNode<"MipsISD::TprelLo", SDTIntUnaryOp>;
 
 // Thread pointer
 def MipsThreadPointer: SDNode<"MipsISD::ThreadPointer", SDT_MipsThreadPointer>;
 
 // Return
 def MipsRet : SDNode<"MipsISD::Ret", SDTNone,
                      [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>;
 

 }
 // hi/lo relocs
 multiclass MipsHiLoRelocs<Instruction Lui, Instruction Addiu,
                           Register ZeroReg, RegisterOperand GPROpnd> {
   def : MipsPat<(MipsHi tglobaladdr:$in), (Lui tglobaladdr:$in)>;
   def : MipsPat<(MipsHi tblockaddress:$in), (Lui tblockaddress:$in)>;
   def : MipsPat<(MipsHi tjumptable:$in), (Lui tjumptable:$in)>;
   def : MipsPat<(MipsHi tconstpool:$in), (Lui tconstpool:$in)>;
-  def : MipsPat<(MipsHi tglobaltlsaddr:$in), (Lui tglobaltlsaddr:$in)>;
   def : MipsPat<(MipsHi texternalsym:$in), (Lui texternalsym:$in)>;
 
   def : MipsPat<(MipsLo tglobaladdr:$in), (Addiu ZeroReg, tglobaladdr:$in)>;
   def : MipsPat<(MipsLo tblockaddress:$in),
                 (Addiu ZeroReg, tblockaddress:$in)>;
   def : MipsPat<(MipsLo tjumptable:$in), (Addiu ZeroReg, tjumptable:$in)>;
   def : MipsPat<(MipsLo tconstpool:$in), (Addiu ZeroReg, tconstpool:$in)>;
   def : MipsPat<(MipsLo tglobaltlsaddr:$in),

 
 let AdditionalPredicates = [NotInMicroMips] in {
   defm : MipsHiLoRelocs<LUi, ADDiu, ZERO, GPR32Opnd>, ISA_MIPS1;
 
   def : MipsPat<(MipsGotHi tglobaladdr:$in), (LUi tglobaladdr:$in)>, ISA_MIPS1;
   def : MipsPat<(MipsGotHi texternalsym:$in), (LUi texternalsym:$in)>,
         ISA_MIPS1;
 
+  def : MipsPat<(MipsDtprelHi tglobaltlsaddr:$in), (LUi tglobaltlsaddr:$in)>,
+        ISA_MIPS1;
+  def : MipsPat<(MipsTprelHi tglobaltlsaddr:$in), (LUi tglobaltlsaddr:$in)>,
+        ISA_MIPS1;
+
   // gp_rel relocs
   def : MipsPat<(add GPR32:$gp, (MipsGPRel tglobaladdr:$in)),
                 (ADDiu GPR32:$gp, tglobaladdr:$in)>, ISA_MIPS1, ABI_NOT_N64;
   def : MipsPat<(add GPR32:$gp, (MipsGPRel tconstpool:$in)),
                 (ADDiu GPR32:$gp, tconstpool:$in)>, ISA_MIPS1, ABI_NOT_N64;
 
   // wrapper_pic
   class WrapperPat<SDNode node, Instruction ADDiuOp, RegisterClass RC>:

test/CodeGen/Mips/tls.ll

 ; RUN: llc -mtriple=mipsel-- -disable-mips-delay-filler -relocation-model=pic < %s | \
-; RUN:     FileCheck %s -check-prefixes=PIC,CHECK
+; RUN:     FileCheck %s -check-prefixes=PIC32,CHECK
+; RUN: llc -mtriple=mips64el-- -disable-mips-delay-filler -relocation-model=pic < %s | \
+; RUN:     FileCheck %s -check-prefixes=PIC64,CHECK
 ; RUN: llc -mtriple=mipsel-- -relocation-model=static -disable-mips-delay-filler < \
-; RUN:     %s | FileCheck %s -check-prefixes=STATIC,CHECK
+; RUN:     %s | FileCheck %s -check-prefixes=STATIC32,CHECK
+; RUN: llc -mtriple=mips64el-- -relocation-model=static -disable-mips-delay-filler < \
+; RUN:     %s | FileCheck %s -check-prefixes=STATIC64,CHECK
 ; RUN: llc -mtriple=mipsel-- -relocation-model=static -disable-mips-delay-filler \
 ; RUN:     -mips-fix-global-base-reg=false < %s  | \
-; RUN:     FileCheck %s -check-prefixes=STATICGP,CHECK
+; RUN:     FileCheck %s -check-prefixes=STATICGP32,CHECK
+; RUN: llc -mtriple=mips64el-- -relocation-model=static -disable-mips-delay-filler \
+; RUN:     -mips-fix-global-base-reg=false < %s  | \
+; RUN:     FileCheck %s -check-prefixes=STATICGP64,CHECK
 
 @t1 = thread_local global i32 0, align 4
 
 define i32 @f1() nounwind {
 entry:
   %tmp = load i32, i32* @t1, align 4
   ret i32 %tmp
 
-; PIC-LABEL:       f1:
-; PIC-DAG:   addu    $[[R0:[a-z0-9]+]], $2, $25
-; PIC-DAG:   lw      $25, %call16(__tls_get_addr)($[[R0]])
-; PIC-DAG:   addiu   $4, $[[R0]], %tlsgd(t1)
-; PIC-DAG:   jalr    $25
-; PIC-DAG:   lw      $2, 0($2)
-
-; STATIC-LABEL:   f1:
-; STATIC:   lui     $[[R0:[0-9]+]], %tprel_hi(t1)
-; STATIC:   addiu   $[[R1:[0-9]+]], $[[R0]], %tprel_lo(t1)
-; STATIC:   rdhwr   $3, $29
-; STATIC:   addu    $[[R2:[0-9]+]], $3, $[[R1]]
-; STATIC:   lw      $2, 0($[[R2]])
+; PIC32-LABEL:       f1:
+; PIC32-DAG:   addu    $[[R0:[a-z0-9]+]], $2, $25
+; PIC32-DAG:   lw      $25, %call16(__tls_get_addr)($[[R0]])
+; PIC32-DAG:   addiu   $4, $[[R0]], %tlsgd(t1)
+; PIC32-DAG:   jalr    $25
+; PIC32-DAG:   lw      $2, 0($2)
+
+; PIC64-LABEL:       f1:
+; PIC64-DAG:   daddiu  $[[R0:[a-z0-9]+]], $1, %lo(%neg(%gp_rel(f1)))
+; PIC64-DAG:   ld      $25, %call16(__tls_get_addr)($[[R0]])
+; PIC64-DAG:   daddiu  $4, $[[R0]], %tlsgd(t1)
+; PIC64-DAG:   jalr    $25
+; PIC64-DAG:   lw      $2, 0($2)
+
+; STATIC32-LABEL:   f1:
+; STATIC32:   lui     $[[R0:[0-9]+]], %tprel_hi(t1)
+; STATIC32:   addiu   $[[R1:[0-9]+]], $[[R0]], %tprel_lo(t1)
+; STATIC32:   rdhwr   $3, $29
+; STATIC32:   addu    $[[R2:[0-9]+]], $3, $[[R1]]
+; STATIC32:   lw      $2, 0($[[R2]])
+
+; STATIC64-LABEL:   f1:
+; STATIC64:   lui     $[[R0:[0-9]+]], %tprel_hi(t1)
+; STATIC64:   daddiu  $[[R1:[0-9]+]], $[[R0]], %tprel_lo(t1)
+; STATIC64:   rdhwr   $3, $29
+; STATIC64:   daddu   $[[R2:[0-9]+]], $3, $[[R1]]
+; STATIC64:   lw      $2, 0($[[R2]])
 }
 
 
 @t2 = external thread_local global i32
 
 define i32 @f2() nounwind {
 entry:
   %tmp = load i32, i32* @t2, align 4
   ret i32 %tmp
 
-; PIC-LABEL:       f2:
-; PIC-DAG:   addu    $[[R0:[a-z0-9]+]], $2, $25
-; PIC-DAG:   lw      $25, %call16(__tls_get_addr)($[[R0]])
-; PIC-DAG:   addiu   $4, $[[R0]], %tlsgd(t2)
-; PIC-DAG:   jalr    $25
-; PIC-DAG:   lw      $2, 0($2)
-
-; STATICGP-LABEL: f2:
-; STATICGP: lui     $[[R0:[0-9]+]], %hi(__gnu_local_gp)
-; STATICGP: addiu   $[[GP:[0-9]+]], $[[R0]], %lo(__gnu_local_gp)
-; STATICGP: lw      ${{[0-9]+}}, %gottprel(t2)($[[GP]])
-
-; STATIC-LABEL:   f2:
-; STATIC:   lui     $[[R0:[0-9]+]], %hi(__gnu_local_gp)
-; STATIC:   addiu   $[[GP:[0-9]+]], $[[R0]], %lo(__gnu_local_gp)
-; STATIC:   rdhwr   $3, $29
-; STATIC:   lw      $[[R0:[0-9]+]], %gottprel(t2)($[[GP]])
-; STATIC:   addu    $[[R1:[0-9]+]], $3, $[[R0]]
-; STATIC:   lw      $2, 0($[[R1]])
+; PIC32-LABEL:       f2:
+; PIC32-DAG:   addu    $[[R0:[a-z0-9]+]], $2, $25
+; PIC32-DAG:   lw      $25, %call16(__tls_get_addr)($[[R0]])
+; PIC32-DAG:   addiu   $4, $[[R0]], %tlsgd(t2)
+; PIC32-DAG:   jalr    $25
+; PIC32-DAG:   lw      $2, 0($2)
+
+; PIC64-LABEL:       f2:
+; PIC64-DAG:   daddiu  $[[R0:[a-z0-9]+]], $1, %lo(%neg(%gp_rel(f2)))
+; PIC64-DAG:   ld      $25, %call16(__tls_get_addr)($[[R0]])
+; PIC64-DAG:   daddiu  $4, $[[R0]], %tlsgd(t2)
+; PIC64-DAG:   jalr    $25
+; PIC64-DAG:   lw      $2, 0($2)
+
+; STATICGP32-LABEL: f2:
+; STATICGP32: lui     $[[R0:[0-9]+]], %hi(__gnu_local_gp)
+; STATICGP32: addiu   $[[GP:[0-9]+]], $[[R0]], %lo(__gnu_local_gp)
+; STATICGP32: lw      ${{[0-9]+}}, %gottprel(t2)($[[GP]])
+
+; STATICGP64-LABEL: f2:
+; STATICGP64: lui     $[[R0:[0-9]+]], %hi(%neg(%gp_rel(f2)))
+; STATICGP64: daddiu  $[[GP:[0-9]+]], $[[R0]], %lo(%neg(%gp_rel(f2)))
+; STATICGP64: ld      ${{[0-9]+}}, %gottprel(t2)($[[GP]])
+
+; STATIC32-LABEL:   f2:
+; STATIC32:   lui     $[[R0:[0-9]+]], %hi(__gnu_local_gp)
+; STATIC32:   addiu   $[[GP:[0-9]+]], $[[R0]], %lo(__gnu_local_gp)
+; STATIC32:   rdhwr   $3, $29
+; STATIC32:   lw      $[[R0:[0-9]+]], %gottprel(t2)($[[GP]])
+; STATIC32:   addu    $[[R1:[0-9]+]], $3, $[[R0]]
+; STATIC32:   lw      $2, 0($[[R1]])
+
+; STATIC64-LABEL:   f2:
+; STATIC64:   lui     $[[R0:[0-9]+]], %hi(%neg(%gp_rel(f2)))
+; STATIC64:   daddiu  $[[GP:[0-9]+]], $[[R0]], %lo(%neg(%gp_rel(f2)))
+; STATIC64:   rdhwr   $3, $29
+; STATIC64:   ld      $[[R0:[0-9]+]], %gottprel(t2)($[[GP]])
+; STATIC64:   daddu   $[[R1:[0-9]+]], $3, $[[R0]]
+; STATIC64:   lw      $2, 0($[[R1]])
 }
 
 @f3.i = internal thread_local unnamed_addr global i32 1, align 4
 
 define i32 @f3() nounwind {
 entry:
 ; CHECK-LABEL: f3:
 
-; PIC:   addiu   $4, ${{[a-z0-9]+}}, %tlsldm(f3.i)
-; PIC:   jalr    $25
-; PIC:   lui     $[[R0:[0-9]+]], %dtprel_hi(f3.i)
-; PIC:   addu    $[[R1:[0-9]+]], $[[R0]], $2
-; PIC:   lw      ${{[0-9]+}}, %dtprel_lo(f3.i)($[[R1]])
+; PIC32:   addiu   $4, ${{[a-z0-9]+}}, %tlsldm(f3.i)
+; PIC32:   jalr    $25
+; PIC32:   lui     $[[R0:[0-9]+]], %dtprel_hi(f3.i)
+; PIC32:   addu    $[[R1:[0-9]+]], $[[R0]], $2
+; PIC32:   lw      ${{[0-9]+}}, %dtprel_lo(f3.i)($[[R1]])
+
+; PIC64:   daddiu  $4, ${{[a-z0-9]+}}, %tlsldm(f3.i)
+; PIC64:   jalr    $25
+; PIC64:   lui     $[[R0:[0-9]+]], %dtprel_hi(f3.i)
+; PIC64:   daddu   $[[R1:[0-9]+]], $[[R0]], $2
+; PIC64:   lw      ${{[0-9]+}}, %dtprel_lo(f3.i)($[[R1]])
 
   %0 = load i32, i32* @f3.i, align 4
   %inc = add nsw i32 %0, 1
   store i32 %inc, i32* @f3.i, align 4
   ret i32 %inc
 }