[AMDGPU] Do not consider indirect acces through phi for wave limiter

[rampitec]

Summary

Rational: if there is indirect access that is usually an issue
because load is not ready by the use. However, if use is inside a
loop and load is outside that is potentially an issue for a first
iteration only.

[yaxunl]

LGTM. Thanks.

llvm/trunk/lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.cpp

if (auto S = dyn_cast<SelectInst>(V)) {
       continue;
     }
 
     if (auto E = dyn_cast<ExtractElementInst>(V)) {
       WorkSet.insert(E->getVectorOperand());
       continue;
     }
 
-    if (auto Phi = dyn_cast<PHINode>(V)) {
-      for (unsigned I = 0, E = Phi->getNumIncomingValues(); I != E; ++I)
-        WorkSet.insert(Phi->getIncomingValue(I));
-      continue;
-    }
-
     LLVM_DEBUG(dbgs() << "    dropped\n");
   }
 
   LLVM_DEBUG(dbgs() << "  is not IA\n");
   return false;
 }
 
 void AMDGPUPerfHint::visit(const Function &F) {

llvm/trunk/test/CodeGen/AMDGPU/perfhint.ll

bb:
   %tmp17 = extractelement <4 x i32> %tmp4, i32 3
   %tmp18 = sext i32 %tmp17 to i64
   %tmp19 = getelementptr inbounds i32, i32 addrspace(1)* %arg, i64 %tmp18
   %tmp20 = load i32, i32 addrspace(1)* %tmp19, align 4
   store i32 %tmp20, i32 addrspace(1)* %tmp2, align 4
   ret void
 }
 
+; GCN-LABEL: {{^}}test_indirect_through_phi:
+; MemoryBound: 0
+; WaveLimiterHint : 0
+define amdgpu_kernel void @test_indirect_through_phi(float addrspace(1)* %arg) {
+bb:
+  %load = load float, float addrspace(1)* %arg, align 8
+  %load.f = bitcast float %load to i32
+  %n = tail call i32 @llvm.amdgcn.workitem.id.x()
+  br label %bb1
+
+bb1:                                              ; preds = %bb1, %bb
+  %phi = phi i32 [ %load.f, %bb ], [ %and2, %bb1 ]
+  %ind = phi i32 [ 0, %bb ], [ %inc2, %bb1 ]
+  %and1 = and i32 %phi, %n
+  %gep = getelementptr inbounds float, float addrspace(1)* %arg, i32 %and1
+  store float %load, float addrspace(1)* %gep, align 4
+  %inc1 = add nsw i32 %phi, 1310720
+  %and2 = and i32 %inc1, %n
+  %inc2 = add nuw nsw i32 %ind, 1
+  %cmp = icmp eq i32 %inc2, 1024
+  br i1 %cmp, label %bb2, label %bb1
+
+bb2:                                              ; preds = %bb1
+  ret void
+}
+
 declare i32 @llvm.amdgcn.workitem.id.x()