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AMDGPU/R600: Make sure functions are cache line aligned
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Authored by jvesely on May 30 2018, 12:55 AM.

Details

Summary

Functions should be cache line aligned
Fixes GPU hangs since r333219:
"AMDGPU: Split R600 AsmPrinter code into its own class"

Diff Detail

Repository
rL LLVM

Event Timeline

jvesely created this revision.May 30 2018, 12:55 AM
arsenm added inline comments.May 30 2018, 2:10 AM
lib/Target/AMDGPU/R600AsmPrinter.cpp
106–109 ↗(On Diff #149053)

Should be ensureAlignment

arsenm added inline comments.May 30 2018, 2:12 AM
lib/Target/AMDGPU/R600AsmPrinter.cpp
106–109 ↗(On Diff #149053)

I think this is also supposed to be expressed as power of two, not bytes

jvesely updated this revision to Diff 149149.May 30 2018, 10:01 AM
jvesely retitled this revision from AMDGPU/R600: Make sure functions are 8 byte aligned to AMDGPU/R600: Make sure functions are cache line aligned.
jvesely edited the summary of this revision. (Show Details)

Change explanation to cache line alignment (p2align 3 still hangs the GPU).
Use ensure alignment

jvesely marked 2 inline comments as done.May 30 2018, 10:01 AM
jvesely added inline comments.May 30 2018, 11:52 AM
lib/Target/AMDGPU/R600AsmPrinter.cpp
106–109 ↗(On Diff #149053)

you might want to check the MADGPUASmrinter as well, that's where I copied this from.

arsenm accepted this revision.May 30 2018, 2:28 PM

LGTM

This revision is now accepted and ready to land.May 30 2018, 2:28 PM
This revision was automatically updated to reflect the committed changes.