AMDGPU/R600: Make sure functions are cache line aligned

[jvesely]

Summary

Functions should be cache line aligned
Fixes GPU hangs since r333219:
"AMDGPU: Split R600 AsmPrinter code into its own class"

[arsenm]

lib/Target/AMDGPU/R600AsmPrinter.cpp

106–109

Should be ensureAlignment

[arsenm]

lib/Target/AMDGPU/R600AsmPrinter.cpp

106–109

I think this is also supposed to be expressed as power of two, not bytes

[jvesely]

Change explanation to cache line alignment (p2align 3 still hangs the GPU).
Use ensure alignment

[jvesely]

lib/Target/AMDGPU/R600AsmPrinter.cpp

106–109

you might want to check the MADGPUASmrinter as well, that's where I copied this from.

[arsenm]

LGTM

lib/Target/AMDGPU/R600AsmPrinter.cpp

void R600AsmPrinter::EmitProgramInfoR600(const MachineFunction &MF) {
   if (AMDGPU::isCompute(MF.getFunction().getCallingConv())) {
     OutStreamer->EmitIntValue(R_0288E8_SQ_LDS_ALLOC, 4);
     OutStreamer->EmitIntValue(alignTo(MFI->getLDSSize(), 4) >> 2, 4);
   }
 }
 
 bool R600AsmPrinter::runOnMachineFunction(MachineFunction &MF) {
 
+
+  // All CF instructions need to be 8 byte aligned. Since functions begin
+  // with a CF instruction, they all need to be 8 by aligned.
+  MF.setAlignment(8);
+
   SetupMachineFunction(MF);
 
   MCContext &Context = getObjFileLowering().getContext();
   MCSectionELF *ConfigSection =
       Context.getELFSection(".AMDGPU.config", ELF::SHT_PROGBITS, 0);
   OutStreamer->SwitchSection(ConfigSection);
 
   EmitProgramInfoR600(MF);

test/CodeGen/AMDGPU/r600.func-alignment.ll

+; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
+; RUN: llc < %s -march=r600 -mcpu=rs880 | FileCheck  %s
+
+; CHECK: .globl test
+; CHECK: .p2align 8
+; CHECK: {{^}}test:
+; CHECK: CF_END
+
+define amdgpu_ps void @test(<4 x float> inreg %reg0) {
+entry:
+  ret void
+}
+