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[AMDGPU][Waitcnt] Remove obsolete waitcnt option
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Authored by msearles on May 25 2018, 10:40 AM.

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Reviewers

t-tye
rampitec
kzhuravl

Commits

rG32efedcff363: [AMDGPU][Waitcnt] Remove obsolete waitcnt option
rL333303: [AMDGPU][Waitcnt] Remove obsolete waitcnt option

Summary

With the removal of the old waitcnt pass, the '-enable-si-insert-waitcnts' option is obsolete. Remove it.

Diff Detail

Repository: rL LLVM

Event Timeline

msearles created this revision.May 25 2018, 10:40 AM

Herald added subscribers: tpr, dstuttard, yaxunl and 4 others. · View Herald TranscriptMay 25 2018, 10:40 AM

LGTM

This revision is now accepted and ready to land.May 25 2018, 11:27 AM

LGTM Thanks:-)

Closed by commit rL333303: [AMDGPU][Waitcnt] Remove obsolete waitcnt option (authored by msearles). · Explain WhyMay 25 2018, 1:28 PM

This revision was automatically updated to reflect the committed changes.

Revision Contents

Path

Size

llvm/

trunk/

lib/

Target/

AMDGPU/

AMDGPUTargetMachine.cpp

6 lines

test/

CodeGen/

AMDGPU/

fence-barrier.ll

4 lines

Diff 148657

llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

Show First 20 Lines • Show All 104 Lines • ▼ Show 20 Lines	static cl::opt<bool> EnableSDWAPeephole(
cl::desc("Enable SDWA peepholer"),		cl::desc("Enable SDWA peepholer"),
cl::init(true));		cl::init(true));

// Enable address space based alias analysis		// Enable address space based alias analysis
static cl::opt<bool> EnableAMDGPUAliasAnalysis("enable-amdgpu-aa", cl::Hidden,		static cl::opt<bool> EnableAMDGPUAliasAnalysis("enable-amdgpu-aa", cl::Hidden,
cl::desc("Enable AMDGPU Alias Analysis"),		cl::desc("Enable AMDGPU Alias Analysis"),
cl::init(true));		cl::init(true));

// Option to enable new waitcnt insertion pass.
static cl::opt<bool> EnableSIInsertWaitcntsPass(
"enable-si-insert-waitcnts",
cl::desc("Use new waitcnt insertion pass"),
cl::init(true));

// Option to run late CFG structurizer		// Option to run late CFG structurizer
static cl::opt<bool, true> LateCFGStructurize(		static cl::opt<bool, true> LateCFGStructurize(
"amdgpu-late-structurize",		"amdgpu-late-structurize",
cl::desc("Enable late CFG structurization"),		cl::desc("Enable late CFG structurization"),
cl::location(AMDGPUTargetMachine::EnableLateStructurizeCFG),		cl::location(AMDGPUTargetMachine::EnableLateStructurizeCFG),
cl::Hidden);		cl::Hidden);

static cl::opt<bool> EnableAMDGPUFunctionCalls(		static cl::opt<bool> EnableAMDGPUFunctionCalls(
▲ Show 20 Lines • Show All 767 Lines • Show Last 20 Lines

llvm/trunk/test/CodeGen/AMDGPU/fence-barrier.ll

	; RUN: llc -mtriple=amdgcn-amd-amdhsa-amdgiz -mcpu=gfx803 -enable-si-insert-waitcnts=1 -verify-machineinstrs < %s \| FileCheck --check-prefix=GCN %s			; RUN: llc -mtriple=amdgcn-amd-amdhsa-amdgiz -mcpu=gfx803 -verify-machineinstrs < %s \| FileCheck --check-prefix=GCN %s
	; RUN: llvm-as -data-layout=A5 < %s \| llc -mtriple=amdgcn-amd-amdhsa-amdgiz -mcpu=gfx803 -enable-si-insert-waitcnts=1 -verify-machineinstrs \| FileCheck --check-prefix=GCN %s			; RUN: llvm-as -data-layout=A5 < %s \| llc -mtriple=amdgcn-amd-amdhsa-amdgiz -mcpu=gfx803 -verify-machineinstrs \| FileCheck --check-prefix=GCN %s

	declare i8 addrspace(4)* @llvm.amdgcn.dispatch.ptr()			declare i8 addrspace(4)* @llvm.amdgcn.dispatch.ptr()
	declare i8 addrspace(4)* @llvm.amdgcn.implicitarg.ptr()			declare i8 addrspace(4)* @llvm.amdgcn.implicitarg.ptr()
	declare i32 @llvm.amdgcn.workitem.id.x()			declare i32 @llvm.amdgcn.workitem.id.x()
	declare i32 @llvm.amdgcn.workgroup.id.x()			declare i32 @llvm.amdgcn.workgroup.id.x()
	declare void @llvm.amdgcn.s.barrier()			declare void @llvm.amdgcn.s.barrier()

	@test_local.temp = internal addrspace(3) global [1 x i32] undef, align 4			@test_local.temp = internal addrspace(3) global [1 x i32] undef, align 4
	▲ Show 20 Lines • Show All 188 Lines • Show Last 20 Lines