AMDGPU: Remove deprecated llvm.AMDGPU.kilp intrinsic

[tstellar]

Summary

This is no longer used by mesa since its 18.0.0 release.

[nhaehnle]

LGTM

lib/Target/AMDGPU/AMDGPUIntrinsics.td

 //===-- AMDGPUIntrinsics.td - Common intrinsics  -*- tablegen -*-----------===//
 //
 //                     The LLVM Compiler Infrastructure
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file defines intrinsics that are used by all hw codegen targets.
 //
 //===----------------------------------------------------------------------===//
 
 let TargetPrefix = "AMDGPU", isTarget = 1 in {
   def int_AMDGPU_kill : Intrinsic<[], [llvm_float_ty], []>;
-  def int_AMDGPU_kilp : Intrinsic<[], [], []>;
 }
 
 include "SIIntrinsics.td"

lib/Target/AMDGPU/R600Instructions.td

 
 //CNDGE_INT extra pattern
 def : R600Pat <
   (selectcc i32:$src0, -1, i32:$src1, i32:$src2, COND_SGT),
   (CNDGE_INT $src0, $src1, $src2)
 >;
 
 // KIL Patterns
-def KILP : R600Pat <
-  (int_AMDGPU_kilp),
-  (MASK_WRITE (KILLGT (f32 ONE), (f32 ZERO)))
->;
-
 def KIL : R600Pat <
   (int_AMDGPU_kill f32:$src0),
   (MASK_WRITE (KILLGT (f32 ZERO), $src0))
 >;
 
 def : Extract_Element <f32, v4f32, 0, sub0>;
 def : Extract_Element <f32, v4f32, 1, sub1>;
 def : Extract_Element <f32, v4f32, 2, sub2>;

lib/Target/AMDGPU/SIInstructions.td

def : GCNPat<
   (S_TRAP $trapid)
 >;
 
 def : GCNPat<
   (AMDGPUelse i64:$src, bb:$target),
   (SI_ELSE $src, $target, 0)
 >;
 
-def : GCNPat <
-  (int_AMDGPU_kilp),
-  (SI_KILL_I1_PSEUDO (i1 0), 0)
->;
-
 def : Pat <
   // -1.0 as i32 (LowerINTRINSIC_VOID converts all other constants to -1.0)
   (AMDGPUkill (i32 -1082130432)),
   (SI_KILL_I1_PSEUDO (i1 0), 0)
 >;
 
 def : Pat <
   (int_amdgcn_kill i1:$src),

test/CodeGen/AMDGPU/llvm.amdgpu.kilp.ll

-; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
-; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
-
-; SI-LABEL: {{^}}kilp_gs_const:
-; SI: s_mov_b64 exec, 0
-define amdgpu_gs void @kilp_gs_const() {
-main_body:
-  %0 = icmp ule i32 0, 3
-  %1 = select i1 %0, float 1.000000e+00, float -1.000000e+00
-  call void @llvm.AMDGPU.kilp(float %1)
-  %2 = icmp ule i32 3, 0
-  %3 = select i1 %2, float 1.000000e+00, float -1.000000e+00
-  call void @llvm.AMDGPU.kilp(float %3)
-  ret void
-}
-
-declare void @llvm.AMDGPU.kilp(float)
-
-!0 = !{!"const", null, i32 1}

test/CodeGen/AMDGPU/si-lower-control-flow-kill.ll

 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
 
 ; GCN-LABEL: {{^}}if_with_kill:
 ; GCN:      s_and_saveexec_b64 [[SAVEEXEC:s\[[0-9:]+\]]],
 ; GCN-NEXT: s_xor_b64 s[{{[0-9:]+}}], exec, [[SAVEEXEC]]
 define amdgpu_ps void @if_with_kill(i32 %arg) {
 .entry:
   %cmp = icmp eq i32 %arg, 32
   br i1 %cmp, label %then, label %endif
 
 then:
-  tail call void @llvm.AMDGPU.kilp()
+  tail call void @llvm.amdgcn.kill(i1 false)
   br label %endif
 
 endif:
   ret void
 }
 
 ; GCN-LABEL: {{^}}if_with_loop_kill_after:
 ; GCN:      s_and_saveexec_b64 [[SAVEEXEC:s\[[0-9:]+\]]],

 
 loop:
   %ind = phi i32 [%sub, %then], [%dec, %loop]
   %dec = sub i32 %ind, 1
   %cc = icmp ne i32 %ind, 0
   br i1 %cc, label %loop, label %break
 
 break:
-  tail call void @llvm.AMDGPU.kilp()
+  tail call void @llvm.amdgcn.kill(i1 false)
   br label %endif
 
 endif:
   ret void
 }
 
 ; GCN-LABEL: {{^}}if_with_kill_inside_loop:
 ; GCN:      s_and_saveexec_b64 [[SAVEEXEC:s\[[0-9:]+\]]],
 ; GCN-NEXT: s_xor_b64 s[{{[0-9:]+}}], exec, [[SAVEEXEC]]
 define amdgpu_ps void @if_with_kill_inside_loop(i32 %arg) {
 .entry:
   %cmp = icmp eq i32 %arg, 32
   br i1 %cmp, label %then, label %endif
 
 then:
   %sub = sub i32 %arg, 1
   br label %loop
 
 loop:
   %ind = phi i32 [%sub, %then], [%dec, %loop]
   %dec = sub i32 %ind, 1
   %cc = icmp ne i32 %ind, 0
-  tail call void @llvm.AMDGPU.kilp()
+  tail call void @llvm.amdgcn.kill(i1 false)
   br i1 %cc, label %loop, label %break
 
 break:
   br label %endif
 
 endif:
   ret void
 }
 
-declare void @llvm.AMDGPU.kilp()
+declare void @llvm.amdgcn.kill(i1) #0
+
+attributes #0 = { nounwind }