example

[craig.topper]

Used the mayStore flag instead of checking operand 0 for def. It felt a little clearer to think about.

I made a whole new instruction, but I was wondering if we could just mutate the original instruction by changing the opcode and adding the extra input register.

[vlad.tsyrklevich]

Verified this locally that it fixes the failing chromium build.

[craig.topper]

Commited in r329771. I'm abandoning this though because it was never supposed to have been a public review, which is why the title is "example"

lib/Target/X86/X86FlagsCopyLowering.cpp

void X86FlagsCopyLoweringPass::rewriteSetCC(MachineBasicBlock &TestMBB,
   X86::CondCode Cond = X86::getCondFromSETOpc(SetCCI.getOpcode());
   // Note that we can't usefully rewrite this to the inverse without complex
   // analysis of the users of the setCC. Largely we rely on duplicates which
   // could have been avoided already being avoided here.
   unsigned &CondReg = CondRegs[Cond];
   if (!CondReg)
     CondReg = promoteCondToReg(TestMBB, TestPos, TestLoc, Cond);
 
-  // Rewriting this is trivial: we just replace the register and remove the
-  // setcc.
+  // Rewriting a register def is trivial: we just replace the register and
+  // remove the setcc.
+  if (!SetCCI.mayStore()) {
+    assert(SetCCI.getOperand(0).isReg() &&
+           "Cannot have a non-register defined operand to SETcc!");
     MRI->replaceRegWith(SetCCI.getOperand(0).getReg(), CondReg);
     SetCCI.eraseFromParent();
+    return;
+  }
+
+  // Otherwise, we need to emit a store.
+  auto MIB = BuildMI(*SetCCI.getParent(), SetCCI.getIterator(),
+                     SetCCI.getDebugLoc(), TII->get(X86::MOV8mr));
+  // Copy the address operands.
+  for (int i = 0; i < X86::AddrNumOperands; ++i)
+    MIB.add(SetCCI.getOperand(i));
+
+  MIB.addReg(CondReg);
+
+  MIB->setMemRefs(SetCCI.memoperands_begin(), SetCCI.memoperands_end());
+
+  SetCCI.eraseFromParent();
+  return;
 }

test/CodeGen/X86/flags-copy-lowering.mir

; CHECK-NOT:  COPY{{( killed)?}} $eflags
     ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
     CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, implicit-def $rsp, implicit-def $ssp, implicit-def $eax
     ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
 
     $eflags = COPY %2
     %3:gr8 = SETAr implicit $eflags
     %4:gr8 = SETBr implicit $eflags
     %5:gr8 = SETEr implicit $eflags
-    %6:gr8 = SETNEr implicit killed $eflags
+    SETNEm $rsp, 1, $noreg, -16, $noreg, implicit killed $eflags
     MOV8mr $rsp, 1, $noreg, -16, $noreg, killed %3
     MOV8mr $rsp, 1, $noreg, -16, $noreg, killed %4
     MOV8mr $rsp, 1, $noreg, -16, $noreg, killed %5
-    MOV8mr $rsp, 1, $noreg, -16, $noreg, killed %6
   ; CHECK-NOT:     $eflags =
   ; CHECK-NOT:             = SET{{.*}}
   ; CHECK:         MOV8mr {{.*}}, killed %[[A_REG]]
   ; CHECK-CHECK:   MOV8mr {{.*}}, killed %[[B_REG]]
   ; CHECK-CHECK:   MOV8mr {{.*}}, killed %[[E_REG]]
   ; CHECK-CHECK:   MOV8mr {{.*}}, killed %[[NE_REG]]
 
     RET 0