[LLDB][PPC64] Fixed next blocked forever at same line

[luporl]

Summary

The PC corresponding to the breakpoint was being calculated wrongly,
which was causing LLDB to never go past the first breakpoint, when
there was a second one adjacent to it.

[luporl]

Thanks @clayborg and @labath! Can you please commit this patch for me?

source/Plugins/Process/Linux/NativeProcessLinux.cpp

 }
 
 Status NativeProcessLinux::GetSoftwareBreakpointPCOffset(
     uint32_t &actual_opcode_size) {
   // FIXME put this behind a breakpoint protocol class that can be
   // set per architecture.  Need ARM, MIPS support here.
   static const uint8_t g_i386_opcode[] = {0xCC};
   static const uint8_t g_s390x_opcode[] = {0x00, 0x01};
-  static const uint8_t g_ppc64le_opcode[] = {0x08, 0x00, 0xe0, 0x7f}; // trap
 
   switch (m_arch.GetMachine()) {
   case llvm::Triple::x86:
   case llvm::Triple::x86_64:
     actual_opcode_size = static_cast<uint32_t>(sizeof(g_i386_opcode));
     return Status();
 
   case llvm::Triple::systemz:
     actual_opcode_size = static_cast<uint32_t>(sizeof(g_s390x_opcode));
     return Status();
 
-  case llvm::Triple::ppc64le:
-    actual_opcode_size = static_cast<uint32_t>(sizeof(g_ppc64le_opcode));
-    return Status();
-
   case llvm::Triple::arm:
   case llvm::Triple::aarch64:
   case llvm::Triple::mips64:
   case llvm::Triple::mips64el:
   case llvm::Triple::mips:
   case llvm::Triple::mipsel:
+  case llvm::Triple::ppc64le:
     // On these architectures the PC don't get updated for breakpoint hits
     actual_opcode_size = 0;
     return Status();
 
   default:
     assert(false && "CPU type not supported!");
     return Status("CPU type not supported");
   }