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[ARM] f16 stack spill/reloads
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Authored by SjoerdMeijer on Feb 14 2018, 1:41 AM.

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Summary

This adds support for handling f16 stack spills/reloads.

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SjoerdMeijer created this revision.Feb 14 2018, 1:41 AM

Forgot the Thumb test case.

olista01 added inline comments.Feb 14 2018, 6:21 AM
test/CodeGen/ARM/fp16-instructions.ll
721

This test looks more complicated than it needs to be, can it be reduced?

This IR is generated from the reduced C test case:

fn1() {
  fn2(9.765625e4F16);
  fn3(9.765625e4F16);
}

There is a bit of bitcasting going on because of the way we pass half-floats,
and a few alloca's because the easiest way to trigger this is with fast-isel
and no reg allocation, so I am not sure how I can further reduce this.

The test case doesn't have to be exactly the -O0 output from clang, you should reduce it to clear IR which triggers the bug. To start with, are all of those allocas and memcpy calls required?

Ok, yes, thanks. Test case now reduced.

olista01 accepted this revision.Feb 14 2018, 7:06 AM

LGTM, thanks

This revision is now accepted and ready to land.Feb 14 2018, 7:06 AM
This revision was automatically updated to reflect the committed changes.