[X86] Implementation of X86Operand::print

[avt77]

Summary

The current body of the feature is empty. This patch produces the real info describing the given MC operand. Such extended debug logging realy helped when I was working with D41595.

[RKSimon]

lib/Target/X86/AsmParser/X86Operand.h

115 ↗

(On Diff #128270)

If possible, I'd make this a lambda function inside the print function below and hopefully remove the need for the union.

[avt77]

The implemetation was switched to lambda function.

[RKSimon]

A couple of minors, but no more comments from me. @craig.topper ?

lib/Target/X86/AsmParser/X86Operand.h

102 ↗

(On Diff #129067)

Capitalization: PrintImmValue

107 ↗

(On Diff #129067)

Add an assert message

[avt77]

lib/Target/X86/AsmParser/X86Operand.h

107 ↗

(On Diff #129067)

Maybe it's better something like (instead of assertion):

 if (const MCSymbolRefExpr &SRE = dyn_cast<MCSymbolRefExpr>(*Val)) {
   const MCSymbol &Sym = SRE.getSymbol();
   if (auto SymName = Sym.getName().data())
......

to be sure it can't raise exception?

[avt77]

I renamed the feature and replaced the assertion with dyn_cast.

[craig.topper]

lib/Target/X86/AsmParser/X86Operand.h

39 ↗

(On Diff #129111)

Why isn't this part of the RegOp struct? Though I suggested a way we can remove this entirely further down.

121 ↗

(On Diff #129111)

It would print lower case instead of upper case, but I think you can use X86IntelInstPrinter::getRegisterName which is a static method and then you wouldn't have to pass MRI around.

[avt77]

I removed usage of MRI thanking to Craig's suggest.

[craig.topper]

LGTM

llvm/trunk/lib/Target/X86/AsmParser/X86Operand.h

 //===- X86Operand.h - Parsed X86 machine instruction ------------*- C++ -*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef LLVM_LIB_TARGET_X86_ASMPARSER_X86OPERAND_H
 #define LLVM_LIB_TARGET_X86_ASMPARSER_X86OPERAND_H
 
+#include "InstPrinter/X86IntelInstPrinter.h"
 #include "MCTargetDesc/X86MCTargetDesc.h"
 #include "X86AsmParserCommon.h"
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/ADT/StringRef.h"
 #include "llvm/MC/MCExpr.h"
 #include "llvm/MC/MCInst.h"
 #include "llvm/MC/MCParser/MCParsedAsmOperand.h"
 #include "llvm/MC/MCRegisterInfo.h"
union {
     struct TokOp Tok;
     struct RegOp Reg;
     struct ImmOp Imm;
     struct MemOp Mem;
     struct PrefOp Pref;
   };
 
   X86Operand(KindTy K, SMLoc Start, SMLoc End)
       : Kind(K), StartLoc(Start), EndLoc(End) {}
 
   StringRef getSymName() override { return SymName; }
   void *getOpDecl() override { return OpDecl; }
 
   /// getStartLoc - Get the location of the first token of this operand.
   SMLoc getStartLoc() const override { return StartLoc; }
 
   /// getEndLoc - Get the location of the last token of this operand.
   SMLoc getEndLoc() const override { return EndLoc; }
 
   /// getLocRange - Get the range between the first and last token of this
   /// operand.
   SMRange getLocRange() const { return SMRange(StartLoc, EndLoc); }
 
   /// getOffsetOfLoc - Get the location of the offset operator.
   SMLoc getOffsetOfLoc() const override { return OffsetOfLoc; }
 
-  void print(raw_ostream &OS) const override {}
+  void print(raw_ostream &OS) const override {
+
+    auto PrintImmValue = [&](const MCExpr *Val, const char *VName) {
+      if (Val->getKind() == MCExpr::Constant) {
+        if (auto Imm = cast<MCConstantExpr>(Val)->getValue())
+          OS << VName << Imm;
+      } else if (Val->getKind() == MCExpr::SymbolRef) {
+        if (auto *SRE = dyn_cast<MCSymbolRefExpr>(Val)) {
+          const MCSymbol &Sym = SRE->getSymbol();
+          if (auto SymName = Sym.getName().data())
+            OS << VName << SymName;
+        }
+      }
+    };
+
+    switch (Kind) {
+    case Token:
+      OS << Tok.Data;
+      break;
+    case Register:
+      OS << "Reg:" << X86IntelInstPrinter::getRegisterName(Reg.RegNo);
+      break;
+    case Immediate:
+      PrintImmValue(Imm.Val, "Imm:");
+      break;
+    case Prefix:
+      OS << "Prefix:" << Pref.Prefixes;
+      break;
+    case Memory:
+      OS << "Memory: ModeSize=" << Mem.ModeSize;
+      if (Mem.Size)
+        OS << ",Size=" << Mem.Size;
+      if (Mem.BaseReg)
+        OS << ",BaseReg=" << X86IntelInstPrinter::getRegisterName(Mem.BaseReg);
+      if (Mem.IndexReg)
+        OS << ",IndexReg="
+           << X86IntelInstPrinter::getRegisterName(Mem.IndexReg);
+      if (Mem.Scale)
+        OS << ",Scale=" << Mem.Scale;
+      if (Mem.Disp)
+        PrintImmValue(Mem.Disp, ",Disp=");
+      if (Mem.SegReg)
+        OS << ",SegReg=" << X86IntelInstPrinter::getRegisterName(Mem.SegReg);
+      break;
+    }
+  }
 
   StringRef getToken() const {
     assert(Kind == Token && "Invalid access!");
     return StringRef(Tok.Data, Tok.Length);
   }
   void setTokenValue(StringRef Value) {
     assert(Kind == Token && "Invalid access!");
     Tok.Data = Value.data();

llvm/trunk/test/MC/X86/x86_64-asm-match.s

 // RUN: llvm-mc -triple x86_64-unknown-unknown  -debug-only=asm-matcher  %s 2>&1 | FileCheck %s
 // REQUIRES: asserts
 
 // CHECK: AsmMatcher: found 4 encodings with mnemonic 'pshufb'
-// CHECK:Trying to match opcode MMX_PSHUFBrr64
-// CHECK:  Matching formal operand class MCK_VR64 against actual operand at index 1 (): Opcode result: multiple operand mismatches, ignoring this opcode
-// CHECK:Trying to match opcode PSHUFBrr
-// CHECK:  Matching formal operand class MCK_FR32 against actual operand at index 1 (): Opcode result: multiple operand mismatches, ignoring this opcode
-// CHECK:Trying to match opcode PSHUFBrm
-// CHECK:  Matching formal operand class MCK_Mem128 against actual operand at index 1 (): match success using generic matcher
-// CHECK:  Matching formal operand class MCK_FR32 against actual operand at index 2 (): match success using generic matcher
-// CHECK:  Matching formal operand class InvalidMatchClass against actual operand at index 3: actual operand index out of range Opcode result: complete match, selecting this opcode
-// CHECK:AsmMatcher: found 2 encodings with mnemonic 'sha1rnds4'
-// CHECK:Trying to match opcode SHA1RNDS4rri
-// CHECK:  Matching formal operand class MCK_ImmUnsignedi8 against actual operand at index 1 (): match success using generic matcher
-// CHECK:  Matching formal operand class MCK_FR32 against actual operand at index 2 (): match success using generic matcher
-// CHECK:  Matching formal operand class MCK_FR32 against actual operand at index 3 (): match success using generic matcher
-// CHECK:  Matching formal operand class InvalidMatchClass against actual operand at index 4: actual operand index out of range Opcode result: complete match, selecting this opcode
-// CHECK:AsmMatcher: found 4 encodings with mnemonic 'pinsrw'
-// CHECK:Trying to match opcode MMX_PINSRWirri
-// CHECK:  Matching formal operand class MCK_ImmUnsignedi8 against actual operand at index 1 (): match success using generic matcher
-// CHECK:  Matching formal operand class MCK_GR32orGR64 against actual operand at index 2 (): match success using generic matcher
-// CHECK:  Matching formal operand class MCK_VR64 against actual operand at index 3 (): Opcode result: multiple operand mismatches, ignoring this opcode
-// CHECK:Trying to match opcode PINSRWrri
-// CHECK:  Matching formal operand class MCK_ImmUnsignedi8 against actual operand at index 1 (): match success using generic matcher
-// CHECK:  Matching formal operand class MCK_GR32orGR64 against actual operand at index 2 (): match success using generic matcher
-// CHECK:  Matching formal operand class MCK_FR32 against actual operand at index 3 (): match success using generic matcher
-// CHECK:  Matching formal operand class InvalidMatchClass against actual operand at index 4: actual operand index out of range Opcode result: complete match, selecting this opcode
-// CHECK:AsmMatcher: found 2 encodings with mnemonic 'crc32l'
-// CHECK:Trying to match opcode CRC32r32r32
-// CHECK:  Matching formal operand class MCK_GR32 against actual operand at index 1 (): Opcode result: multiple operand mismatches, ignoring this opcode
-// CHECK:Trying to match opcode CRC32r32m32
-// CHECK:  Matching formal operand class MCK_Mem32 against actual operand at index 1 (): match success using generic matcher
-// CHECK:  Matching formal operand class MCK_GR32 against actual operand at index 2 (): match success using generic matcher
-// CHECK:  Matching formal operand class InvalidMatchClass against actual operand at index 3: actual operand index out of range Opcode result: complete match, selecting this opcode
-// CHECK:AsmMatcher: found 4 encodings with mnemonic 'punpcklbw'
-// CHECK:Trying to match opcode MMX_PUNPCKLBWirr
-// CHECK:  Matching formal operand class MCK_VR64 against actual operand at index 1 (): match success using generic matcher
-// CHECK:  Matching formal operand class MCK_VR64 against actual operand at index 2 (): Opcode result: multiple operand mismatches, ignoring this opcode
-// CHECK:Trying to match opcode MMX_PUNPCKLBWirm
-// CHECK:  Matching formal operand class MCK_VR64 against actual operand at index 1 (): match success using generic matcher
-// CHECK:  Matching formal operand class MCK_Mem32 against actual operand at index 2 (): match success using generic matcher
-// CHECK:  Matching formal operand class InvalidMatchClass against actual operand at index 3: actual operand index out of range Opcode result: complete match, selecting this opcode
+// CHECK: Trying to match opcode MMX_PSHUFBrr64
+// CHECK:   Matching formal operand class MCK_VR64 against actual operand at index 1 (Memory: ModeSize=64,BaseReg=rip,Scale=1,Disp=CPI1_0): Opcode result: multiple operand mismatches, ignoring this opcode
+// CHECK: Trying to match opcode PSHUFBrr
+// CHECK:   Matching formal operand class MCK_FR32 against actual operand at index 1 (Memory: ModeSize=64,BaseReg=rip,Scale=1,Disp=CPI1_0): Opcode result: multiple operand mismatches, ignoring this opcode
+// CHECK: Trying to match opcode PSHUFBrm
+// CHECK:   Matching formal operand class MCK_Mem128 against actual operand at index 1 (Memory: ModeSize=64,BaseReg=rip,Scale=1,Disp=CPI1_0): match success using generic matcher
+// CHECK:   Matching formal operand class MCK_FR32 against actual operand at index 2 (Reg:xmm1): match success using generic matcher
+// CHECK:   Matching formal operand class InvalidMatchClass against actual operand at index 3: actual operand index out of range Opcode result: complete match, selecting this opcode
+// CHECK: AsmMatcher: found 2 encodings with mnemonic 'sha1rnds4'
+// CHECK: Trying to match opcode SHA1RNDS4rri
+// CHECK:   Matching formal operand class MCK_ImmUnsignedi8 against actual operand at index 1 (Imm:1): match success using generic matcher
+// CHECK:   Matching formal operand class MCK_FR32 against actual operand at index 2 (Reg:xmm1): match success using generic matcher
+// CHECK:   Matching formal operand class MCK_FR32 against actual operand at index 3 (Reg:xmm2): match success using generic matcher
+// CHECK:   Matching formal operand class InvalidMatchClass against actual operand at index 4: actual operand index out of range Opcode result: complete match, selecting this opcode
+// CHECK: AsmMatcher: found 4 encodings with mnemonic 'pinsrw'
+// CHECK: Trying to match opcode MMX_PINSRWirri
+// CHECK:   Matching formal operand class MCK_ImmUnsignedi8 against actual operand at index 1 (Imm:3): match success using generic matcher
+// CHECK:   Matching formal operand class MCK_GR32orGR64 against actual operand at index 2 (Reg:ecx): match success using generic matcher
+// CHECK:   Matching formal operand class MCK_VR64 against actual operand at index 3 (Reg:xmm5): Opcode result: multiple operand mismatches, ignoring this opcode
+// CHECK: Trying to match opcode PINSRWrri
+// CHECK:   Matching formal operand class MCK_ImmUnsignedi8 against actual operand at index 1 (Imm:3): match success using generic matcher
+// CHECK:   Matching formal operand class MCK_GR32orGR64 against actual operand at index 2 (Reg:ecx): match success using generic matcher
+// CHECK:   Matching formal operand class MCK_FR32 against actual operand at index 3 (Reg:xmm5): match success using generic matcher
+// CHECK:   Matching formal operand class InvalidMatchClass against actual operand at index 4: actual operand index out of range Opcode result: complete match, selecting this opcode
+// CHECK: AsmMatcher: found 2 encodings with mnemonic 'crc32l'
+// CHECK: Trying to match opcode CRC32r32r32
+// CHECK:   Matching formal operand class MCK_GR32 against actual operand at index 1 (Memory: ModeSize=64,BaseReg=rbx,IndexReg=rcx,Scale=8,Disp=3735928559,SegReg=gs): Opcode result: multiple operand mismatches, ignoring this opcode
+// CHECK: Trying to match opcode CRC32r32m32
+// CHECK:   Matching formal operand class MCK_Mem32 against actual operand at index 1 (Memory: ModeSize=64,BaseReg=rbx,IndexReg=rcx,Scale=8,Disp=3735928559,SegReg=gs): match success using generic matcher
+// CHECK:   Matching formal operand class MCK_GR32 against actual operand at index 2 (Reg:ecx): match success using generic matcher
+// CHECK:   Matching formal operand class InvalidMatchClass against actual operand at index 3: actual operand index out of range Opcode result: complete match, selecting this opcode
+// CHECK: AsmMatcher: found 4 encodings with mnemonic 'punpcklbw'
+// CHECK: Trying to match opcode MMX_PUNPCKLBWirr
+// CHECK:   Matching formal operand class MCK_VR64 against actual operand at index 1 (Reg:mm0): match success using generic matcher
+// CHECK:   Matching formal operand class MCK_VR64 against actual operand at index 2 (Memory: ModeSize=64,Size=32,BaseReg=rsp,Scale=1): Opcode result: multiple operand mismatches, ignoring this opcode
+// CHECK: Trying to match opcode MMX_PUNPCKLBWirm
+// CHECK:   Matching formal operand class MCK_VR64 against actual operand at index 1 (Reg:mm0): match success using generic matcher
+// CHECK:   Matching formal operand class MCK_Mem32 against actual operand at index 2 (Memory: ModeSize=64,Size=32,BaseReg=rsp,Scale=1): match success using generic matcher
+// CHECK:   Matching formal operand class InvalidMatchClass against actual operand at index 3: actual operand index out of range Opcode result: complete match, selecting this opcode
 
-
 pshufb    CPI1_0(%rip), %xmm1
 sha1rnds4 $1, %xmm1, %xmm2
 pinsrw    $3, %ecx, %xmm5
 crc32l    %gs:0xdeadbeef(%rbx,%rcx,8),%ecx
 
 .intel_syntax
 punpcklbw mm0, dword ptr [rsp]